Merge branch 'dey-5.0/master' into dey-5.0/maint

Signed-off-by: Javier Viguera <javier.viguera@digi.com>
2025-11-28 17:58:45 +01:00 · 2025-11-28 17:58:45 +01:00 · 052cd63529
parent bc1d97cd3b 0400223712
commit 052cd63529
276 changed files with 95738 additions and 6046 deletions
--- a/README.md
+++ b/README.md
@ -1,5 +1,5 @@
 # Digi Embedded Yocto (DEY) 5.0
-## Release 5.0-r2
+## Release 5.0-r3

 This document provides information about Digi Embedded Yocto,
 Digi International's professional embedded Yocto development environment.
@ -114,11 +114,15 @@ Documentation is available online at https://www.digi.com/resources/documentatio

 # Downloads

-* Demo images: https://ftp1.digi.com/support/digiembeddedyocto/5.0/r2/images/
-* Software Development Kit (SDK): https://ftp1.digi.com/support/digiembeddedyocto/5.0/r2/sdk/
+* Demo images: https://ftp1.digi.com/support/digiembeddedyocto/5.0/r3/images/
+* Software Development Kit (SDK): https://ftp1.digi.com/support/digiembeddedyocto/5.0/r3/sdk/

 # Release Changelog

+## 5.0-r3
+
+TODO
+
 ## 5.0-r2

 * ST-based platforms
--- a/meta-digi-arm/classes/fsl-eula-graphics.bbclass
+++ b/meta-digi-arm/classes/fsl-eula-graphics.bbclass
@ -1,9 +1,11 @@
 # fsl-eula-graphics.bbclass extends the naming scheme in fsl-eula.bbclass
 # to allow for graphics-backend-specific archives.
+IMX_PACKAGE_NAME:append:class-target = "${IMX_PACKAGE_NAME_APPEND}${IMX_PACKAGE_NAME_APPEND_MALI}"
+SRC_URI_NAME:append:class-target     = "${IMX_PACKAGE_NAME_APPEND}${IMX_PACKAGE_NAME_APPEND_MALI}"
 IMX_PACKAGE_NAME_APPEND = ""
 IMX_PACKAGE_NAME_APPEND:class-target = \
    "${@bb.utils.contains('DISTRO_FEATURES', 'wayland', '-wayland', \
        bb.utils.contains('DISTRO_FEATURES',     'x11',     '-x11', \
                                                             '-fb', d), d)}"
-IMX_PACKAGE_NAME:append:class-target = "${IMX_PACKAGE_NAME_APPEND}"
-SRC_URI_NAME:append:class-target     = "${IMX_PACKAGE_NAME_APPEND}"
+IMX_PACKAGE_NAME_APPEND_MALI              = ""
+IMX_PACKAGE_NAME_APPEND_MALI:mx95-nxp-bsp = "-mali"
--- a/meta-digi-arm/classes/image_types_digi.bbclass
+++ b/meta-digi-arm/classes/image_types_digi.bbclass
@ -3,7 +3,8 @@ inherit image_types
 ################################################################################
 #                                 BOOT IMAGES                                  #
 ################################################################################
-BOOTLOADER_IMAGE_RECIPE ?= "u-boot"
+# Boot partition size in KiB, (default 64MiB)
+BOARD_BOOTIMAGE_PARTITION_SIZE ?= "65536"

 def TRUSTFENCE_BOOTIMAGE_DEPENDS(d):
    tf_initramfs = d.getVar('TRUSTFENCE_INITRAMFS_IMAGE') or ""
@ -13,7 +14,7 @@ do_image_boot_vfat[depends] += " \
    coreutils-native:do_populate_sysroot \
    dosfstools-native:do_populate_sysroot \
    mtools-native:do_populate_sysroot \
-    ${BOOTLOADER_IMAGE_RECIPE}:do_deploy \
+    virtual/bootloader:do_deploy \
    virtual/kernel:do_deploy \
    ${@TRUSTFENCE_BOOTIMAGE_DEPENDS(d)} \
 "
@ -82,7 +83,7 @@ do_image_boot_vfat[imgsuffix] = "."

 do_image_boot_ubifs[depends] += " \
    mtd-utils-native:do_populate_sysroot \
-    ${BOOTLOADER_IMAGE_RECIPE}:do_deploy \
+    virtual/bootloader:do_deploy \
    virtual/kernel:do_deploy \
    ${@TRUSTFENCE_BOOTIMAGE_DEPENDS(d)} \
 "
@ -161,7 +162,7 @@ IMAGE_TYPEDEP:recovery.vfat = "boot.vfat"

 do_image_recovery_ubifs[depends] += " \
    mtd-utils-native:do_populate_sysroot \
-    ${BOOTLOADER_IMAGE_RECIPE}:do_deploy \
+    virtual/bootloader:do_deploy \
    virtual/kernel:do_deploy \
    ${RECOVERY_INITRAMFS_IMAGE}:do_image_complete \
 "
@ -229,10 +230,10 @@ trustence_sign_cpio() {
 	#
 	if [ "${TRUSTFENCE_SIGN_ARTIFACTS}" = "1" ] && [ "${TRUSTFENCE_SIGN_FIT_NXP}" = "0" ]; then
 		# Set environment variables for trustfence configuration
-		export CONFIG_SIGN_KEYS_PATH="${TRUSTFENCE_SIGN_KEYS_PATH}"
+		export CONFIG_SIGN_KEYS_PATH="${TRUSTFENCE_KEYS_PATH}"
 		[ -n "${TRUSTFENCE_KEY_INDEX}" ] && export CONFIG_KEY_INDEX="${TRUSTFENCE_KEY_INDEX}"
 		[ -n "${TRUSTFENCE_SRK_REVOKE_MASK}" ] && export SRK_REVOKE_MASK="${TRUSTFENCE_SRK_REVOKE_MASK}"
-		[ -n "${TRUSTFENCE_DEK_PATH}" ] && [ "${TRUSTFENCE_DEK_PATH}" != "0" ] && export CONFIG_DEK_PATH="${TRUSTFENCE_DEK_PATH}"
+		[ "${TRUSTFENCE_ENCRYPT}" = "1" ] && export CONFIG_DEK_PATH="${TRUSTFENCE_KEYS_PATH}/${TRUSTFENCE_DEK_ENCRYPT_KEYNAME}"
 		# Sign/encrypt the ramdisk
 		trustfence-sign-artifact.sh -p "${DIGI_SOM}" -i "${1}" "${1}.tf"
 	else
@ -251,7 +252,7 @@ IMAGE_TYPES += "cpio.gz.u-boot.tf"
 do_image_squashfs[postfuncs] += "${@oe.utils.vartrue('TRUSTFENCE_SIGN_ARTIFACTS', 'rootfs_sign', '', d)}"
 rootfs_sign() {
 	# Set environment variables for trustfence configuration
-	export CONFIG_SIGN_KEYS_PATH="${TRUSTFENCE_SIGN_KEYS_PATH}"
+	export CONFIG_SIGN_KEYS_PATH="${TRUSTFENCE_KEYS_PATH}"
 	[ -n "${CONFIG_KEY_INDEX}" ] && export CONFIG_KEY_INDEX="${TRUSTFENCE_KEY_INDEX}"

 	ROOTFS_IMAGE="${IMGDEPLOYDIR}/${IMAGE_NAME}.squashfs"
@ -262,96 +263,4 @@ rootfs_sign() {
 }
 rootfs_sign[dirs] = "${DEPLOY_DIR_IMAGE}"

-do_image_squashfs[vardeps] += "TRUSTFENCE_SIGN_KEYS_PATH TRUSTFENCE_KEY_INDEX"
-
-################################################################################
-#                                SDCARD IMAGES                                 #
-################################################################################
-# Set alignment to 4MB [in KiB]
-IMAGE_ROOTFS_ALIGNMENT = "4096"
-
-# Boot partition size in KiB, (default 64MiB)
-BOARD_BOOTIMAGE_PARTITION_SIZE ??= "65536"
-
-# SD card image name
-SDIMG = "${IMGDEPLOYDIR}/${IMAGE_NAME}.sdcard"
-
-BOOTLOADER_SEEK_USERDATA ?= "1"
-
-SDIMG_BOOTLOADER ?= "${DEPLOY_DIR_IMAGE}/${UBOOT_SYMLINK}"
-SDIMG_BOOTFS_TYPE ?= "boot.vfat"
-SDIMG_BOOTFS = "${IMGDEPLOYDIR}/${IMAGE_NAME}.${SDIMG_BOOTFS_TYPE}"
-SDIMG_ROOTFS_TYPE ?= "ext4"
-SDIMG_ROOTFS = "${IMGDEPLOYDIR}/${IMAGE_NAME}.${SDIMG_ROOTFS_TYPE}"
-
-do_image_sdcard[depends] = " \
-    dosfstools-native:do_populate_sysroot \
-    mtools-native:do_populate_sysroot \
-    parted-native:do_populate_sysroot \
-    ${BOOTLOADER_IMAGE_RECIPE}:do_deploy \
-    virtual/kernel:do_deploy \
-"
-
-#
-# Create an image that can be written onto an SD card using dd.
-#
-# The disk layout used is:
-#
-#   1. Not partitioned  : reserved for bootloader (u-boot)
-#   2. BOOT PARTITION   : kernel and device tree blobs
-#   3. ROOTFS PARTITION : rootfs
-#
-#       4MiB            BOOT_SPACE                 ROOTFS_SIZE
-#  <------------> <--------------------> <------------------------------>
-# +--------------+----------------------+--------------------------------+
-# | U-BOOT (RAW) | BOOT PARTITION (FAT) | ROOTFS PARTITION (EXT4)        |
-# +--------------+----------------------+--------------------------------+
-# ^              ^                      ^                                ^
-# |              |                      |                                |
-# 0            4MiB             4MiB + BOOT_SPACE                   SDIMG_SIZE
-#
-IMAGE_CMD:sdcard() {
-	# Align boot partition and calculate total sdcard image size
-	BOOT_SPACE_ALIGNED="$(expr \( \( ${BOARD_BOOTIMAGE_PARTITION_SIZE} + ${IMAGE_ROOTFS_ALIGNMENT} - 1 \) / ${IMAGE_ROOTFS_ALIGNMENT} \) \* ${IMAGE_ROOTFS_ALIGNMENT})"
-	SDIMG_SIZE="$(expr ${IMAGE_ROOTFS_ALIGNMENT} + ${BOOT_SPACE_ALIGNED} + $ROOTFS_SIZE)"
-
-	# Initialize sdcard image file
-	dd if=/dev/zero of=${SDIMG} bs=1024 count=0 seek=${SDIMG_SIZE}
-
-	# Create partition table, boot partition (with bootable flag) and rootfs partition (to the end of the disk)
-	parted -s ${SDIMG} mklabel msdos
-	parted -s ${SDIMG} unit KiB mkpart primary fat32 ${IMAGE_ROOTFS_ALIGNMENT} $(expr ${IMAGE_ROOTFS_ALIGNMENT} \+ ${BOOT_SPACE_ALIGNED})
-	parted -s ${SDIMG} set 1 boot on
-	parted -s ${SDIMG} -- unit KiB mkpart primary ext2 $(expr ${IMAGE_ROOTFS_ALIGNMENT} \+ ${BOOT_SPACE_ALIGNED}) -1s
-	parted -s ${SDIMG} unit KiB print
-
-	# Set u-boot image to flash depending on whether TRUSTFENCE_SIGN is enabled
-	if [ "${SWUPDATE_UBOOTIMG}" = "true" ]; then
-		SDIMG_BOOT="$(readlink -e ${SDIMG_BOOTLOADER})"
-	else
-		if [ "${TRUSTFENCE_SIGN}" = "1" ]; then
-			if [ "${BOOTLOADER_IMAGE_RECIPE}" = "u-boot" ]; then
-				SDIMG_BOOT="$(readlink -e ${SDIMG_BOOTLOADER} | sed -e 's,u-boot-,u-boot-signed-,g')"
-			else
-				SDIMG_BOOT="$(readlink -e ${SDIMG_BOOTLOADER} | sed -e 's,imx-boot-,imx-boot-signed-,g')"
-			fi
-		else
-			SDIMG_BOOT="$(readlink -e ${SDIMG_BOOTLOADER})"
-		fi
-	fi
-
-	# Decompress rootfs image
-	gzip -d -k ${SDIMG_ROOTFS}.gz
-
-	# Burn bootloader, boot and rootfs partitions
-	dd if=${SDIMG_BOOT} of=${SDIMG} conv=notrunc,fsync seek=${BOOTLOADER_SEEK_USERDATA} bs=1K
-	dd if=${SDIMG_BOOTFS} of=${SDIMG} conv=notrunc,fsync seek=1 bs=$(expr ${IMAGE_ROOTFS_ALIGNMENT} \* 1024)
-	dd if=${SDIMG_ROOTFS} of=${SDIMG} conv=notrunc,fsync seek=1 bs=$(expr ${IMAGE_ROOTFS_ALIGNMENT} \* 1024 + ${BOOT_SPACE_ALIGNED} \* 1024)
-
-	# Delete the decompressed rootfs image
-	rm -f ${SDIMG_ROOTFS}
-}
-
-# The sdcard image requires the boot and rootfs images to be built before
-IMAGE_TYPEDEP:sdcard = "${SDIMG_BOOTFS_TYPE} ${SDIMG_ROOTFS_TYPE}.gz"
-
+do_image_squashfs[vardeps] += "TRUSTFENCE_KEYS_PATH TRUSTFENCE_KEY_INDEX"
--- a/meta-digi-arm/conf/layer.conf
+++ b/meta-digi-arm/conf/layer.conf
@ -10,6 +10,8 @@ BBFILE_PATTERN_digi-arm := "^${LAYERDIR}/"
 BBFILE_PRIORITY_digi-arm = "5"

 BBFILES_DYNAMIC += " \
+    arm-toolchain:${LAYERDIR}/dynamic-layers/arm-toolchain/*/*/*.bb \
+    arm-toolchain:${LAYERDIR}/dynamic-layers/arm-toolchain/*/*/*.bbappend \
    freescale-layer:${LAYERDIR}/dynamic-layers/freescale-layer/*/*/*.bb \
    freescale-layer:${LAYERDIR}/dynamic-layers/freescale-layer/*/*/*.bbappend \
    stm-st-stm32mp:${LAYERDIR}/dynamic-layers/stm-st-stm32mp/*/*/*.bb \
@ -52,9 +54,7 @@ BBMASK += " \
 # Tweak x-linux-ai dependencies to use ST's machine learning packages
 LAYERDEPENDS_x-linux-ai:remove = "st-openstlinux"
 BBMASK += " \
-    meta-st-x-linux-ai/recipes-st/images/st-image-ai-npu-userfs.bb \
-    meta-st-x-linux-ai/recipes-st/images/st-image-ai-npu.bb \
-    meta-st-x-linux-ai/recipes-st/images/st-image-ai-cpu.bb \
+    meta-st-x-linux-ai/recipes-st/images/st-image-ai.bb \
 "

 # Digi's General and Open Source license agreements
--- a/meta-digi-arm/conf/machine/ccimx6qpsbc.conf
+++ b/meta-digi-arm/conf/machine/ccimx6qpsbc.conf
@ -31,9 +31,9 @@ UBOOT_INSTALL_USB_INDEX = "0"
 UBOOT_INSTALL_SD_INDEX = "1"

 KERNEL_DEVICETREE ?= " \
-    imx6qp-ccimx6qpsbc.dtb \
-    imx6qp-ccimx6qpsbc-id160.dtb \
-    imx6qp-ccimx6qpsbc-wb.dtb \
+    digi/imx6qp-ccimx6qpsbc.dtb \
+    digi/imx6qp-ccimx6qpsbc-id160.dtb \
+    digi/imx6qp-ccimx6qpsbc-wb.dtb \
 "

 SERIAL_CONSOLES ?= "115200;ttymxc3"
--- a/meta-digi-arm/conf/machine/ccimx6sbc.conf
+++ b/meta-digi-arm/conf/machine/ccimx6sbc.conf
@ -29,16 +29,16 @@ UBOOT_INSTALL_USB_INDEX = "0"
 UBOOT_INSTALL_SD_INDEX = "1"

 KERNEL_DEVICETREE ?= " \
-    imx6dl-ccimx6sbc.dtb \
-    imx6dl-ccimx6sbc-w.dtb \
-    imx6dl-ccimx6sbc-wb.dtb \
-    imx6q-ccimx6sbc.dtb \
-    imx6q-ccimx6sbc-w.dtb \
-    imx6q-ccimx6sbc-wb.dtb \
-    imx6q-ccimx6sbc-wb-ldo-bypass.dtb \
-    imx6q-ccimx6sbc-id129.dtb \
-    imx6q-ccimx6sbc-id130.dtb \
-    imx6dl-ccimx6sbc-id131.dtb \
+    digi/imx6dl-ccimx6sbc.dtb \
+    digi/imx6dl-ccimx6sbc-w.dtb \
+    digi/imx6dl-ccimx6sbc-wb.dtb \
+    digi/imx6q-ccimx6sbc.dtb \
+    digi/imx6q-ccimx6sbc-w.dtb \
+    digi/imx6q-ccimx6sbc-wb.dtb \
+    digi/imx6q-ccimx6sbc-wb-ldo-bypass.dtb \
+    digi/imx6q-ccimx6sbc-id129.dtb \
+    digi/imx6q-ccimx6sbc-id130.dtb \
+    digi/imx6dl-ccimx6sbc-id131.dtb \
 "

 SERIAL_CONSOLES ?= "115200;ttymxc3"
--- a/meta-digi-arm/conf/machine/ccimx8mm-dvk.conf
+++ b/meta-digi-arm/conf/machine/ccimx8mm-dvk.conf
@ -8,13 +8,9 @@ MACHINEOVERRIDES =. "mx8:mx8m:mx8mm:${DIGI_FAMILY}:${DIGI_SOM}:"
 # Include the machine configuration for Digi's ConnectCore 8M module.
 include conf/machine/include/ccimx8m.inc

-BOOTLOADER_SEEK_USERDATA = "33"
 BOOTLOADER_SEEK_BOOTPART = "33"

 # U-Boot configurations
-#
-# At the moment config label should be "machine" because SDIMG_BOOTLOADER
-# expects a boot artifact named after machine to create the sdcard image.
 UBOOT_CONFIG ??= "ccimx8mm-dvk"
 UBOOT_CONFIG[ccimx8mm-dvk] = "ccimx8mm_dvk_defconfig"
 SPL_BINARY = "spl/u-boot-spl.bin"
@ -29,6 +25,7 @@ UBOOT_INSTALL_SD_INDEX = "1"

 ATF_PLATFORM = "imx8mm"
 IMX_BOOT_SOC_TARGET = "iMX8MM"
+IMX_BOOT_SEEK = "33"

 KERNEL_DEVICETREE ?= " \
    digi/ccimx8m_bt.dtbo \
--- a/meta-digi-arm/conf/machine/ccimx8mn-dvk.conf
+++ b/meta-digi-arm/conf/machine/ccimx8mn-dvk.conf
@ -8,12 +8,7 @@ MACHINEOVERRIDES =. "mx8:mx8m:mx8mn:${DIGI_FAMILY}:${DIGI_SOM}:"
 # Include the machine configuration for Digi's ConnectCore 8M module.
 include conf/machine/include/ccimx8m.inc

-BOOTLOADER_SEEK_USERDATA = "32"
-
 # U-Boot configurations
-#
-# At the moment config label should be "machine" because SDIMG_BOOTLOADER
-# expects a boot artifact named after machine to create the sdcard image.
 UBOOT_CONFIG ??= "ccimx8mn-dvk"
 UBOOT_CONFIG[ccimx8mn-dvk] = "ccimx8mn_dvk_defconfig"
 SPL_BINARY = "spl/u-boot-spl.bin"
@ -28,6 +23,7 @@ UBOOT_INSTALL_SD_INDEX = "1"

 ATF_PLATFORM = "imx8mn"
 IMX_BOOT_SOC_TARGET = "iMX8MN"
+IMX_BOOT_SEEK = "32"

 KERNEL_DEVICETREE ?= " \
    digi/ccimx8m_bt.dtbo \
--- a/meta-digi-arm/conf/machine/ccimx91-dvk.conf
+++ b/meta-digi-arm/conf/machine/ccimx91-dvk.conf
@ -8,8 +8,6 @@ MACHINEOVERRIDES =. "mx91:${DIGI_FAMILY}:${DIGI_SOM}:"
 # Include the machine configuration for Digi's ConnectCore 9 module
 include conf/machine/include/ccimx9.inc

-IMXBOOT_TARGETS = "flash_singleboot"
-
 # U-Boot configurations
 UBOOT_CONFIG ??= "ccimx91-dvk"
 UBOOT_CONFIG[ccimx91-dvk] = "ccimx91-dvk_defconfig"
@ -25,7 +23,12 @@ IMX_BOOT_SOC_TARGET = "iMX91"
 IMXBOOT_TARGETS = "flash_singleboot"
 SECO_FIRMWARE_NAME:ccimx91 = "mx91a0-ahab-container.img"

-BOOTLOADER_SEEK_USERDATA = "32"
+DDR_FIRMWARE_NAME = " \
+    lpddr4_dmem_1d_v202201.bin \
+    lpddr4_dmem_2d_v202201.bin \
+    lpddr4_imem_1d_v202201.bin \
+    lpddr4_imem_2d_v202201.bin \
+"

 KERNEL_DEVICETREE ?= " \
    digi/ccimx91-dvk.dtb \
@ -39,6 +42,9 @@ KERNEL_DEVICETREE ?= " \
 "
 FIT_CONF_DEFAULT_DTB = "ccimx91-dvk.dtb"

+# Per-machine DISTRO_FEATURES customization
+MACHINE_DISTRO_FEATURES_REMOVE = "gstreamer opengl vulkan wayland x11"
+
 # Default image for install scripts
 DEFAULT_IMAGE_NAME ?= "core-image-base"

--- a/meta-digi-arm/conf/machine/ccimx93-dvk.conf
+++ b/meta-digi-arm/conf/machine/ccimx93-dvk.conf
@ -25,6 +25,13 @@ IMXBOOT_TARGETS = "flash_singleboot flash_singleboot_a0"
 # one in "use-imx-security-controller-firmware.bbclass" takes precedence)
 SECO_FIRMWARE_NAME:ccimx93 = "mx93??-ahab-container.img"

+DDR_FIRMWARE_NAME = " \
+    lpddr4_dmem_1d_v202201.bin \
+    lpddr4_dmem_2d_v202201.bin \
+    lpddr4_imem_1d_v202201.bin \
+    lpddr4_imem_2d_v202201.bin \
+"
+
 KERNEL_DEVICETREE ?= " \
    digi/ccimx9_bt-dtm.dtbo \
    digi/ccimx9_bt.dtbo \
@ -42,15 +49,12 @@ KERNEL_DEVICETREE ?= " \
 "
 FIT_CONF_DEFAULT_DTB = "ccimx93-dvk.dtb"

+# Per-machine DISTRO_FEATURES customization
+MACHINE_DISTRO_FEATURES_REMOVE = "vulkan"
+
 # Add additional firmware
 MACHINE_FIRMWARE:append = " ethos-u-firmware"

-IMAGE_BOOT_FILES:append:use-nxp-bsp = " \
-    imx93_m33_TCM_rpmsg_lite_pingpong_rtos_linux_remote.bin \
-    imx93_m33_TCM_rpmsg_lite_str_echo_rtos.bin \
-"
-WKS_FILE_DEPENDS:append = " imx-m33-demos"
-
 # Boot artifacts to be copied from the deploy dir to the installer ZIP
 BOOTABLE_ARTIFACTS = " \
    imx-boot##SIGNED##-ccimx93-dvk.bin \
--- a/meta-digi-arm/conf/machine/ccimx95-dvk.conf
+++ b/meta-digi-arm/conf/machine/ccimx95-dvk.conf
@ -0,0 +1,58 @@
+#@TYPE: Machine
+#@NAME: ConnectCore 95 Development Kit
+#@DESCRIPTION: Machine configuration for Digi's ConnectCore 95 DVK
+
+DIGI_SOM = "ccimx95"
+MACHINEOVERRIDES =. "mx95:${DIGI_FAMILY}:${DIGI_SOM}:"
+
+# Include the machine configuration for Digi's ConnectCore 9 module
+include conf/machine/include/ccimx9.inc
+
+# U-Boot configurations
+UBOOT_CONFIG ??= "ccimx95-dvk"
+UBOOT_CONFIG[ccimx95-dvk] = "ccimx95-dvk_defconfig"
+
+# Index of USB device for installer
+UBOOT_INSTALL_USB_INDEX = "0"
+# Index of microSD device for installer
+UBOOT_INSTALL_SD_INDEX = "1"
+
+# imx-boot configurations
+ATF_PLATFORM = "imx95"
+IMX_BOOT_SOC_TARGET = "iMX95"
+IMXBOOT_TARGETS = "flash_all flash_a55"
+SYSTEM_MANAGER_CONFIG ?= "ccimx95dvk"
+SYSTEM_MANAGER_FIRMWARE_BASENAME ?= "m33_image"
+SYSTEM_MANAGER_FIRMWARE_NAME     ?= "${SYSTEM_MANAGER_FIRMWARE_BASENAME}-${SYSTEM_MANAGER_CONFIG}"
+
+OEI_CONFIGS = "ddr tcm"
+OEI_CORE   = "m33"
+OEI_SOC    = "mx95"
+OEI_BOARD  ?= "ccimx95"
+DDR_TYPE   ?= "lpddr5"
+
+DDR_FIRMWARE_NAME = " \
+    lpddr5_dmem_v202409.bin \
+    lpddr5_dmem_qb_v202409.bin \
+    lpddr5_imem_v202409.bin \
+    lpddr5_imem_qb_v202409.bin \
+"
+
+KERNEL_DEVICETREE ?= " \
+    digi/ccimx95-dvk.dtb \
+    digi/ccimx95-dvk_enet2.dtbo \
+    digi/ccimx95-dvk_lvds0_g101evn010.dtbo \
+    digi/ccimx95-dvk_lvds1_g101evn010.dtbo \
+    digi/ccimx95-dvk_mikroe-accel2-click.dtbo \
+    digi/ccimx95-dvk_mikroe-gyro-click.dtbo \
+    digi/ccimx95-dvk_pcam5c.dtbo \
+    digi/ccimx9_bt.dtbo \
+    digi/ccimx9_bt-dtm.dtbo \
+    digi/ccimx9_wifi.dtbo \
+"
+FIT_CONF_DEFAULT_DTB = "ccimx95-dvk.dtb"
+
+# Boot artifacts to be copied from the deploy dir to the installer ZIP
+BOOTABLE_ARTIFACTS = " \
+    imx-boot##SIGNED##-ccimx95-dvk.bin \
+"
--- a/meta-digi-arm/conf/machine/ccmp13-dvk.conf
+++ b/meta-digi-arm/conf/machine/ccmp13-dvk.conf
@ -43,6 +43,7 @@ UBOOT_INSTALL_SD_INDEX = "1"
 STM32MP_DT_FILES_NAND = "ccmp13-dvk-256MB"
 STM32MP_DT_FILES_SDCARD = "${STM32MP_DT_FILES_NAND}"
 STM32MP_DT_FILES_USB = "${STM32MP_DT_FILES_NAND}"
+STM32MP_DT_FILES_UART = "${STM32MP_DT_FILES_NAND}"

 # Extra DTB for board - need to specify it with .dtb ...
 STM32MP_KERNEL_DEVICETREE:ccmp13-dvk += " \
@ -146,6 +147,7 @@ MACHINE_DISTRO_FEATURES_REMOVE = "gstreamer opengl vulkan wayland x11"

 # Disable use of vendorfs partition
 ST_VENDORFS = "0"
+ST_USERFS   = "0"

 # Boot artifacts to be copied from the deploy dir to the installer ZIP
 BOOTABLE_ARTIFACTS = " \
--- a/meta-digi-arm/conf/machine/ccmp15-dvk.conf
+++ b/meta-digi-arm/conf/machine/ccmp15-dvk.conf
@ -43,6 +43,7 @@ UBOOT_INSTALL_SD_INDEX = "1"
 STM32MP_DT_FILES_NAND = "ccmp15-dvk-512MB ccmp15-dvk-1GB"
 STM32MP_DT_FILES_SDCARD = "${STM32MP_DT_FILES_NAND}"
 STM32MP_DT_FILES_USB = "${STM32MP_DT_FILES_NAND}"
+STM32MP_DT_FILES_UART = "${STM32MP_DT_FILES_NAND}"

 # Extra DTB for board - need to specify it with .dtb ...
 STM32MP_KERNEL_DEVICETREE:ccmp15-dvk += " \
@ -75,8 +76,8 @@ FIT_CONF_DEFAULT_DTB = "ccmp157-dvk.dtb"
 OPTEE_DEVICETREE_optee = "${STM32MP_DEVICETREE}"
 OPTEE_DEVICETREE_opteemin = "${STM32MP_DEVICETREE}"
 # Supported boot schemes
-BOOTSCHEME_LABELS ?= "opteemin"
-BOOTSCHEME_DEFAULT ?= "opteemin"
+BOOTSCHEME_LABELS ?= "optee"
+BOOTSCHEME_DEFAULT ?= "optee"

 # =========================================================================
 # Machine features
--- a/meta-digi-arm/conf/machine/ccmp25-dvk.conf
+++ b/meta-digi-arm/conf/machine/ccmp25-dvk.conf
@ -78,7 +78,6 @@ MACHINE_FEATURES += "splashscreen"
 MACHINE_FEATURES += "watchdog"
 MACHINE_FEATURES += "bluetooth"
 MACHINE_FEATURES += "wifi"
-MACHINE_FEATURES += "usbg0"

 # GPU
 MACHINE_FEATURES += "${@'gpu' if d.getVar('ACCEPT_EULA_'+d.getVar('MACHINE')) == '1' else ''}"
@ -134,11 +133,15 @@ ST_USERFS   = "0"

 # Boot artifacts to be copied from the deploy dir to the installer ZIP
 BOOTABLE_ARTIFACTS = " \
-    ${@oe.utils.ifelse(d.getVar('TRUSTFENCE_SIGN') == '1', 'tf-a-ccmp25-dvk-optee-emmc${SIGN_SUFFIX}.stm32', \
-                                                           'tf-a-ccmp25-dvk-optee-emmc.stm32')} \
+    ${@oe.utils.ifelse(d.getVar('TRUSTFENCE_SIGN') == '1', \
+        oe.utils.ifelse(d.getVar('TRUSTFENCE_ENCRYPT') == '0', 'tf-a-ccmp25-dvk-optee-emmc${SIGN_SUFFIX}.stm32', \
+                                                               'tf-a-ccmp25-dvk-optee-emmc${ENCRYPT_SUFFIX}${SIGN_SUFFIX}.stm32'), \
+        'tf-a-ccmp25-dvk-optee-emmc.stm32')} \
    metadata-ccmp25-dvk.bin \
-    ${@oe.utils.ifelse(d.getVar('TRUSTFENCE_SIGN') == '1', 'fip-ccmp25-dvk-optee-emmc${SIGN_SUFFIX}.bin', \
-                                                           'fip-ccmp25-dvk-optee-emmc.bin')} \
+    ${@oe.utils.ifelse(d.getVar('TRUSTFENCE_SIGN') == '1', \
+        oe.utils.ifelse(d.getVar('TRUSTFENCE_ENCRYPT') == '0', 'fip-ccmp25-dvk-optee-emmc${SIGN_SUFFIX}.bin', \
+                                                               'fip-ccmp25-dvk-optee-emmc${ENCRYPT_SUFFIX}${SIGN_SUFFIX}.bin'), \
+        'fip-ccmp25-dvk-optee-emmc.bin')} \
 "

 # Per-machine DISTRO_FEATURES customization
--- a/meta-digi-arm/conf/machine/include/ccimx6.inc
+++ b/meta-digi-arm/conf/machine/include/ccimx6.inc
@ -13,8 +13,6 @@ BOOTLOADER_SEEK_BOOTPART = "1"
 # Platform u-boot settings
 UBOOT_PREFIX = "u-boot"
 UBOOT_SUFFIX = "imx"
-BOOTABLE_FILENAME = "${UBOOT_PREFIX}-${MACHINE}.${UBOOT_SUFFIX}"
-SDIMG_BOOTLOADER = "${DEPLOY_DIR_IMAGE}/${BOOTABLE_FILENAME}"

 # Set InitRAMDisk load address to U-boot initramfs_addr
 UBOOT_RD_LOADADDRESS = "0x19000000"
@ -47,6 +45,10 @@ MACHINE_DISTRO_FEATURES_REMOVE = "vulkan"
 BOOTFS_EXT ?= ".boot.vfat"
 ROOTFS_EXT ?= '${@bb.utils.contains("IMAGE_FEATURES", "read-only-rootfs", ".squashfs", ".ext4.gz", d)}'

+# i.MX6 platforms use weston 10.0.5.imx, which uses the wayland-0 socket
+# instead of wayland-1
+WAYLAND_DISPLAY = "wayland-0"
+
 BOOT_DEV_NAME ?= "/dev/mmcblk0p1"
 ROOTFS_DEV_NAME ?= "/dev/mmcblk0p3"
 ROOTFS_ENC_DEV = "/dev/mapper/cryptrootfs"
--- a/meta-digi-arm/conf/machine/include/ccimx8m.inc
+++ b/meta-digi-arm/conf/machine/include/ccimx8m.inc
@ -13,9 +13,6 @@ UBOOT_SUFFIX = "bin"

 # The bootloader image that gets flashed consists of U-Boot and several fw binaries
 EXTRA_IMAGEDEPENDS += "imx-boot"
-BOOTLOADER_IMAGE_RECIPE = "imx-boot"
-BOOTABLE_FILENAME = "${UBOOT_PREFIX}-${MACHINE}.bin"
-SDIMG_BOOTLOADER = "${DEPLOY_DIR_IMAGE}/${BOOTABLE_FILENAME}"

 # Set InitRAMDisk load address to U-boot initramfs_addr
 UBOOT_RD_LOADADDRESS = "0x43800000"
--- a/meta-digi-arm/conf/machine/include/ccimx8x.inc
+++ b/meta-digi-arm/conf/machine/include/ccimx8x.inc
@ -18,11 +18,6 @@ UBOOT_RD_LOADADDRESS = "0x8A100000"

 # The bootloader image that gets flashed consists of U-Boot and several fw binaries
 EXTRA_IMAGEDEPENDS += "imx-boot"
-BOOTLOADER_IMAGE_RECIPE = "imx-boot"
-# BOOTLOADER_SEEK_USERDATA is 33 for step A of the silicon and 32 for step B
-BOOTLOADER_SEEK_USERDATA = "32"
-BOOTABLE_FILENAME = "${UBOOT_PREFIX}-${MACHINE}.bin"
-SDIMG_BOOTLOADER = "${DEPLOY_DIR_IMAGE}/${BOOTABLE_FILENAME}"

 # The original variable used by NXP to store the mkimage "REV" parameter,
 # REV_OPTION, has a format of "REV=X0". Since we are interested in building
--- a/meta-digi-arm/conf/machine/include/ccimx9.inc
+++ b/meta-digi-arm/conf/machine/include/ccimx9.inc
@ -25,17 +25,6 @@ KERNEL_IMAGETYPE:ccimx9 = "${@oe.utils.vartrue('TRUSTFENCE_SIGN_ARTIFACTS', 'fit

 # The bootloader image that gets flashed consists of U-Boot and several fw binaries
 EXTRA_IMAGEDEPENDS += "imx-boot"
-BOOTLOADER_IMAGE_RECIPE = "imx-boot"
-BOOTABLE_FILENAME = "${UBOOT_PREFIX}-${MACHINE}.bin"
-SDIMG_BOOTLOADER = "${DEPLOY_DIR_IMAGE}/${BOOTABLE_FILENAME}"
-BOOTLOADER_SEEK_USERDATA = "32"
-
-DDR_FIRMWARE_NAME = " \
-    lpddr4_dmem_1d_v202201.bin \
-    lpddr4_dmem_2d_v202201.bin \
-    lpddr4_imem_1d_v202201.bin \
-    lpddr4_imem_2d_v202201.bin \
-"

 MACHINE_FEATURES += "pci wifi bluetooth"
 MACHINE_FEATURES:append:use-nxp-bsp = " optee jailhouse"
@ -69,10 +58,6 @@ SERIAL_CONSOLES = "115200;ttyLP5"
 # Bluetooth tty
 BT_TTY ?= "ttyLP0"

-# Per-machine DISTRO_FEATURES customization
-MACHINE_DISTRO_FEATURES_REMOVE = "vulkan"
-MACHINE_DISTRO_FEATURES_REMOVE:ccimx91 = "gstreamer opengl vulkan wayland x11"
-
 # SWUpdate sw-description configuration
 BOOTFS_EXT ?= ".boot.vfat"
 ROOTFS_EXT ?= '${@bb.utils.contains("IMAGE_FEATURES", "read-only-rootfs", ".squashfs", ".ext4.gz", d)}'
--- a/meta-digi-arm/conf/machine/include/ccmp1.inc
+++ b/meta-digi-arm/conf/machine/include/ccmp1.inc
@ -39,6 +39,13 @@ UBOOT_ENV_RANGE ?= ""

 FIP_SIGN_SUFFIX ?= "${@bb.utils.contains('TRUSTFENCE_SIGN', '1', '_Signed', '', d)}"

+# =========================================================================
+# trusted-firmware-a
+# =========================================================================
+# Set custom TF-A config
+TF_A_CONFIG_ALL += " ${@bb.utils.contains('BOOTSCHEME_LABELS', 'optee', bb.utils.contains('BOOTDEVICE_LABELS', 'usb', 'optee-usb', '', d), '', d)}"
+TF_A_CONFIG_ALL += " ${@bb.utils.contains('BOOTSCHEME_LABELS', 'optee', bb.utils.contains('BOOTDEVICE_LABELS', 'uart', 'optee-uart', '', d), '', d)}"
+
 # =========================================================================
 # Kernel
 # =========================================================================
@ -97,7 +104,7 @@ IMAGE_FSTYPES:remove = "multiubi"
 WKS_FILE_DEPENDS ?= " \
    virtual/bootloader \
    virtual/trusted-firmware-a \
-    ${@bb.utils.contains('BOOTSCHEME_LABELS', 'optee', 'virtual/optee-os', '', d)} \
+    ${@bb.utils.contains('BOOTSCHEME_LABELS', 'optee', 'virtual-optee-os', '', d)} \
 "

 # Disable the generation of flashlayout files
--- a/meta-digi-arm/conf/machine/include/ccmp2.inc
+++ b/meta-digi-arm/conf/machine/include/ccmp2.inc
@ -32,6 +32,9 @@ UBOOT_DTBO_LOADADDRESS = "0x8a000000"
 # trusted-firmware-a
 # =========================================================================
 PREFERRED_PROVIDER_virtual/trusted-firmware-a = "tf-a-stm32mp"
+# Set custom TF-A config
+TF_A_CONFIG_ALL += " ${@bb.utils.contains('BOOTSCHEME_LABELS', 'optee', bb.utils.contains('BOOTDEVICE_LABELS', 'usb', 'optee-usb', '', d), '', d)}"
+

 # Set metadata settings
 DEVICE_PARTUUID_FIP_A = "1c606ef5-f1ac-43b9-9bb5-d5c578580b6b"
@ -41,7 +44,7 @@ TF_A_METADATA_TOOL_ARGS ?= "-g -i 1 -b 2 -v ${TF_A_METADATA_TOOL_VERSION} ${DEVI
 # =========================================================================
 # optee-os
 # =========================================================================
-PREFERRED_PROVIDER_virtual/optee-os = "optee-os-stm32mp"
+PREFERRED_PROVIDER_virtual-optee-os = "optee-os-stm32mp"
 # OPTEE runtime packages to install
 OPTEE_PKGS ??= "optee-client"

@ -119,7 +122,7 @@ ST_OPTEE_DEBUG_LOG_LEVEL = "1"
 WKS_FILE_DEPENDS ?= " \
    virtual/bootloader \
    virtual/trusted-firmware-a \
-    ${@bb.utils.contains('BOOTSCHEME_LABELS', 'optee', 'virtual/optee-os', '', d)} \
+    ${@bb.utils.contains('BOOTSCHEME_LABELS', 'optee', 'virtual-optee-os', '', d)} \
 "

 # Disable the generation of flashlayout files
--- a/meta-digi-arm/conf/machine/include/digi-defaults.inc
+++ b/meta-digi-arm/conf/machine/include/digi-defaults.inc
@ -10,14 +10,15 @@ PREFERRED_PROVIDER_virtual/xserver = "xserver-xorg"
 #
 # Platform      Linux              U-Boot
 # -------------------------------------------------
-# ccimx6        5.15              2017.03
-# ccimx6qp      5.15              2017.03
+# ccimx6        6.6               2024.04
+# ccimx6qp      6.6               2024.04
 # ccimx6ul      6.6               2024.04
 # ccimx8x       6.6               2024.04 (packaged in imx-boot)
 # ccimx8mn      6.6               2024.04 (packaged in imx-boot)
 # ccimx8mm      6.6               2024.04 (packaged in imx-boot)
 # ccimx91       6.6               2024.04 (packaged in imx-boot)
 # ccimx93       6.6               2024.04 (packaged in imx-boot)
+# ccimx95       6.6               2024.04 (packaged in imx-boot)
 # ccmp15        6.6               2023.10
 # ccmp13        6.6               2023.10
 # ccmp25        6.6               2023.10
@ -84,7 +85,7 @@ DEFAULT_IMAGE_NAME ??= "dey-image-qt"
 IMAGE_LINK_NAME = "${IMAGE_BASENAME}${IMAGE_MACHINE_SUFFIX}"

 # List of graphical images names (for install scripts)
-GRAPHICAL_IMAGES ?= "dey-image-qt dey-image-webkit dey-image-lvgl"
+GRAPHICAL_IMAGES ?= "dey-image-qt dey-image-webkit dey-image-lvgl dey-image-chromium"

 # Default wayland socket
 WAYLAND_DISPLAY ?= "wayland-1"
--- a/meta-digi-arm/conf/machine/include/imx-digi-base.inc
+++ b/meta-digi-arm/conf/machine/include/imx-digi-base.inc
@ -5,6 +5,8 @@ include conf/machine/include/digi-defaults.inc
 # IMX_DEFAULT_BSP = "nxp"
 # include conf/machine/include/imx-base.inc

+require conf/machine/include/utilities.inc
+
 # Machines or distros can define which BSP it should use by default. We are
 # intending to default for mainline BSP by default and specific machines or
 # DISTROs might change it if need.
@ -13,6 +15,15 @@ include conf/machine/include/digi-defaults.inc
 IMX_DEFAULT_BSP ?= "nxp"
 MACHINEOVERRIDES =. "use-${IMX_DEFAULT_BSP}-bsp:"

+# UBOOT_BINARY is used inside the wks files to dynamically find the required
+# U-Boot file.
+UBOOT_BINARY ?= "u-boot.${UBOOT_SUFFIX}"
+
+# Some SoC can utilize the boot container provided by U-Boot,
+# below variable sets that those SoC do use this rather than
+# assembling it in the imx-boot recipe.
+UBOOT_PROVIDES_BOOT_CONTAINER = "0"
+
 # Allow setting the UART used during the boot by ATF.

 # FIXME: We should return INVALID here but currently only i.MX8M has support to override the UART
@ -47,6 +58,7 @@ DEFAULTTUNE:mx8m-generic-bsp   ?= "cortexa53-crypto"
 DEFAULTTUNE:mx8x-generic-bsp   ?= "cortexa35-crypto"
 DEFAULTTUNE:mx91-generic-bsp   ?= "cortexa55"
 DEFAULTTUNE:mx93-generic-bsp   ?= "cortexa55"
+DEFAULTTUNE:mx95-generic-bsp   ?= "cortexa55"

 # DEFAULTTUNE values ported form meta-imx (fsl-imx-base.inc)
 # Set a more generic tuning for code reuse across parts
@ -54,9 +66,16 @@ DEFAULTTUNE:mx8m-nxp-bsp   ?= "armv8a-crc-crypto"
 DEFAULTTUNE:mx8x-nxp-bsp   ?= "armv8a-crc-crypto"
 DEFAULTTUNE:mx91-nxp-bsp   ?= "armv8a-crc-crypto"
 DEFAULTTUNE:mx93-nxp-bsp   ?= "armv8a-crc-crypto"
+DEFAULTTUNE:mx95-nxp-bsp   ?= "armv8a-crc-crypto"

 INHERIT += "machine-overrides-extender"

+IMX_SOC_REV                  ??= "A0"
+IMX_SOC_REV:mx93-generic-bsp ??= "A1"
+IMX_SOC_REV:mx95-generic-bsp ??= "B0"
+IMX_SOC_REV_LOWER = "${@d.getVar('IMX_SOC_REV').lower()}"
+IMX_SOC_REV_UPPER = "${@d.getVar('IMX_SOC_REV').upper()}"
+
 #######
 ### NXP BSP specific overrides
 #######
@ -68,8 +87,9 @@ MACHINEOVERRIDES_EXTENDER:mx8mn:use-nxp-bsp  = "imx-generic-bsp:imx-nxp-bsp:imxd
 MACHINEOVERRIDES_EXTENDER:mx8mp:use-nxp-bsp  = "imx-generic-bsp:imx-nxp-bsp:imxdrm:imxvpu:imxgpu:imxviv:imxgpu2d:imxgpu3d:imxvulkan:mx8-generic-bsp:mx8-nxp-bsp:mx8m-generic-bsp:mx8m-nxp-bsp:mx8mp-generic-bsp:mx8mp-nxp-bsp"
 MACHINEOVERRIDES_EXTENDER:mx8qxp:use-nxp-bsp = "imx-generic-bsp:imx-nxp-bsp:imxdrm:imxdpu:imxgpu:imxviv:imxgpu2d:imxgpu3d:imxvulkan:mx8-generic-bsp:mx8-nxp-bsp:mx8x-generic-bsp:mx8x-nxp-bsp:mx8qxp-generic-bsp:mx8qxp-nxp-bsp"
 MACHINEOVERRIDES_EXTENDER:mx8dx:use-nxp-bsp  = "imx-generic-bsp:imx-nxp-bsp:imxdrm:imxdpu:imxgpu:imxviv:imxgpu2d:imxgpu3d:imxvulkan:mx8-generic-bsp:mx8-nxp-bsp:mx8x-generic-bsp:mx8x-nxp-bsp:mx8dx-generic-bsp:mx8dx-nxp-bsp"
-MACHINEOVERRIDES_EXTENDER:mx91:use-nxp-bsp   = "imx-generic-bsp:imx-nxp-bsp:imxdrm:imxpxp:mx9-generic-bsp:mx9-nxp-bsp:mx91-generic-bsp:mx91-nxp-bsp"
+MACHINEOVERRIDES_EXTENDER:mx91:use-nxp-bsp   = "imx-generic-bsp:imx-nxp-bsp:imxdrm:mx9-generic-bsp:mx9-nxp-bsp:mx91-generic-bsp:mx91-nxp-bsp"
 MACHINEOVERRIDES_EXTENDER:mx93:use-nxp-bsp   = "imx-generic-bsp:imx-nxp-bsp:imxdrm:imxpxp:mx9-generic-bsp:mx9-nxp-bsp:mx93-generic-bsp:mx93-nxp-bsp"
+MACHINEOVERRIDES_EXTENDER:mx95:use-nxp-bsp   = "imx-generic-bsp:imx-nxp-bsp:imxdrm:imxdpu:imxgpu:imxmali:imxgpu2d:imxgpu3d:mx9-generic-bsp:mx9-nxp-bsp:mx95-generic-bsp:mx95-nxp-bsp"

 #######
 ### Mainline BSP specific overrides
@ -84,6 +104,7 @@ MACHINEOVERRIDES_EXTENDER:mx8qxp:use-mainline-bsp = "imx-generic-bsp:imx-mainlin
 MACHINEOVERRIDES_EXTENDER:mx8dx:use-mainline-bsp  = "imx-generic-bsp:imx-mainline-bsp:mx8-generic-bsp:mx8-mainline-bsp:mx8x-generic-bsp:mx8x-mainline-bsp:mx8dx-generic-bsp:mx8dx-mainline-bsp"
 MACHINEOVERRIDES_EXTENDER:mx91:use-mainline-bsp  = "imx-generic-bsp:imx-mainline-bsp:mx9-generic-bsp:mx9-mainline-bsp:mx91-generic-bsp:mx91-mainline-bsp"
 MACHINEOVERRIDES_EXTENDER:mx93:use-mainline-bsp  = "imx-generic-bsp:imx-mainline-bsp:mx9-generic-bsp:mx9-mainline-bsp:mx93-generic-bsp:mx93-mainline-bsp"
+MACHINEOVERRIDES_EXTENDER:mx95:use-mainline-bsp  = "imx-generic-bsp:imx-mainline-bsp:mx9-generic-bsp:mx9-mainline-bsp:mx95-generic-bsp:mx95-mainline-bsp"

 MACHINEOVERRIDES_EXTENDER_FILTER_OUT = " \
    mx6 \
@ -114,6 +135,7 @@ MACHINEOVERRIDES_EXTENDER_FILTER_OUT = " \
    mx8dxl \
    mx91 \
    mx93 \
+    mx95 \
 "

 MACHINEOVERRIDES_FILTERED_OUT_QA_ERROR = "%s overrides cannot be used and need conversion to use the new BSP-specific overrides. Check 'meta-freescale/scripts/convert-bsp-specific-overrides'."
@ -130,6 +152,7 @@ MACHINE_SOCARCH_SUFFIX:mx8qxp-nxp-bsp = "-mx8"
 MACHINE_SOCARCH_SUFFIX:mx8dx-nxp-bsp  = "-mx8"
 MACHINE_SOCARCH_SUFFIX:mx91-nxp-bsp = "-mx91"
 MACHINE_SOCARCH_SUFFIX:mx93-nxp-bsp = "-mx93"
+MACHINE_SOCARCH_SUFFIX:mx95-nxp-bsp = "-mx95"

 # For Mainline we use a single SoC suffix as we don't have different build options
 MACHINE_SOCARCH_SUFFIX:imx-mainline-bsp = "-imx"
@ -207,6 +230,9 @@ IMX_EXTRA_FIRMWARE:mx8m-generic-bsp   = "imx-boot-firmware-files"
 IMX_EXTRA_FIRMWARE:mx8x-generic-bsp   = "imx-sc-firmware imx-seco"
 IMX_EXTRA_FIRMWARE:mx91-generic-bsp   = "imx-boot-firmware-files firmware-ele-imx"
 IMX_EXTRA_FIRMWARE:mx93-generic-bsp   = "imx-boot-firmware-files firmware-ele-imx"
+PREFERRED_PROVIDER_virtual/imx-system-manager ??= "imx-system-manager"
+PREFERRED_PROVIDER_virtual/imx-oei ??= "imx-oei"
+IMX_EXTRA_FIRMWARE:mx95-generic-bsp   = "imx-boot-firmware-files firmware-ele-imx virtual/imx-system-manager virtual/imx-oei"

 # Firmware
 MACHINE_FIRMWARE ?= ""
@ -217,6 +243,7 @@ MACHINE_FIRMWARE:append:mx8mm-generic-bsp    = " firmware-imx-sdma-imx7d"
 MACHINE_FIRMWARE:append:mx8mn-generic-bsp    = " firmware-imx-sdma-imx7d firmware-imx-easrc-imx8mn"
 MACHINE_FIRMWARE:append:mx8qxp-generic-bsp   = " firmware-imx-sdma-imx7d firmware-imx-vpu-amphion"
 MACHINE_FIRMWARE:append:mx8dx-generic-bsp    = " firmware-imx-sdma-imx7d firmware-imx-vpu-amphion"
+MACHINE_FIRMWARE:append:mx95-generic-bsp     = " firmware-imx-vpu-wave"

 MACHINE_EXTRA_RRECOMMENDS += "${MACHINE_FIRMWARE}"

@ -228,7 +255,8 @@ MACHINE_EXTRA_RRECOMMENDS:append:mx8-nxp-bsp = " ${@bb.utils.contains('DISTRO_FE
 MACHINE_EXTRA_RRECOMMENDS:append:mx9-nxp-bsp = " ${@bb.utils.contains('DISTRO_FEATURES', 'alsa', '${IMX_ALSA_EXTRA}', '', d)}"

 # ELE extra Firmware
-SECOEXT_FIRMWARE_NAME ?= "UNDEFINED"
+SECOEXT_FIRMWARE_NAME ?= ""
+SECOEXT_FIRMWARE_NAME:mx95-generic-bsp ?= "mx95a0runtime-ahab-container.img mx95b0runtime-ahab-container.img"

 # GStreamer 1.0 plugins
 MACHINE_GSTREAMER_1_0_PLUGIN               ?= ""
@ -260,6 +288,9 @@ PREFERRED_VERSION_gstreamer1.0-vaapi:imx-nxp-bsp        ??= "1.24.0.imx"
 # GStreamer downgrade ffmpeg
 PREFERRED_VERSION_ffmpeg:imx-nxp-bsp ??= "4.4.1"

+# Use newer libvpx from 'meta-oe' (otherwise uses older from 'meta-webkit)
+PREFERRED_VERSION_libvpx:imx-nxp-bsp ??= "1.14.0"
+
 # Determines if the SoC has support for Vivante kernel driver
 SOC_HAS_VIVANTE_KERNEL_DRIVER_SUPPORT        = "0"
 SOC_HAS_VIVANTE_KERNEL_DRIVER_SUPPORT:imxgpu = "1"
@ -269,27 +300,28 @@ SOC_HAS_VIVANTE_KERNEL_DRIVER_SUPPORT:imxgpu = "1"
 #   1 - machine has Vivante GPU driver support
 MACHINE_HAS_VIVANTE_KERNEL_DRIVER_SUPPORT ?= "${SOC_HAS_VIVANTE_KERNEL_DRIVER_SUPPORT}"

-# Graphics libraries
-PREFERRED_PROVIDER_virtual/egl      ?= "mesa"
-PREFERRED_PROVIDER_virtual/libgl    ?= "mesa"
-PREFERRED_PROVIDER_virtual/libgles1 ?= "mesa"
-PREFERRED_PROVIDER_virtual/libgles2 ?= "mesa"
+# Override graphics for i.MX GPU
+IMXGPU_GRAPHICS_PROVIDER:imxviv  ?= "imx-gpu-viv"
+IMXGPU_GRAPHICS_PROVIDER:imxmali ?= "mali-imx"

-PREFERRED_PROVIDER_virtual/egl:imxgpu        ?= "imx-gpu-viv"
+PREFERRED_PROVIDER_virtual/egl:imxgpu        ?= "${IMXGPU_GRAPHICS_PROVIDER}"
 PREFERRED_PROVIDER_virtual/libgl:imxgpu      ?= "mesa-gl"
 PREFERRED_PROVIDER_virtual/mesa:imxgpu       ?= "mesa-gl"
-PREFERRED_PROVIDER_virtual/libgles1:imxgpu3d ?= "imx-gpu-viv"
-PREFERRED_PROVIDER_virtual/libgles2:imxgpu3d ?= "imx-gpu-viv"
-PREFERRED_PROVIDER_virtual/libgles3:imxgpu3d ?= "imx-gpu-viv"
+PREFERRED_PROVIDER_virtual/libgles1:imxgpu3d ?= "${IMXGPU_GRAPHICS_PROVIDER}"
+PREFERRED_PROVIDER_virtual/libgles2:imxgpu3d ?= "${IMXGPU_GRAPHICS_PROVIDER}"
+PREFERRED_PROVIDER_virtual/libgles3:imxgpu3d ?= "${IMXGPU_GRAPHICS_PROVIDER}"
+
+# The Vivante OpenCL implementation doesn't work with the standard headers and loader
+PREFERRED_PROVIDER_opencl-clhpp:imxviv         ?= "imx-gpu-viv"
+PREFERRED_PROVIDER_opencl-headers:imxviv       ?= "imx-gpu-viv"
+PREFERRED_PROVIDER_opencl-icd-loader:imxviv    ?= "imx-gpu-viv"
+PREFERRED_PROVIDER_virtual/opencl-icd:imxviv   ?= "imx-gpu-viv"
+
 PREFERRED_PROVIDER_virtual/libg2d            ?= "imx-gpu-g2d"
 PREFERRED_PROVIDER_virtual/libg2d:imxdpu     ?= "imx-dpu-g2d"
 PREFERRED_PROVIDER_virtual/libg2d:mx93-nxp-bsp ?= "imx-pxp-g2d"
-PREFERRED_PROVIDER_opencl-clhpp:imxgpu       ?= "imx-gpu-viv"
-PREFERRED_PROVIDER_opencl-headers:imxgpu     ?= "imx-gpu-viv"
-PREFERRED_PROVIDER_opencl-icd-loader:imxgpu  ?= "imx-gpu-viv"
-PREFERRED_PROVIDER_virtual/opencl-icd:imxgpu ?= "imx-gpu-viv"

-PREFERRED_VERSION_weston:imx-nxp-bsp      ??= "12.0.4.imx"
+PREFERRED_VERSION_weston:imx-nxp-bsp      ??= "12.0.5.imx"
 # i.MX 6 & 7 stay on weston 10.0 for fbdev
 PREFERRED_VERSION_weston:mx6-nxp-bsp      ??= "10.0.5.imx"
 PREFERRED_VERSION_weston:mx7-nxp-bsp      ??= "10.0.5.imx"
@ -315,6 +347,10 @@ PREFERRED_VERSION_optee-client:mx9-nxp-bsp ??= "4.4.0.imx"
 PREFERRED_VERSION_optee-test:mx8-nxp-bsp   ??= "4.4.0.imx"
 PREFERRED_VERSION_optee-test:mx9-nxp-bsp   ??= "4.4.0.imx"

+# Firmware from NXP's "lf-6.6.52-2.2.1" release
+PREFERRED_VERSION_firmware-imx:imx-nxp-bsp ??= "8.26.1"
+PREFERRED_VERSION_imx-boot-firmware-files:imx-nxp-bsp ??= "8.26.1"
+
 # Optee runtime packages to install
 OPTEE_PKGS ??= "optee-client optee-os"

@ -324,6 +360,28 @@ PREFERRED_VERSION_opencv:mx9-nxp-bsp ??= "4.10.0.imx"

 EXTRA_IMAGEDEPENDS += "u-boot"

+# Do not update fstab file when using wic images
+WIC_CREATE_EXTRA_ARGS ?= "--no-fstab-update"
+
+IMAGE_BOOT_FILES ?= " \
+    ${KERNEL_IMAGETYPE}-${MACHINE}.bin \
+    ${@bb.utils.contains('KERNEL_IMAGETYPE', 'fitImage', '', '${@make_dtb_boot_files(d)} boot.scr', d)} \
+"
+
+WKS_FILE_DEPENDS ?= " \
+    virtual/bootloader \
+    e2fsprogs-native \
+    bmaptool-native \
+"
+WKS_FILE_DEPENDS:append:mx8-nxp-bsp = " imx-boot"
+WKS_FILE_DEPENDS:append:mx9-nxp-bsp = " imx-boot"
+
+SOC_DEFAULT_WKS_FILE                 ?= "imx-uboot-bootpart.wks.in"
+SOC_DEFAULT_WKS_FILE:mx8-generic-bsp ?= "imx-imx-boot-bootpart.wks.in"
+SOC_DEFAULT_WKS_FILE:mx9-generic-bsp ?= "imx-imx-boot-bootpart.wks.in"
+
+WKS_FILE ?= "${SOC_DEFAULT_WKS_FILE}"
+
 KERNEL_IMAGETYPE = "zImage"
 KERNEL_IMAGETYPE:aarch64 = "Image.gz"

@ -332,8 +390,4 @@ MACHINE_FEATURES = "usbgadget usbhost vfat alsa touchscreen screen"
 # IMX specific udev extra rules added when device manager is systemd/udev
 UDEV_EXTRA_RULES:append = " udev-rules-imx"

-# U-Boot 2017.X requires a specific dtc version.
-PREFERRED_VERSION_dtc-native:ccimx6 ?= "1.4.5"
-PREFERRED_VERSION_nativesdk-dtc:ccimx6 ?= "1.4.5"
-
 DEY_SOC_VENDOR = "NXP"
--- a/meta-digi-arm/conf/templates/ccimx6qpsbc/conf-notes.txt
+++ b/meta-digi-arm/conf/templates/ccimx6qpsbc/conf-notes.txt
@ -12,5 +12,4 @@ Digi Embedded Yocto provides the following image recipes:

  * dey-image-lvgl: graphical LVGL image

-    By default the image is XWayland-based so it provides a full Weston
-    desktop environment.
+    A framebuffer-based image including an LVGL demo application.
--- a/meta-digi-arm/conf/templates/ccimx6sbc/conf-notes.txt
+++ b/meta-digi-arm/conf/templates/ccimx6sbc/conf-notes.txt
@ -12,5 +12,4 @@ Digi Embedded Yocto provides the following image recipes:

  * dey-image-lvgl: graphical LVGL image

-    By default the image is XWayland-based so it provides a full Weston
-    desktop environment.
+    A framebuffer-based image including an LVGL demo application.
--- a/meta-digi-arm/conf/templates/ccimx6ulsbc/bblayers.conf.sample
+++ b/meta-digi-arm/conf/templates/ccimx6ulsbc/bblayers.conf.sample
@ -13,7 +13,7 @@ BBLAYERS ?= " \
  ##DIGIBASE##/meta-openembedded/meta-python \
  ##DIGIBASE##/meta-openembedded/meta-networking \
  ##DIGIBASE##/meta-openembedded/meta-webserver \
-  ##DIGIBASE##/meta-qt5 \
+  ##DIGIBASE##/meta-qt6 \
  ##DIGIBASE##/meta-swupdate \
  ##DIGIBASE##/meta-freescale \
  ##DIGIBASE##/meta-fsl-demos \
--- a/meta-digi-arm/conf/templates/ccimx8mm-dvk/conf-notes.txt
+++ b/meta-digi-arm/conf/templates/ccimx8mm-dvk/conf-notes.txt
@ -12,8 +12,7 @@ Digi Embedded Yocto provides the following image recipes:

  * dey-image-lvgl: graphical LVGL image

-    By default the image is XWayland-based so it provides a full Weston
-    desktop environment.
+    A DRM-based image including an LVGL demo application.

  * dey-image-flutter: graphical Flutter image

--- a/meta-digi-arm/conf/templates/ccimx8mn-dvk/conf-notes.txt
+++ b/meta-digi-arm/conf/templates/ccimx8mn-dvk/conf-notes.txt
@ -12,8 +12,7 @@ Digi Embedded Yocto provides the following image recipes:

  * dey-image-lvgl: graphical LVGL image

-    By default the image is XWayland-based so it provides a full Weston
-    desktop environment.
+    A DRM-based image including an LVGL demo application.

  * dey-image-flutter: graphical Flutter image

--- a/meta-digi-arm/conf/templates/ccimx8x-sbc-pro/conf-notes.txt
+++ b/meta-digi-arm/conf/templates/ccimx8x-sbc-pro/conf-notes.txt
@ -12,8 +12,7 @@ Digi Embedded Yocto provides the following image recipes:

  * dey-image-lvgl: graphical LVGL image

-    By default the image is XWayland-based so it provides a full Weston
-    desktop environment.
+    A DRM-based image including an LVGL demo application.

  * dey-image-flutter: graphical Flutter image

--- a/meta-digi-arm/conf/templates/ccimx91-dvk/bblayers.conf.sample
+++ b/meta-digi-arm/conf/templates/ccimx91-dvk/bblayers.conf.sample
@ -17,9 +17,7 @@ BBLAYERS ?= " \
  ##DIGIBASE##/meta-swupdate \
  ##DIGIBASE##/meta-freescale \
  ##DIGIBASE##/meta-fsl-demos \
-  ##DIGIBASE##/meta-webkit \
  ##DIGIBASE##/meta-imx/meta-imx-ml \
-  ##DIGIBASE##/meta-selinux \
  ##DIGIBASE##/meta-timesys \
  ##DIGIBASE##/meta-digi/meta-digi-arm \
  ##DIGIBASE##/meta-digi/meta-digi-dey \
--- a/meta-digi-arm/conf/templates/ccimx93-dvk/conf-notes.txt
+++ b/meta-digi-arm/conf/templates/ccimx93-dvk/conf-notes.txt
@ -7,6 +7,4 @@ Digi Embedded Yocto provides the following image recipes:

  * dey-image-lvgl: graphical LVGL image

-    By default the image is XWayland-based so it provides a full Weston
-    desktop environment.
-
+    A DRM-based image including an LVGL demo application.
--- a/meta-digi-arm/conf/templates/ccimx95-dvk/bblayers.conf.sample
+++ b/meta-digi-arm/conf/templates/ccimx95-dvk/bblayers.conf.sample
@ -0,0 +1,30 @@
+# POKY_BBLAYERS_CONF_VERSION is increased each time build/conf/bblayers.conf
+# changes incompatibly
+POKY_BBLAYERS_CONF_VERSION = "2"
+
+BBPATH = "${TOPDIR}"
+BBFILES ?= ""
+
+BBLAYERS ?= " \
+  ##OEROOT##/meta \
+  ##OEROOT##/meta-poky \
+  ##OEROOT##/meta-yocto-bsp \
+  ##DIGIBASE##/meta-arm/meta-arm-toolchain \
+  ##DIGIBASE##/meta-openembedded/meta-oe \
+  ##DIGIBASE##/meta-openembedded/meta-python \
+  ##DIGIBASE##/meta-openembedded/meta-multimedia \
+  ##DIGIBASE##/meta-openembedded/meta-networking \
+  ##DIGIBASE##/meta-openembedded/meta-webserver \
+  ##DIGIBASE##/meta-qt6 \
+  ##DIGIBASE##/meta-swupdate \
+  ##DIGIBASE##/meta-freescale \
+  ##DIGIBASE##/meta-fsl-demos \
+  ##DIGIBASE##/meta-imx/meta-imx-ml \
+  ##DIGIBASE##/meta-timesys \
+  ##DIGIBASE##/meta-flutter \
+  ##DIGIBASE##/meta-flutter/meta-flutter-apps \
+  ##DIGIBASE##/meta-clang \
+  ##DIGIBASE##/meta-browser/meta-chromium \
+  ##DIGIBASE##/meta-digi/meta-digi-arm \
+  ##DIGIBASE##/meta-digi/meta-digi-dey \
+  "
--- a/meta-digi-arm/conf/templates/ccimx95-dvk/conf-notes.txt
+++ b/meta-digi-arm/conf/templates/ccimx95-dvk/conf-notes.txt
@ -0,0 +1,20 @@
+Digi Embedded Yocto provides the following image recipes:
+
+  * dey-image-qt: graphical QT image
+
+    By default the image is XWayland-based so it provides a full Weston
+    desktop environment.
+
+  * dey-image-chromium: graphical Chromium image
+
+    By default the image is XWayland-based so it provides a full Weston
+    desktop environment.
+
+  * dey-image-lvgl: graphical LVGL image
+
+    A DRM-based image including an LVGL demo application.
+
+  * dey-image-flutter: graphical Flutter image
+
+    Expansion of custom Digi core-image-base including full Flutter
+    framework support.
--- a/meta-digi-arm/conf/templates/ccimx95-dvk/local.conf.sample
+++ b/meta-digi-arm/conf/templates/ccimx95-dvk/local.conf.sample
@ -0,0 +1,305 @@
+#
+# This file is your local configuration file and is where all local user settings
+# are placed. The comments in this file give some guide to the options a new user
+# to the system might want to change but pretty much any configuration option can
+# be set in this file. More adventurous users can look at
+# local.conf.sample.extended which contains other examples of configuration which
+# can be placed in this file but new users likely won't need any of them
+# initially. There's also site.conf.sample which contains examples of site specific
+# information such as proxy server addresses.
+#
+# Lines starting with the '#' character are commented out and in some cases the
+# default values are provided as comments to show people example syntax. Enabling
+# the option is a question of removing the # character and making any change to the
+# variable as required.
+
+#
+# Machine Selection
+#
+# You need to select a specific machine to target the build with. There are a selection
+# of emulated machines available which can boot and run in the QEMU emulator:
+#
+#MACHINE ?= "qemuarm"
+#MACHINE ?= "qemuarm64"
+#MACHINE ?= "qemumips"
+#MACHINE ?= "qemumips64"
+#MACHINE ?= "qemuppc"
+#MACHINE ?= "qemux86"
+#MACHINE ?= "qemux86-64"
+#
+# There are also the following hardware board target machines included for
+# demonstration purposes:
+#
+#MACHINE ?= "beaglebone-yocto"
+#MACHINE ?= "genericarm64"
+#MACHINE ?= "genericx86"
+#MACHINE ?= "genericx86-64"
+#
+# This sets the default machine to be qemux86-64 if no other machine is selected:
+#MACHINE ??= "qemux86-64"
+
+MACHINE = "ccimx95-dvk"
+
+# These are some of the more commonly used values. Looking at the files in the
+# meta/conf/machine directory, or the conf/machine directory of any additional layers
+# you add in will show all the available machines.
+
+#
+# Use Digi's internal git repositories
+#
+#DIGI_INTERNAL_GIT ?= "1"
+
+#
+# Where to place downloads
+#
+# During a first build the system will download many different source code tarballs
+# from various upstream projects. This can take a while, particularly if your network
+# connection is slow. These are all stored in DL_DIR. When wiping and rebuilding you
+# can preserve this directory to speed up this part of subsequent builds. This directory
+# is safe to share between multiple builds on the same machine too.
+#
+# The default is a downloads directory under TOPDIR which is the build directory.
+#
+#DL_DIR ?= "${TOPDIR}/downloads"
+
+#
+# Where to place shared-state files
+#
+# BitBake has the capability to accelerate builds based on previously built output.
+# This is done using "shared state" files which can be thought of as cache objects
+# and this option determines where those files are placed.
+#
+# You can wipe out TMPDIR leaving this directory intact and the build would regenerate
+# from these files if no changes were made to the configuration. If changes were made
+# to the configuration, only shared state files where the state was still valid would
+# be used (done using checksums).
+#
+# The default is a sstate-cache directory under TOPDIR.
+#
+#SSTATE_DIR ?= "${TOPDIR}/sstate-cache"
+
+#
+# Where to place the build output
+#
+# This option specifies where the bulk of the building work should be done and
+# where BitBake should place its temporary files and output. Keep in mind that
+# this includes the extraction and compilation of many applications and the toolchain
+# which can use Gigabytes of hard disk space.
+#
+# The default is a tmp directory under TOPDIR.
+#
+#TMPDIR = "${TOPDIR}/tmp"
+
+#
+# Default policy config
+#
+# The distribution setting controls which policy settings are used as defaults.
+# The default value is fine for general Yocto project use, at least initially.
+# Ultimately when creating custom policy, people will likely end up subclassing
+# these defaults.
+#
+DISTRO ?= "dey"
+# As an example of a subclass there is a "bleeding" edge policy configuration
+# where many versions are set to the absolute latest code from the upstream
+# source control systems. This is just mentioned here as an example, its not
+# useful to most new users.
+# DISTRO ?= "poky-bleeding"
+
+#
+# Package Management configuration
+#
+# This variable lists which packaging formats to enable. Multiple package backends
+# can be enabled at once and the first item listed in the variable will be used
+# to generate the root filesystems.
+# Options are:
+#  - 'package_deb' for debian style deb files
+#  - 'package_ipk' for ipk files are used by opkg (a debian style embedded package manager)
+#  - 'package_rpm' for rpm style packages
+# E.g.: PACKAGE_CLASSES ?= "package_rpm package_deb package_ipk"
+# OE-Core defaults to ipkg, whilst Poky defaults to rpm:
+PACKAGE_CLASSES ?= "package_rpm"
+
+#
+# SDK target architecture
+#
+# This variable specifies the architecture to build SDK items for and means
+# you can build the SDK packages for architectures other than the machine you are
+# running the build on (i.e. building i686 packages on an x86_64 host).
+# Supported values are i686, x86_64, aarch64
+#SDKMACHINE ?= "i686"
+
+#
+# Extra image configuration defaults
+#
+# The EXTRA_IMAGE_FEATURES variable allows extra packages to be added to the generated
+# images. Some of these options are added to certain image types automatically. The
+# variable can contain the following options:
+#  "dbg-pkgs"       - add -dbg packages for all installed packages
+#                     (adds symbol information for debugging/profiling)
+#  "src-pkgs"       - add -src packages for all installed packages
+#                     (adds source code for debugging)
+#  "dev-pkgs"       - add -dev packages for all installed packages
+#                     (useful if you want to develop against libs in the image)
+#  "ptest-pkgs"     - add -ptest packages for all ptest-enabled packages
+#                     (useful if you want to run the package test suites)
+#  "tools-sdk"      - add development tools (gcc, make, pkgconfig etc.)
+#  "tools-debug"    - add debugging tools (gdb, strace)
+#  "eclipse-debug"  - add Eclipse remote debugging support
+#  "tools-profile"  - add profiling tools (oprofile, lttng, valgrind)
+#  "tools-testapps" - add useful testing tools (ts_print, aplay, arecord etc.)
+#  "debug-tweaks"   - make an image suitable for development
+#                     e.g. ssh root access has a blank password
+# There are other application targets that can be used here too, see
+# meta/classes-recipe/image.bbclass and
+# meta/classes-recipe/core-image.bbclass for more details.
+# We default to enabling the debugging tweaks.
+EXTRA_IMAGE_FEATURES ?= "debug-tweaks"
+
+#
+# Additional image features
+#
+# The following is a list of additional classes to use when building images which
+# enable extra features. Some available options which can be included in this variable
+# are:
+#   - 'buildstats' collect build statistics
+USER_CLASSES ?= "buildstats"
+
+#
+# Runtime testing of images
+#
+# The build system can test booting virtual machine images under qemu (an emulator)
+# after any root filesystems are created and run tests against those images. It can also
+# run tests against any SDK that are built. To enable this uncomment these lines.
+# See meta/classes-recipe/test{image,sdk}.bbclass for further details.
+#IMAGE_CLASSES += "testimage testsdk"
+#TESTIMAGE_AUTO:qemuall = "1"
+
+#
+# Interactive shell configuration
+#
+# Under certain circumstances the system may need input from you and to do this it
+# can launch an interactive shell. It needs to do this since the build is
+# multithreaded and needs to be able to handle the case where more than one parallel
+# process may require the user's attention. The default is iterate over the available
+# terminal types to find one that works.
+#
+# Examples of the occasions this may happen are when resolving patches which cannot
+# be applied, to use the devshell or the kernel menuconfig
+#
+# Supported values are auto, gnome, xfce, rxvt, screen, konsole (KDE 3.x only), none
+# Note: currently, Konsole support only works for KDE 3.x due to the way
+# newer Konsole versions behave
+#OE_TERMINAL = "auto"
+# By default disable interactive patch resolution (tasks will just fail instead):
+PATCHRESOLVE = "noop"
+
+#
+# Disk Space Monitoring during the build
+#
+# Monitor the disk space during the build. If there is less that 1GB of space or less
+# than 100K inodes in any key build location (TMPDIR, DL_DIR, SSTATE_DIR), gracefully
+# shutdown the build. If there is less than 100MB or 1K inodes, perform a hard halt
+# of the build. The reason for this is that running completely out of space can corrupt
+# files and damages the build in ways which may not be easily recoverable.
+# It's necessary to monitor /tmp, if there is no space left the build will fail
+# with very exotic errors.
+BB_DISKMON_DIRS ??= "\
+    STOPTASKS,${TMPDIR},1G,100K \
+    STOPTASKS,${DL_DIR},1G,100K \
+    STOPTASKS,${SSTATE_DIR},1G,100K \
+    STOPTASKS,/tmp,100M,100K \
+    HALT,${TMPDIR},100M,1K \
+    HALT,${DL_DIR},100M,1K \
+    HALT,${SSTATE_DIR},100M,1K \
+    HALT,/tmp,10M,1K"
+
+#
+# Shared-state files from other locations
+#
+# As mentioned above, shared state files are prebuilt cache data objects which can be
+# used to accelerate build time. This variable can be used to configure the system
+# to search other mirror locations for these objects before it builds the data itself.
+#
+# This can be a filesystem directory, or a remote url such as https or ftp. These
+# would contain the sstate-cache results from previous builds (possibly from other
+# machines). This variable works like fetcher MIRRORS/PREMIRRORS and points to the
+# cache locations to check for the shared objects.
+# NOTE: if the mirror uses the same structure as SSTATE_DIR, you need to add PATH
+# at the end as shown in the examples below. This will be substituted with the
+# correct path within the directory structure.
+#SSTATE_MIRRORS ?= "\
+#file://.* https://someserver.tld/share/sstate/PATH;downloadfilename=PATH \
+#file://.* file:///some/local/dir/sstate/PATH"
+
+#
+# Yocto Project SState Mirror
+#
+# The Yocto Project has prebuilt artefacts available for its releases, you can enable
+# use of these by uncommenting some of the following lines. This will mean the build uses
+# the network to check for artefacts at the start of builds, which does slow it down
+# initially but it will then speed up the builds by not having to build things if they are
+# present in the cache. It assumes you can download something faster than you can build it
+# which will depend on your network.
+# Note: For this to work you also need hash-equivalence passthrough to the matching server
+# There is a choice between our sstate server directly and a faster content delivery network
+# (CDN) kindly provided by JSDelivr, uncomment one of the SSTATE_MIRRORS lines, not both.
+# Using the CDN rather than the yoctoproject.org address is suggested/preferred.
+#
+#BB_HASHSERVE_UPSTREAM = 'wss://hashserv.yoctoproject.org/ws'
+#SSTATE_MIRRORS ?= "file://.* http://cdn.jsdelivr.net/yocto/sstate/all/PATH;downloadfilename=PATH"
+#
+###SSTATE_MIRRORS ?= "file://.* http://sstate.yoctoproject.org/all/PATH;downloadfilename=PATH"
+
+
+#
+# Qemu configuration
+#
+# By default native qemu will build with a builtin VNC server where graphical output can be
+# seen. The line below enables the SDL UI frontend too.
+PACKAGECONFIG:append:pn-qemu-system-native = " sdl"
+# By default libsdl2-native will be built, if you want to use your host's libSDL instead of
+# the minimal libsdl built by libsdl2-native then uncomment the ASSUME_PROVIDED line below.
+#ASSUME_PROVIDED += "libsdl2-native"
+
+# You can also enable the Gtk UI frontend, which takes somewhat longer to build, but adds
+# a handy set of menus for controlling the emulator.
+#PACKAGECONFIG:append:pn-qemu-system-native = " gtk+"
+
+#
+# Hash Equivalence
+#
+# Enable support for automatically running a local hash equivalence server and
+# instruct bitbake to use a hash equivalence aware signature generator. Hash
+# equivalence improves reuse of sstate by detecting when a given sstate
+# artifact can be reused as equivalent, even if the current task hash doesn't
+# match the one that generated the artifact.
+#
+# A shared hash equivalent server can be set with "<HOSTNAME>:<PORT>" format
+#
+#BB_HASHSERVE = "auto"
+#BB_SIGNATURE_HANDLER = "OEEquivHash"
+
+#
+# Memory Resident Bitbake
+#
+# Bitbake's server component can stay in memory after the UI for the current command
+# has completed. This means subsequent commands can run faster since there is no need
+# for bitbake to reload cache files and so on. Number is in seconds, after which the
+# server will shut down.
+#
+#BB_SERVER_TIMEOUT = "60"
+
+# CONF_VERSION is increased each time build/conf/ changes incompatibly and is used to
+# track the version of this file when it was generated. This can safely be ignored if
+# this doesn't mean anything to you.
+CONF_VERSION = "2"
+
+#
+# Enable local PR server
+#
+PRSERV_HOST = "localhost:0"
+
+#
+# Some libraries and packages are covered by NXP EULA
+#
+#ACCEPT_FSL_EULA = "1"
--- a/meta-digi-arm/conf/templates/ccmp15-dvk/bblayers.conf.sample
+++ b/meta-digi-arm/conf/templates/ccmp15-dvk/bblayers.conf.sample
@ -22,6 +22,7 @@ BBLAYERS ?= " \
  ##DIGIBASE##/meta-st-x-linux-ai \
  ##DIGIBASE##/meta-flutter \
  ##DIGIBASE##/meta-flutter/meta-flutter-apps \
+  ##DIGIBASE##/meta-clang \
  ##DIGIBASE##/meta-digi/meta-digi-arm \
  ##DIGIBASE##/meta-digi/meta-digi-dey \
  "
--- a/meta-digi-arm/conf/templates/ccmp15-dvk/conf-notes.txt
+++ b/meta-digi-arm/conf/templates/ccmp15-dvk/conf-notes.txt
@ -12,8 +12,7 @@ Digi Embedded Yocto provides the following image recipes:

  * dey-image-lvgl: graphical LVGL image

-    By default the image is Wayland-based so it provides a full Weston
-    desktop environment.
+    A DRM-based image including an LVGL demo application.

  * dey-image-flutter: graphical Flutter image

--- a/meta-digi-arm/conf/templates/ccmp25-dvk/conf-notes.txt
+++ b/meta-digi-arm/conf/templates/ccmp25-dvk/conf-notes.txt
@ -12,8 +12,7 @@ Digi Embedded Yocto provides the following image recipes:

  * dey-image-lvgl: graphical LVGL image

-    By default the image is Wayland-based so it provides a full Weston
-    desktop environment.
+    A DRM-based image including an LVGL demo application.

  * dey-image-flutter: graphical Flutter image

--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-oei/imx-oei/0001-boards-ccimx95-add-platform-as-a-clone-of-mx95lp5.patch
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-oei/imx-oei/0001-boards-ccimx95-add-platform-as-a-clone-of-mx95lp5.patch
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-oei/imx-oei/0002-ddr-add-DDR-configuration-file-for-ccimx95.patch
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-oei/imx-oei/0002-ddr-add-DDR-configuration-file-for-ccimx95.patch
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-oei/imx-oei/0003-ccimx95-configure-console-on-LPUART6.patch
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-oei/imx-oei/0003-ccimx95-configure-console-on-LPUART6.patch
@ -0,0 +1,56 @@
+From: Isaac Hermida <isaac.hermida@digi.com>
+Date: Mon, 15 Sep 2025 11:38:55 +0200
+Subject: [PATCH] ccimx95: configure console on LPUART6
+
+Upstream-Status: Inappropriate [DEY specific]
+
+Signed-off-by: Javier Viguera <javier.viguera@digi.com>
+---
+ boards/ccimx95/config_board.h  | 2 +-
+ boards/ccimx95/pin_mux.c       | 7 +++++++
+ devices/MIMX95/oei/soc_clock.c | 2 ++
+ 3 files changed, 10 insertions(+), 1 deletion(-)
+
+diff --git a/boards/ccimx95/config_board.h b/boards/ccimx95/config_board.h
+index 3095ebf1d8ce..ec97626a2a28 100644
+--- a/boards/ccimx95/config_board.h
+++ b/boards/ccimx95/config_board.h
+@@ -52,7 +52,7 @@
+ /* Defines */
+ 
+ /*! Config for UART instance */
+-#define BOARD_DEBUG_UART_INSTANCE    2U
+#define BOARD_DEBUG_UART_INSTANCE    6U
+ /*! Config for UART baudrate */
+ #define BOARD_DEBUG_UART_BAUDRATE    115200U
+ 
+diff --git a/boards/ccimx95/pin_mux.c b/boards/ccimx95/pin_mux.c
+index a8c15513b578..3cb33909f740 100644
+--- a/boards/ccimx95/pin_mux.c
+++ b/boards/ccimx95/pin_mux.c
+@@ -29,5 +29,12 @@ void BOARD_InitPins(void)
+ 
+     IOMUXC_SetPinMux(IOMUXC_PAD_UART2_TXD__LPUART2_TX, 0);
+     IOMUXC_SetPinConfig(IOMUXC_PAD_UART2_TXD__LPUART2_TX, IOMUXC_PAD_DSE(0xFU));
+#elif (BOARD_DEBUG_UART_INSTANCE == 6U)
+    /* Configure LPUART 6 */
+    IOMUXC_SetPinMux(IOMUXC_PAD_GPIO_IO05__LPUART6_RX, 0);
+    IOMUXC_SetPinConfig(IOMUXC_PAD_GPIO_IO05__LPUART6_RX, IOMUXC_PAD_PD(1U));
+
+    IOMUXC_SetPinMux(IOMUXC_PAD_GPIO_IO04__LPUART6_TX, 0);
+    IOMUXC_SetPinConfig(IOMUXC_PAD_GPIO_IO04__LPUART6_TX, IOMUXC_PAD_DSE(0xFU));
+ #endif
+ }
+diff --git a/devices/MIMX95/oei/soc_clock.c b/devices/MIMX95/oei/soc_clock.c
+index 3421e3efe143..9205b9a12782 100644
+--- a/devices/MIMX95/oei/soc_clock.c
+++ b/devices/MIMX95/oei/soc_clock.c
+@@ -25,6 +25,8 @@ static struct clk_root_cfg clk_root_cfgs[] = {
+ 	{ CLOCK_ROOT_LPUART1, CLOCK_SRC_OSC24M, 1}, /* 24MHz */
+ #elif (BOARD_DEBUG_UART_INSTANCE == 2)
+ 	{ CLOCK_ROOT_LPUART2, CLOCK_SRC_OSC24M, 1}, /* 24MHz */
+#elif (BOARD_DEBUG_UART_INSTANCE == 6)
+	{ CLOCK_ROOT_LPUART6, CLOCK_SRC_OSC24M, 1}, /* 24MHz */
+ #endif
+ #endif
+ };
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-oei/imx-oei/0004-ccimx95-add-DDR-configuration-file-for-ccimx95-B0-si.patch
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-oei/imx-oei/0004-ccimx95-add-DDR-configuration-file-for-ccimx95-B0-si.patch
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-oei/imx-oei_1.0.0.bbappend
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-oei/imx-oei_1.0.0.bbappend
@ -0,0 +1,10 @@
+# Copyright (C) 2025, Digi International Inc.
+
+FILESEXTRAPATHS:prepend := "${THISDIR}/${BPN}:"
+
+SRC_URI:append:dey = " \
+    file://0001-boards-ccimx95-add-platform-as-a-clone-of-mx95lp5.patch \
+    file://0002-ddr-add-DDR-configuration-file-for-ccimx95.patch \
+    file://0003-ccimx95-configure-console-on-LPUART6.patch \
+    file://0004-ccimx95-add-DDR-configuration-file-for-ccimx95-B0-si.patch \
+"
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0001-ccimx95dvk-add-new-platform-config-and-board.patch
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0001-ccimx95dvk-add-new-platform-config-and-board.patch
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0002-ccimx95dvk-configure-board-and-switch-debug-UART-to-.patch
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0002-ccimx95dvk-configure-board-and-switch-debug-UART-to-.patch
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0003-ccimx95dvk-disable-PCAL6408A-expander-and-move-GPIO1.patch
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0003-ccimx95dvk-disable-PCAL6408A-expander-and-move-GPIO1.patch
@ -0,0 +1,254 @@
+From: Javier Viguera <javier.viguera@digi.com>
+Date: Mon, 15 Sep 2025 12:37:05 +0200
+Subject: [PATCH] ccimx95dvk: disable PCAL6408A expander and move GPIO1 to A55
+
+Our board does not populate that expander, so disable the initialization
+and assign GPIO1 to be used by the A55 cpu.
+
+Upstream-Status: Inappropriate [DEY specific]
+
+Signed-off-by: Javier Viguera <javier.viguera@digi.com>
+---
+ boards/ccimx95dvk/board.c              |  7 ---
+ boards/ccimx95dvk/pin_mux.c            |  4 --
+ boards/ccimx95dvk/sm/brd_sm.c          |  9 ---
+ boards/ccimx95dvk/sm/brd_sm_handlers.c | 82 --------------------------
+ configs/ccimx95dvk.cfg                 |  3 +-
+ configs/ccimx95dvk/config_scmi.h       |  2 +
+ configs/ccimx95dvk/config_trdc.h       |  2 +-
+ 7 files changed, 5 insertions(+), 104 deletions(-)
+
+diff --git a/boards/ccimx95dvk/board.c b/boards/ccimx95dvk/board.c
+index d4a671f6d7f8..012a04540fd1 100755
+--- a/boards/ccimx95dvk/board.c
+++ b/boards/ccimx95dvk/board.c
+@@ -337,9 +337,6 @@ void BOARD_InitHandlers(void)
+     /* Enable FCCU handler */
+     NVIC_SetPriority(FCCU_INT0_IRQn, IRQ_PRIO_NOPREEMPT_CRITICAL);
+     NVIC_EnableIRQ(FCCU_INT0_IRQn);
+-
+-    /* Enable GPIO1 handler */
+-    NVIC_EnableIRQ(GPIO1_0_IRQn);
+ }
+ 
+ /*--------------------------------------------------------------------------*/
+@@ -509,10 +506,6 @@ void BOARD_SystemSleepPrepare(uint32_t sleepMode, uint32_t sleepFlags)
+         (void) CPU_PerLpiConfigSet(CPU_IDX_M33P, s_uartConfig.perLpiId,
+             CPU_PER_LPI_ON_RUN_WAIT_STOP);
+     }
+-
+-    /* Configure LPI for GPIO1 */
+-    (void) CPU_PerLpiConfigSet(CPU_IDX_M33P, CPU_PER_LPI_IDX_GPIO1,
+-        CPU_PER_LPI_ON_RUN_WAIT_STOP);
+ }
+ 
+ /*--------------------------------------------------------------------------*/
+diff --git a/boards/ccimx95dvk/pin_mux.c b/boards/ccimx95dvk/pin_mux.c
+index 60f6d27c41c5..800126f3814b 100755
+--- a/boards/ccimx95dvk/pin_mux.c
+++ b/boards/ccimx95dvk/pin_mux.c
+@@ -57,9 +57,5 @@ void BOARD_InitPins(void)
+     IOMUXC_SetPinConfig(IOMUXC_PAD_I2C2_SDA__LPI2C2_SDA, IOMUXC_PAD_DSE(0xFU)
+         | IOMUXC_PAD_FSEL1(0x3U) | IOMUXC_PAD_PU(0x1U) | IOMUXC_PAD_OD(0x1U));
+ #endif
+-
+-    /* Configure GPIO1-10 (INT from the PCAL6408A */
+-    IOMUXC_SetPinMux(IOMUXC_PAD_PDM_BIT_STREAM1__GPIO1_IO_BIT10, 0U);
+-    IOMUXC_SetPinConfig(IOMUXC_PAD_PDM_BIT_STREAM1__GPIO1_IO_BIT10, 0U);
+ }
+ 
+diff --git a/boards/ccimx95dvk/sm/brd_sm.c b/boards/ccimx95dvk/sm/brd_sm.c
+index cd48b590cd26..48a8486a2acd 100755
+--- a/boards/ccimx95dvk/sm/brd_sm.c
+++ b/boards/ccimx95dvk/sm/brd_sm.c
+@@ -459,15 +459,6 @@ void BRD_SM_ShutdownRecordSave(dev_sm_rst_rec_t shutdownRec)
+ int32_t BRD_SM_SystemReset(void)
+ {
+     int32_t status = SM_ERR_SUCCESS;
+-    rgpio_pin_config_t gpioConfig =
+-    {
+-        kRGPIO_DigitalOutput,
+-        0U
+-    };
+-
+-    /* Drive WDOG_ANY to reset PMIC */
+-    RGPIO_PinInit(GPIO1, 15U, &gpioConfig);
+-    IOMUXC_SetPinMux(IOMUXC_PAD_WDOG_ANY__GPIO1_IO_BIT15, 0U);
+ 
+     /* Wait for PMIC to react */
+     SystemTimeDelay(1000U);
+diff --git a/boards/ccimx95dvk/sm/brd_sm_handlers.c b/boards/ccimx95dvk/sm/brd_sm_handlers.c
+index a96f6ce0e2f4..19ee28e93134 100755
+--- a/boards/ccimx95dvk/sm/brd_sm_handlers.c
+++ b/boards/ccimx95dvk/sm/brd_sm_handlers.c
+@@ -96,26 +96,6 @@ int32_t BRD_SM_SerialDevicesInit(void)
+ {
+     int32_t status = SM_ERR_SUCCESS;
+     LPI2C_Type *const s_i2cBases[] = LPI2C_BASE_PTRS;
+-    pcal6408a_config_t pcal6408Config;
+-
+-    /* Fill in PCAL6408A dev */
+-    g_pcal6408aDev.i2cBase = s_i2cBases[BOARD_I2C_INSTANCE];
+-    g_pcal6408aDev.devAddr = BOARD_PCAL6408A_DEV_ADDR;
+-
+-    /* Init the bus expander */
+-    PCAL6408A_GetDefaultConfig(&pcal6408Config);
+-    pcal6408Config.inputLatch = 0xFFU;
+-    if (!PCAL6408A_Init(&g_pcal6408aDev, &pcal6408Config))
+-    {
+-        status = SM_ERR_HARDWARE_ERROR;
+-    }
+-    else
+-    {
+-        if (!PCAL6408A_IntMaskSet(&g_pcal6408aDev, PCAL6408A_INITIAL_MASK))
+-        {
+-            status = SM_ERR_HARDWARE_ERROR;
+-        }
+-    }
+ 
+     if (status == SM_ERR_SUCCESS)
+     {
+@@ -254,20 +234,6 @@ int32_t BRD_SM_SerialDevicesInit(void)
+         }
+     }
+ 
+-    if (status == SM_ERR_SUCCESS)
+-    {
+-        rgpio_pin_config_t gpioConfig =
+-        {
+-            kRGPIO_DigitalInput,
+-            0U
+-        };
+-
+-        /* Init GPIO1-10 */
+-        RGPIO_PinInit(GPIO1, 10U, &gpioConfig);
+-        RGPIO_SetPinInterruptConfig(GPIO1, 10U, kRGPIO_InterruptOutput0,
+-            kRGPIO_InterruptLogicZero);
+-    }
+-
+     /* Return status */
+     return status;
+ }
+@@ -300,54 +266,6 @@ int32_t BRD_SM_BusExpMaskSet(uint8_t val, uint8_t mask)
+     return status;
+ }
+ 
+-/*--------------------------------------------------------------------------*/
+-/* GPIO1 handler                                                            */
+-/*--------------------------------------------------------------------------*/
+-void GPIO1_0_IRQHandler(void)
+-{
+-    uint32_t flags;
+-    uint8_t status, val;
+-
+-    /* Get GPIO status */
+-    flags = RGPIO_GetPinsInterruptFlags(GPIO1, kRGPIO_InterruptOutput0);
+-
+-    /* Get PCAL6408A status */
+-    (void) PCAL6408A_IntStatusGet(&g_pcal6408aDev, &status);
+-
+-    /* Get value and Clear PCAL6408A interrupts */
+-    (void) PCAL6408A_InputGet(&g_pcal6408aDev, &val);
+-
+-    /* Clear GPIO interrupts */
+-    RGPIO_ClearPinsInterruptFlags(GPIO1, kRGPIO_InterruptOutput0, flags);
+-
+-    /* Handle PF09 interrupt */
+-    if ((status & BIT8(PCAL6408A_INPUT_PF09_INT)) != 0U)
+-    {
+-        /* Asserts low */
+-        if ((val & BIT8(PCAL6408A_INPUT_PF09_INT)) == 0U)
+-        {
+-            BRD_SM_Pf09Handler();
+-        }
+-    }
+-
+-    /* Handle PCA2131 interrupt */
+-    if (g_pca2131Used && ((status & BIT8(PCAL6408A_INPUT_PCA2131_INT))
+-        != 0U))
+-    {
+-        /* Asserts low */
+-        if ((val & BIT8(PCAL6408A_INPUT_PCA2131_INT)) == 0U)
+-        {
+-            BRD_SM_BbmHandler();
+-        }
+-    }
+-
+-    /* Handle controls interrupts */
+-    BRD_SM_ControlHandler(status, val);
+-
+-    /* Adjust dynamic IRQ priority */
+-    (void) DEV_SM_IrqPrioUpdate();
+-}
+-
+ /*==========================================================================*/
+ 
+ /*--------------------------------------------------------------------------*/
+diff --git a/configs/ccimx95dvk.cfg b/configs/ccimx95dvk.cfg
+index da383aab036c..86d39e6e1fba 100755
+--- a/configs/ccimx95dvk.cfg
+++ b/configs/ccimx95dvk.cfg
+@@ -197,7 +197,6 @@ ELE                 OWNER
+ FSB                 READONLY
+ GIC                 ACCESS
+ GPC                 OWNER
+-GPIO1               OWNER
+ GPR0                OWNER
+ GPR1                OWNER
+ GPR2                OWNER
+@@ -482,6 +481,7 @@ PERLPI_LPUART4      ALL
+ PERLPI_LPUART5      ALL
+ PERLPI_LPUART6      ALL
+ PERLPI_LPUART8      ALL
+PERLPI_GPIO1        ALL
+ PERLPI_WDOG3        ALL
+ PERLPI_WDOG4        ALL
+ SYS                 ALL
+@@ -715,6 +715,7 @@ FLEXIO2             OWNER
+ FLEXSPI1            OWNER
+ FSB                 READONLY
+ GIC                 OWNER
+GPIO1               OWNER
+ GPIO2               OWNER
+ GPIO3               OWNER
+ GPIO4               OWNER
+diff --git a/configs/ccimx95dvk/config_scmi.h b/configs/ccimx95dvk/config_scmi.h
+index e1b81cc03f58..c1cc90313174 100644
+--- a/configs/ccimx95dvk/config_scmi.h
+++ b/configs/ccimx95dvk/config_scmi.h
+@@ -192,6 +192,7 @@
+         .perlpiPerms[DEV_SM_PERLPI_CAN3] = SM_SCMI_PERM_ALL, \
+         .perlpiPerms[DEV_SM_PERLPI_CAN4] = SM_SCMI_PERM_ALL, \
+         .perlpiPerms[DEV_SM_PERLPI_CAN5] = SM_SCMI_PERM_ALL, \
+        .perlpiPerms[DEV_SM_PERLPI_GPIO1] = SM_SCMI_PERM_ALL, \
+         .perlpiPerms[DEV_SM_PERLPI_GPIO2] = SM_SCMI_PERM_ALL, \
+         .perlpiPerms[DEV_SM_PERLPI_GPIO3] = SM_SCMI_PERM_ALL, \
+         .perlpiPerms[DEV_SM_PERLPI_GPIO4] = SM_SCMI_PERM_ALL, \
+@@ -474,6 +475,7 @@
+         .perlpiPerms[DEV_SM_PERLPI_CAN3] = SM_SCMI_PERM_ALL, \
+         .perlpiPerms[DEV_SM_PERLPI_CAN4] = SM_SCMI_PERM_ALL, \
+         .perlpiPerms[DEV_SM_PERLPI_CAN5] = SM_SCMI_PERM_ALL, \
+        .perlpiPerms[DEV_SM_PERLPI_GPIO1] = SM_SCMI_PERM_ALL, \
+         .perlpiPerms[DEV_SM_PERLPI_GPIO2] = SM_SCMI_PERM_ALL, \
+         .perlpiPerms[DEV_SM_PERLPI_GPIO3] = SM_SCMI_PERM_ALL, \
+         .perlpiPerms[DEV_SM_PERLPI_GPIO4] = SM_SCMI_PERM_ALL, \
+diff --git a/configs/ccimx95dvk/config_trdc.h b/configs/ccimx95dvk/config_trdc.h
+index 1d8ed0b6fc95..47df6a7577d5 100644
+--- a/configs/ccimx95dvk/config_trdc.h
+++ b/configs/ccimx95dvk/config_trdc.h
+@@ -116,7 +116,6 @@
+         SM_CFG_W1(0x00010470U), 0x33333333U, \
+         SM_CFG_W1(0x00010474U), 0x00003000U, \
+         SM_CFG_W1(0x00010580U), 0x000003C0U, \
+-        SM_CFG_W1(0x000105a8U), 0x00000003U, \
+         SM_CFG_W1(0x00010640U), 0x99999999U, \
+         SM_CFG_W1(0x00010644U), 0x99999999U, \
+         SM_CFG_W1(0x00010648U), 0x99999999U, \
+@@ -129,6 +128,7 @@
+         SM_CFG_W1(0x0001066cU), 0x90909000U, \
+         SM_CFG_W1(0x00010670U), 0x00009000U, \
+         SM_CFG_W1(0x00010780U), 0x099330C0U, \
+        SM_CFG_W1(0x000107a8U), 0x00000009U, \
+         SM_CFG_Z1(0x00010850U), \
+         SM_CFG_W1(0x00010854U), 0x9000C000U, \
+         SM_CFG_W1(0x00010858U), 0x00000099U, \
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0004-ccimx95dvk-move-resources-from-M7-to-A55.patch
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0004-ccimx95dvk-move-resources-from-M7-to-A55.patch
@ -0,0 +1,206 @@
+From: Javier Viguera <javier.viguera@digi.com>
+Date: Tue, 16 Sep 2025 17:51:14 +0200
+Subject: [PATCH] ccimx95dvk: move resources from M7 to A55
+
+Moved from M7 to A55 domain:
+* LPUART7
+* PIN_GPIO_IO14
+* PIN_GPIO_IO15
+
+Upstream-Status: Inappropriate [DEY specific]
+
+Signed-off-by: Javier Viguera <javier.viguera@digi.com>
+---
+ configs/ccimx95dvk.cfg           | 11 ++++-------
+ configs/ccimx95dvk/config_scmi.h | 15 ++++++++-------
+ configs/ccimx95dvk/config_test.h |  7 +------
+ configs/ccimx95dvk/config_trdc.h |  3 +--
+ 4 files changed, 14 insertions(+), 22 deletions(-)
+
+diff --git a/configs/ccimx95dvk.cfg b/configs/ccimx95dvk.cfg
+index 86d39e6e1fba..393c29436894 100755
+--- a/configs/ccimx95dvk.cfg
+++ b/configs/ccimx95dvk.cfg
+@@ -369,7 +369,6 @@ LPIT1               OWNER
+ LPTMR1              OWNER
+ LPTMR2              OWNER
+ LPTPM1              OWNER
+-LPUART3             OWNER, test
+ MSGINTR1            OWNER
+ MSGINTR2            OWNER
+ MU5_A               OWNER
+@@ -382,11 +381,6 @@ TSTMR2              OWNER
+ V2X_SHE1            OWNER
+ WDOG5               OWNER
+ 
+-# Pins
+-
+-PIN_GPIO_IO14       OWNER
+-PIN_GPIO_IO15       OWNER
+-
+ # Memory
+ 
+ M7MIX               DATA, begin=0x020380000, end=0x02047FFFF
+@@ -477,6 +471,7 @@ PERLPI_GPIO4        ALL
+ PERLPI_GPIO5        ALL
+ PERLPI_LPUART1      ALL
+ PERLPI_LPUART2      ALL
+PERLPI_LPUART3      ALL
+ PERLPI_LPUART4      ALL
+ PERLPI_LPUART5      ALL
+ PERLPI_LPUART6      ALL
+@@ -762,6 +757,7 @@ LPTPM5              OWNER
+ LPTPM6              OWNER
+ LPUART1             OWNER
+ LPUART2             OWNER
+LPUART3             OWNER
+ LPUART4             OWNER
+ LPUART5             OWNER
+ LPUART6             OWNER
+@@ -914,6 +910,8 @@ PIN_GPIO_IO10        OWNER
+ PIN_GPIO_IO11        OWNER
+ PIN_GPIO_IO12        OWNER
+ PIN_GPIO_IO13        OWNER
+PIN_GPIO_IO14        OWNER
+PIN_GPIO_IO15        OWNER
+ PIN_GPIO_IO16        OWNER
+ PIN_GPIO_IO17        OWNER
+ PIN_GPIO_IO18        OWNER
+@@ -993,4 +991,3 @@ OCRAM               EXEC, begin=0x0204C0000, size=96K
+ GPU                 DATA, begin=0x04D900000, end=0x04DD7FFFF
+ DDR                 EXEC, begin=0x088000000, end=0x089FFFFFF
+ DDR                 EXEC, begin=0x08E000000, end=0x87FFFFFFF
+-
+diff --git a/configs/ccimx95dvk/config_scmi.h b/configs/ccimx95dvk/config_scmi.h
+index c1cc90313174..0913c1339af0 100644
+--- a/configs/ccimx95dvk/config_scmi.h
+++ b/configs/ccimx95dvk/config_scmi.h
+@@ -69,7 +69,6 @@
+         .clkPerms[DEV_SM_CLK_CAN1] = SM_SCMI_PERM_ALL, \
+         .clkPerms[DEV_SM_CLK_LPTMR1] = SM_SCMI_PERM_ALL, \
+         .clkPerms[DEV_SM_CLK_LPTMR2] = SM_SCMI_PERM_ALL, \
+-        .clkPerms[DEV_SM_CLK_LPUART3] = SM_SCMI_PERM_ALL, \
+         .clkPerms[DEV_SM_CLK_M7SYSTICK] = SM_SCMI_PERM_ALL, \
+         .clkPerms[DEV_SM_CLK_M7] = SM_SCMI_PERM_ALL, \
+         .clkPerms[DEV_SM_CLK_TSTMR2] = SM_SCMI_PERM_ALL, \
+@@ -81,9 +80,6 @@
+         .daisyPerms[DEV_SM_DAISY_LPTMR2_0] = SM_SCMI_PERM_ALL, \
+         .daisyPerms[DEV_SM_DAISY_LPTMR2_1] = SM_SCMI_PERM_ALL, \
+         .daisyPerms[DEV_SM_DAISY_LPTMR2_2] = SM_SCMI_PERM_ALL, \
+-        .daisyPerms[DEV_SM_DAISY_LPUART3_CTS] = SM_SCMI_PERM_ALL, \
+-        .daisyPerms[DEV_SM_DAISY_LPUART3_RXD] = SM_SCMI_PERM_ALL, \
+-        .daisyPerms[DEV_SM_DAISY_LPUART3_TXD] = SM_SCMI_PERM_ALL, \
+         .faultPerms[DEV_SM_FAULT_M7_LOCKUP] = SM_SCMI_PERM_ALL, \
+         .faultPerms[DEV_SM_FAULT_M7_RESET] = SM_SCMI_PERM_ALL, \
+         .faultPerms[DEV_SM_FAULT_SW0] = SM_SCMI_PERM_ALL, \
+@@ -94,10 +90,7 @@
+         .pdPerms[DEV_SM_PD_M7] = SM_SCMI_PERM_ALL, \
+         .perfPerms[DEV_SM_PERF_M7] = SM_SCMI_PERM_ALL, \
+         .perlpiPerms[DEV_SM_PERLPI_CAN1] = SM_SCMI_PERM_ALL, \
+-        .perlpiPerms[DEV_SM_PERLPI_LPUART3] = SM_SCMI_PERM_ALL, \
+         .perlpiPerms[DEV_SM_PERLPI_WDOG5] = SM_SCMI_PERM_ALL, \
+-        .pinPerms[DEV_SM_PIN_GPIO_IO14] = SM_SCMI_PERM_ALL, \
+-        .pinPerms[DEV_SM_PIN_GPIO_IO15] = SM_SCMI_PERM_ALL, \
+         .rtcPerms[BRD_SM_RTC_PCA2131] = SM_SCMI_PERM_ALL, \
+         .rtcPerms[DEV_SM_RTC_BBNSM] = SM_SCMI_PERM_PRIV, \
+         .sensorPerms[BRD_SM_SENSOR_TEMP_PF09] = SM_SCMI_PERM_SET, \
+@@ -199,6 +192,7 @@
+         .perlpiPerms[DEV_SM_PERLPI_GPIO5] = SM_SCMI_PERM_ALL, \
+         .perlpiPerms[DEV_SM_PERLPI_LPUART1] = SM_SCMI_PERM_ALL, \
+         .perlpiPerms[DEV_SM_PERLPI_LPUART2] = SM_SCMI_PERM_ALL, \
+        .perlpiPerms[DEV_SM_PERLPI_LPUART3] = SM_SCMI_PERM_ALL, \
+         .perlpiPerms[DEV_SM_PERLPI_LPUART4] = SM_SCMI_PERM_ALL, \
+         .perlpiPerms[DEV_SM_PERLPI_LPUART5] = SM_SCMI_PERM_ALL, \
+         .perlpiPerms[DEV_SM_PERLPI_LPUART6] = SM_SCMI_PERM_ALL, \
+@@ -291,6 +285,7 @@
+         .clkPerms[DEV_SM_CLK_LPSPI8] = SM_SCMI_PERM_ALL, \
+         .clkPerms[DEV_SM_CLK_LPUART1] = SM_SCMI_PERM_ALL, \
+         .clkPerms[DEV_SM_CLK_LPUART2] = SM_SCMI_PERM_ALL, \
+        .clkPerms[DEV_SM_CLK_LPUART3] = SM_SCMI_PERM_ALL, \
+         .clkPerms[DEV_SM_CLK_LPUART4] = SM_SCMI_PERM_ALL, \
+         .clkPerms[DEV_SM_CLK_LPUART5] = SM_SCMI_PERM_ALL, \
+         .clkPerms[DEV_SM_CLK_LPUART6] = SM_SCMI_PERM_ALL, \
+@@ -398,6 +393,9 @@
+         .daisyPerms[DEV_SM_DAISY_LPSPI4_SCK] = SM_SCMI_PERM_ALL, \
+         .daisyPerms[DEV_SM_DAISY_LPSPI4_SDI] = SM_SCMI_PERM_ALL, \
+         .daisyPerms[DEV_SM_DAISY_LPSPI4_SDO] = SM_SCMI_PERM_ALL, \
+        .daisyPerms[DEV_SM_DAISY_LPUART3_CTS] = SM_SCMI_PERM_ALL, \
+        .daisyPerms[DEV_SM_DAISY_LPUART3_RXD] = SM_SCMI_PERM_ALL, \
+        .daisyPerms[DEV_SM_DAISY_LPUART3_TXD] = SM_SCMI_PERM_ALL, \
+         .daisyPerms[DEV_SM_DAISY_LPUART4_CTS] = SM_SCMI_PERM_ALL, \
+         .daisyPerms[DEV_SM_DAISY_LPUART4_RXD] = SM_SCMI_PERM_ALL, \
+         .daisyPerms[DEV_SM_DAISY_LPUART4_TXD] = SM_SCMI_PERM_ALL, \
+@@ -482,6 +480,7 @@
+         .perlpiPerms[DEV_SM_PERLPI_GPIO5] = SM_SCMI_PERM_ALL, \
+         .perlpiPerms[DEV_SM_PERLPI_LPUART1] = SM_SCMI_PERM_ALL, \
+         .perlpiPerms[DEV_SM_PERLPI_LPUART2] = SM_SCMI_PERM_ALL, \
+        .perlpiPerms[DEV_SM_PERLPI_LPUART3] = SM_SCMI_PERM_ALL, \
+         .perlpiPerms[DEV_SM_PERLPI_LPUART4] = SM_SCMI_PERM_ALL, \
+         .perlpiPerms[DEV_SM_PERLPI_LPUART5] = SM_SCMI_PERM_ALL, \
+         .perlpiPerms[DEV_SM_PERLPI_LPUART6] = SM_SCMI_PERM_ALL, \
+@@ -536,6 +535,8 @@
+         .pinPerms[DEV_SM_PIN_GPIO_IO11] = SM_SCMI_PERM_ALL, \
+         .pinPerms[DEV_SM_PIN_GPIO_IO12] = SM_SCMI_PERM_ALL, \
+         .pinPerms[DEV_SM_PIN_GPIO_IO13] = SM_SCMI_PERM_ALL, \
+        .pinPerms[DEV_SM_PIN_GPIO_IO14] = SM_SCMI_PERM_ALL, \
+        .pinPerms[DEV_SM_PIN_GPIO_IO15] = SM_SCMI_PERM_ALL, \
+         .pinPerms[DEV_SM_PIN_GPIO_IO16] = SM_SCMI_PERM_ALL, \
+         .pinPerms[DEV_SM_PIN_GPIO_IO17] = SM_SCMI_PERM_ALL, \
+         .pinPerms[DEV_SM_PIN_GPIO_IO18] = SM_SCMI_PERM_ALL, \
+diff --git a/configs/ccimx95dvk/config_test.h b/configs/ccimx95dvk/config_test.h
+index cb737f33eede..efc15c56ffe9 100644
+--- a/configs/ccimx95dvk/config_test.h
+++ b/configs/ccimx95dvk/config_test.h
+@@ -143,12 +143,11 @@
+ /*--------------------------------------------------------------------------*/
+ 
+ /*! Config for number of tests */
+-#define SM_SCMI_NUM_TEST  40U
+#define SM_SCMI_NUM_TEST  35U
+ 
+ /*! Config data array for tests */
+ #define SM_SCMI_TEST_CONFIG_DATA \
+     {.testId = TEST_BUTTON, .channel = 5U, .rsrc = DEV_SM_BUTTON_0}, \
+-    {.testId = TEST_CLK, .channel = 0U, .rsrc = DEV_SM_CLK_LPUART3}, \
+     {.testId = TEST_CLK, .channel = 5U, .rsrc = DEV_SM_CLK_DISPOCRAM}, \
+     {.testId = TEST_CLK, .channel = 5U, .rsrc = DEV_SM_CLK_ENETREF}, \
+     {.testId = TEST_CLK, .channel = 5U, .rsrc = DEV_SM_CLK_ENETTIMER1}, \
+@@ -157,9 +156,6 @@
+     {.testId = TEST_CLK, .channel = 5U, .rsrc = DEV_SM_CLK_SAI1}, \
+     {.testId = TEST_CTRL, .channel = 5U, .rsrc = DEV_SM_CTRL_MQS1_SETTINGS}, \
+     {.testId = TEST_CTRL, .channel = 5U, .rsrc = DEV_SM_CTRL_SAI1_MCLK}, \
+-    {.testId = TEST_DAISY, .channel = 0U, .rsrc = DEV_SM_DAISY_LPUART3_CTS}, \
+-    {.testId = TEST_DAISY, .channel = 0U, .rsrc = DEV_SM_DAISY_LPUART3_RXD}, \
+-    {.testId = TEST_DAISY, .channel = 0U, .rsrc = DEV_SM_DAISY_LPUART3_TXD}, \
+     {.testId = TEST_DAISY, .channel = 5U, .rsrc = DEV_SM_DAISY_NETC_EMDC}, \
+     {.testId = TEST_DAISY, .channel = 5U, .rsrc = DEV_SM_DAISY_NETC_EMDIO}, \
+     {.testId = TEST_DAISY, .channel = 5U, .rsrc = DEV_SM_DAISY_NETC_ETH0_RMII_RX_ER}, \
+@@ -182,7 +178,6 @@
+     {.testId = TEST_PERF, .channel = 5U, .rsrc = DEV_SM_PERF_GPU}, \
+     {.testId = TEST_PERF, .channel = 5U, .rsrc = DEV_SM_PERF_NPU}, \
+     {.testId = TEST_PERF, .channel = 5U, .rsrc = DEV_SM_PERF_VPU}, \
+-    {.testId = TEST_PERLPI, .channel = 0U, .rsrc = DEV_SM_PERLPI_LPUART3}, \
+     {.testId = TEST_PERLPI, .channel = 5U, .rsrc = DEV_SM_PERLPI_LPUART8}, \
+     {.testId = TEST_PIN, .channel = 5U, .rsrc = DEV_SM_PIN_UART1_RXD}, \
+     {.testId = TEST_RTC, .channel = 5U, .rsrc = DEV_SM_RTC_BBNSM}, \
+diff --git a/configs/ccimx95dvk/config_trdc.h b/configs/ccimx95dvk/config_trdc.h
+index 47df6a7577d5..dc6245097316 100644
+--- a/configs/ccimx95dvk/config_trdc.h
+++ b/configs/ccimx95dvk/config_trdc.h
+@@ -1168,7 +1168,7 @@
+         SM_CFG_W1(0x0001065cU), 0x99999999U, \
+         SM_CFG_W1(0x00010660U), 0x00909099U, \
+         SM_CFG_W1(0x00010664U), 0x99090990U, \
+-        SM_CFG_W1(0x00010668U), 0x09999999U, \
+        SM_CFG_W1(0x00010668U), 0x99999999U, \
+         SM_CFG_W1(0x0001066cU), 0x09999999U, \
+         SM_CFG_W1(0x00010670U), 0x99900009U, \
+         SM_CFG_W1(0x00010674U), 0x99999909U, \
+@@ -1178,7 +1178,6 @@
+         SM_CFG_W1(0x000107a8U), 0x00000009U, \
+         SM_CFG_W1(0x00010860U), 0x00090000U, \
+         SM_CFG_W1(0x00010864U), 0x00909009U, \
+-        SM_CFG_W1(0x00010868U), 0x90000000U, \
+         SM_CFG_W1(0x00010878U), 0x00090000U, \
+         SM_CFG_Z1(0x00010a60U), \
+         SM_CFG_Z1(0x00010c60U), \
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0005-ccimx95dvk-move-pads-to-non-secure-A55.patch
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0005-ccimx95dvk-move-pads-to-non-secure-A55.patch
@ -0,0 +1,75 @@
+From: Hector Palacios <hector.palacios@digi.com>
+Date: Wed, 24 Sep 2025 12:26:07 +0200
+Subject: [PATCH] ccimx95dvk: move pads to non-secure A55
+
+The following pads are multiplexed and used by A55 in Linux:
+- PIN_UART2_RXD is used as LPUART1 CTS
+- PIN_UART2_TXD is used as LPUART1 RTS
+- PIN_PDM_BIT_STREAM1 is used as MIKROBUS_RST
+
+Upstream-Status: Inappropriate [DEY specific]
+
+Signed-off-by: Hector Palacios <hector.palacios@digi.com>
+---
+ configs/ccimx95dvk.cfg           | 5 ++++-
+ configs/ccimx95dvk/config_scmi.h | 3 +++
+ 2 files changed, 7 insertions(+), 1 deletion(-)
+
+diff --git a/configs/ccimx95dvk.cfg b/configs/ccimx95dvk.cfg
+index 393c29436894..bf5f0739f526 100755
+--- a/configs/ccimx95dvk.cfg
+++ b/configs/ccimx95dvk.cfg
+@@ -1,6 +1,7 @@
+ ## ###################################################################
+ ##
+ ## Copyright 2023-2025 NXP
+## Copyright 2025 Digi International Inc.
+ ##
+ ## Redistribution and use in source and binary forms, with or without modification,
+ ## are permitted provided that the following conditions are met:
+@@ -285,7 +286,6 @@ L_STCU_NPUMIX       OWNER
+ PIN_FCCU_ERR0         OWNER
+ PIN_I2C1_SCL          OWNER
+ PIN_I2C1_SDA          OWNER
+-PIN_PDM_BIT_STREAM1   OWNER
+ PIN_GPIO_IO08         OWNER  # LPUART7_TX
+ PIN_GPIO_IO09         OWNER  # LPUART7_RX
+ PIN_WDOG_ANY          OWNER
+@@ -937,6 +937,7 @@ PIN_GPIO_IO37        OWNER
+ PIN_I2C2_SCL         OWNER
+ PIN_I2C2_SDA         OWNER
+ PIN_PDM_BIT_STREAM0  OWNER
+PIN_PDM_BIT_STREAM1  OWNER
+ PIN_PDM_CLK          OWNER
+ PIN_SAI1_RXD0        OWNER
+ PIN_SAI1_TXC         OWNER
+@@ -970,6 +971,8 @@ PIN_SD3_DATA2        OWNER
+ PIN_SD3_DATA3        OWNER
+ PIN_UART1_RXD        OWNER, test
+ PIN_UART1_TXD        OWNER
+PIN_UART2_RXD        OWNER
+PIN_UART2_TXD        OWNER
+ PIN_XSPI1_DATA0      OWNER
+ PIN_XSPI1_DATA1      OWNER
+ PIN_XSPI1_DATA2      OWNER
+diff --git a/configs/ccimx95dvk/config_scmi.h b/configs/ccimx95dvk/config_scmi.h
+index 0913c1339af0..510de3d252a2 100644
+--- a/configs/ccimx95dvk/config_scmi.h
+++ b/configs/ccimx95dvk/config_scmi.h
+@@ -562,6 +562,7 @@
+         .pinPerms[DEV_SM_PIN_I2C2_SCL] = SM_SCMI_PERM_ALL, \
+         .pinPerms[DEV_SM_PIN_I2C2_SDA] = SM_SCMI_PERM_ALL, \
+         .pinPerms[DEV_SM_PIN_PDM_BIT_STREAM0] = SM_SCMI_PERM_ALL, \
+        .pinPerms[DEV_SM_PIN_PDM_BIT_STREAM1] = SM_SCMI_PERM_ALL, \
+         .pinPerms[DEV_SM_PIN_PDM_CLK] = SM_SCMI_PERM_ALL, \
+         .pinPerms[DEV_SM_PIN_SAI1_RXD0] = SM_SCMI_PERM_ALL, \
+         .pinPerms[DEV_SM_PIN_SAI1_TXC] = SM_SCMI_PERM_ALL, \
+@@ -595,6 +596,8 @@
+         .pinPerms[DEV_SM_PIN_SD3_DATA3] = SM_SCMI_PERM_ALL, \
+         .pinPerms[DEV_SM_PIN_UART1_RXD] = SM_SCMI_PERM_ALL, \
+         .pinPerms[DEV_SM_PIN_UART1_TXD] = SM_SCMI_PERM_ALL, \
+        .pinPerms[DEV_SM_PIN_UART2_RXD] = SM_SCMI_PERM_ALL, \
+        .pinPerms[DEV_SM_PIN_UART2_TXD] = SM_SCMI_PERM_ALL, \
+         .pinPerms[DEV_SM_PIN_XSPI1_DATA0] = SM_SCMI_PERM_ALL, \
+         .pinPerms[DEV_SM_PIN_XSPI1_DATA1] = SM_SCMI_PERM_ALL, \
+         .pinPerms[DEV_SM_PIN_XSPI1_DATA2] = SM_SCMI_PERM_ALL, \
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0006-ccimx95dvk-move-CAN1-to-be-used-by-A55.patch
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0006-ccimx95dvk-move-CAN1-to-be-used-by-A55.patch
@ -0,0 +1,151 @@
+From: Hector Palacios <hector.palacios@digi.com>
+Date: Wed, 24 Sep 2025 13:01:57 +0200
+Subject: [PATCH] ccimx95dvk: move CAN1 to be used by A55
+
+CAN1 is no longer reserved by M7 but instead moved to
+non-secure A55 so that it can be used by Linux.
+
+Upstream-Status: Inappropriate [DEY specific]
+
+Signed-off-by: Hector Palacios <hector.palacios@digi.com>
+---
+ configs/ccimx95dvk.cfg            |  3 ++-
+ configs/ccimx95dvk/config_bctrl.h | 14 +++++++-------
+ configs/ccimx95dvk/config_scmi.h  |  7 ++++---
+ configs/ccimx95dvk/config_trdc.h  |  3 +--
+ 4 files changed, 14 insertions(+), 13 deletions(-)
+
+diff --git a/configs/ccimx95dvk.cfg b/configs/ccimx95dvk.cfg
+index bf5f0739f526..afec8eb5b738 100755
+--- a/configs/ccimx95dvk.cfg
+++ b/configs/ccimx95dvk.cfg
+@@ -362,7 +362,6 @@ SYS                       ALL
+ # Resources
+ 
+ M7P                 OWNER  # CPUs must be first
+-CAN_FD1             OWNER
+ FSB                 READONLY
+ IRQSTEER_M7         OWNER
+ LPIT1               OWNER
+@@ -461,6 +460,7 @@ CHANNEL             db=1, xport=smt, rpc=scmi, type=p2a_notify
+ 
+ PERF_A55            ALL
+ PERF_DRAM           ALL
+PERLPI_CAN1         ALL
+ PERLPI_CAN2         ALL
+ PERLPI_CAN3         ALL
+ PERLPI_CAN4         ALL
+@@ -582,6 +582,7 @@ CAMERA5             OWNER
+ CAMERA6             OWNER
+ CAMERA7             OWNER
+ CAMERA8             OWNER
+CAN_FD1             OWNER
+ CAN_FD2             OWNER
+ CAN_FD3             OWNER
+ CAN_FD4             OWNER
+diff --git a/configs/ccimx95dvk/config_bctrl.h b/configs/ccimx95dvk/config_bctrl.h
+index a757834c32ab..a55abe03ec02 100644
+--- a/configs/ccimx95dvk/config_bctrl.h
+++ b/configs/ccimx95dvk/config_bctrl.h
+@@ -61,13 +61,13 @@
+ #define SM_BCTRL_A_CONFIG \
+     { \
+         SM_CFG_W1(0x00000008U), 0x00001804U, \
+-        SM_CFG_W1(0x0000000CU), 0x0000E56AU, \
+-        SM_CFG_W1(0x00000010U), 0x0000E56AU, \
+-        SM_CFG_W1(0x00000014U), 0x0000E56AU, \
+-        SM_CFG_W1(0x00000018U), 0x0000E56AU, \
+-        SM_CFG_W1(0x0000001CU), 0x0000E56AU, \
+-        SM_CFG_W1(0x00000020U), 0x0000E56AU, \
+-        SM_CFG_W1(0x00000024U), 0x00000291U, \
+        SM_CFG_W1(0x0000000CU), 0x0000E56BU, \
+        SM_CFG_W1(0x00000010U), 0x0000E56BU, \
+        SM_CFG_W1(0x00000014U), 0x0000E56BU, \
+        SM_CFG_W1(0x00000018U), 0x0000E56BU, \
+        SM_CFG_W1(0x0000001CU), 0x0000E56BU, \
+        SM_CFG_W1(0x00000020U), 0x0000E56BU, \
+        SM_CFG_W1(0x00000024U), 0x00000290U, \
+         SM_CFG_END \
+     }
+ 
+diff --git a/configs/ccimx95dvk/config_scmi.h b/configs/ccimx95dvk/config_scmi.h
+index 510de3d252a2..36cbb06126fe 100644
+--- a/configs/ccimx95dvk/config_scmi.h
+++ b/configs/ccimx95dvk/config_scmi.h
+@@ -66,7 +66,6 @@
+         .secure = 0U, \
+         .seenvId = 1U, \
+         .buttonPerms[DEV_SM_BUTTON_0] = SM_SCMI_PERM_NOTIFY, \
+-        .clkPerms[DEV_SM_CLK_CAN1] = SM_SCMI_PERM_ALL, \
+         .clkPerms[DEV_SM_CLK_LPTMR1] = SM_SCMI_PERM_ALL, \
+         .clkPerms[DEV_SM_CLK_LPTMR2] = SM_SCMI_PERM_ALL, \
+         .clkPerms[DEV_SM_CLK_M7SYSTICK] = SM_SCMI_PERM_ALL, \
+@@ -76,7 +75,6 @@
+         .ctrlPerms[BRD_SM_CTRL_BUTTON] = SM_SCMI_PERM_NOTIFY, \
+         .ctrlPerms[BRD_SM_CTRL_PCA2131] = SM_SCMI_PERM_ALL, \
+         .ctrlPerms[BRD_SM_CTRL_TEST] = SM_SCMI_PERM_ALL, \
+-        .daisyPerms[DEV_SM_DAISY_CAN1_RX] = SM_SCMI_PERM_ALL, \
+         .daisyPerms[DEV_SM_DAISY_LPTMR2_0] = SM_SCMI_PERM_ALL, \
+         .daisyPerms[DEV_SM_DAISY_LPTMR2_1] = SM_SCMI_PERM_ALL, \
+         .daisyPerms[DEV_SM_DAISY_LPTMR2_2] = SM_SCMI_PERM_ALL, \
+@@ -89,7 +87,6 @@
+         .lmmPerms[2] = SM_SCMI_PERM_ALL, \
+         .pdPerms[DEV_SM_PD_M7] = SM_SCMI_PERM_ALL, \
+         .perfPerms[DEV_SM_PERF_M7] = SM_SCMI_PERM_ALL, \
+-        .perlpiPerms[DEV_SM_PERLPI_CAN1] = SM_SCMI_PERM_ALL, \
+         .perlpiPerms[DEV_SM_PERLPI_WDOG5] = SM_SCMI_PERM_ALL, \
+         .rtcPerms[BRD_SM_RTC_PCA2131] = SM_SCMI_PERM_ALL, \
+         .rtcPerms[DEV_SM_RTC_BBNSM] = SM_SCMI_PERM_PRIV, \
+@@ -181,6 +178,7 @@
+         .pdPerms[DEV_SM_PD_A55P] = SM_SCMI_PERM_ALL, \
+         .perfPerms[DEV_SM_PERF_A55] = SM_SCMI_PERM_ALL, \
+         .perfPerms[DEV_SM_PERF_DRAM] = SM_SCMI_PERM_ALL, \
+        .perlpiPerms[DEV_SM_PERLPI_CAN1] = SM_SCMI_PERM_ALL, \
+         .perlpiPerms[DEV_SM_PERLPI_CAN2] = SM_SCMI_PERM_ALL, \
+         .perlpiPerms[DEV_SM_PERLPI_CAN3] = SM_SCMI_PERM_ALL, \
+         .perlpiPerms[DEV_SM_PERLPI_CAN4] = SM_SCMI_PERM_ALL, \
+@@ -237,6 +235,7 @@
+         .clkPerms[DEV_SM_CLK_AUDIOPLL2] = SM_SCMI_PERM_ALL, \
+         .clkPerms[DEV_SM_CLK_AUDIOPLL2_VCO] = SM_SCMI_PERM_ALL, \
+         .clkPerms[DEV_SM_CLK_AUDIOXCVR] = SM_SCMI_PERM_ALL, \
+        .clkPerms[DEV_SM_CLK_CAN1] = SM_SCMI_PERM_ALL, \
+         .clkPerms[DEV_SM_CLK_CAN2] = SM_SCMI_PERM_ALL, \
+         .clkPerms[DEV_SM_CLK_CAN3] = SM_SCMI_PERM_ALL, \
+         .clkPerms[DEV_SM_CLK_CAN4] = SM_SCMI_PERM_ALL, \
+@@ -327,6 +326,7 @@
+         .ctrlPerms[DEV_SM_CTRL_SAI3_MCLK] = SM_SCMI_PERM_ALL, \
+         .ctrlPerms[DEV_SM_CTRL_SAI4_MCLK] = SM_SCMI_PERM_ALL, \
+         .ctrlPerms[DEV_SM_CTRL_SAI5_MCLK] = SM_SCMI_PERM_ALL, \
+        .daisyPerms[DEV_SM_DAISY_CAN1_RX] = SM_SCMI_PERM_ALL, \
+         .daisyPerms[DEV_SM_DAISY_CAN2_RX] = SM_SCMI_PERM_ALL, \
+         .daisyPerms[DEV_SM_DAISY_CAN3_RX] = SM_SCMI_PERM_ALL, \
+         .daisyPerms[DEV_SM_DAISY_CAN4_RX] = SM_SCMI_PERM_ALL, \
+@@ -469,6 +469,7 @@
+         .perfPerms[DEV_SM_PERF_GPU] = SM_SCMI_PERM_ALL, \
+         .perfPerms[DEV_SM_PERF_NPU] = SM_SCMI_PERM_ALL, \
+         .perfPerms[DEV_SM_PERF_VPU] = SM_SCMI_PERM_ALL, \
+        .perlpiPerms[DEV_SM_PERLPI_CAN1] = SM_SCMI_PERM_ALL, \
+         .perlpiPerms[DEV_SM_PERLPI_CAN2] = SM_SCMI_PERM_ALL, \
+         .perlpiPerms[DEV_SM_PERLPI_CAN3] = SM_SCMI_PERM_ALL, \
+         .perlpiPerms[DEV_SM_PERLPI_CAN4] = SM_SCMI_PERM_ALL, \
+diff --git a/configs/ccimx95dvk/config_trdc.h b/configs/ccimx95dvk/config_trdc.h
+index dc6245097316..12ebbc61ca64 100644
+--- a/configs/ccimx95dvk/config_trdc.h
+++ b/configs/ccimx95dvk/config_trdc.h
+@@ -123,7 +123,7 @@
+         SM_CFG_W1(0x00010650U), 0x09000309U, \
+         SM_CFG_W1(0x00010654U), 0x0000C900U, \
+         SM_CFG_W1(0x00010658U), 0x99909900U, \
+-        SM_CFG_W1(0x0001065cU), 0x00009099U, \
+        SM_CFG_W1(0x0001065cU), 0x00009999U, \
+         SM_CFG_W1(0x00010668U), 0x00009900U, \
+         SM_CFG_W1(0x0001066cU), 0x90909000U, \
+         SM_CFG_W1(0x00010670U), 0x00009000U, \
+@@ -132,7 +132,6 @@
+         SM_CFG_Z1(0x00010850U), \
+         SM_CFG_W1(0x00010854U), 0x9000C000U, \
+         SM_CFG_W1(0x00010858U), 0x00000099U, \
+-        SM_CFG_W1(0x0001085cU), 0x00000900U, \
+         SM_CFG_W1(0x00010870U), 0x00000090U, \
+         SM_CFG_W1(0x00010874U), 0x00000999U, \
+         SM_CFG_W1(0x00010980U), 0x900000C0U, \
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0007-ccimx95dvk-remove-PCAL6408A-IO-expander-from-EVK.patch
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0007-ccimx95dvk-remove-PCAL6408A-IO-expander-from-EVK.patch
@ -0,0 +1,453 @@
+From: Hector Palacios <hector.palacios@digi.com>
+Date: Thu, 25 Sep 2025 11:11:20 +0200
+Subject: [PATCH 7/8] ccimx95dvk: remove PCAL6408A IO expander from EVK
+
+NXP used this I2C IO expander on their EVK to process
+wakeup interrupt lines.
+This chip is not available on the DVK.
+
+Signed-off-by: Hector Palacios <hector.palacios@digi.com>
+---
+ boards/ccimx95dvk/board.c              |  1 +
+ boards/ccimx95dvk/sm/Makefile          |  4 +-
+ boards/ccimx95dvk/sm/brd_sm_bbm.c      |  5 +-
+ boards/ccimx95dvk/sm/brd_sm_control.c  | 96 +-------------------------
+ boards/ccimx95dvk/sm/brd_sm_control.h  | 12 ++--
+ boards/ccimx95dvk/sm/brd_sm_handlers.c | 36 +---------
+ boards/ccimx95dvk/sm/brd_sm_handlers.h | 21 +-----
+ configs/ccimx95dvk.cfg                 |  6 --
+ configs/ccimx95dvk/config_scmi.h       |  6 --
+ 9 files changed, 12 insertions(+), 175 deletions(-)
+
+diff --git a/boards/ccimx95dvk/board.c b/boards/ccimx95dvk/board.c
+index 012a04540fd1..1f3c8cd3fdb9 100755
+--- a/boards/ccimx95dvk/board.c
+++ b/boards/ccimx95dvk/board.c
+@@ -1,5 +1,6 @@
+ /*
+  * Copyright 2023-2025 NXP
+ * Copyright 2025 Digi International Inc.
+  *
+  * SPDX-License-Identifier: BSD-3-Clause
+  */
+diff --git a/boards/ccimx95dvk/sm/Makefile b/boards/ccimx95dvk/sm/Makefile
+index d5b576737636..db27ea922733 100755
+--- a/boards/ccimx95dvk/sm/Makefile
+++ b/boards/ccimx95dvk/sm/Makefile
+@@ -1,6 +1,7 @@
+ ## ###################################################################
+ ##
+ ## Copyright 2023 NXP
+## Copyright 2025 Digi International Inc.
+ ##
+ ## Redistribution and use in source and binary forms, with or without modification,
+ ## are permitted provided that the following conditions are met:
+@@ -40,7 +41,6 @@ INCLUDE +=  \
+ 	-I$(BOARDS_DIR)  \
+ 	-I$(BOARD_DIR)  \
+ 	-I$(BOARD_DIR)/sm \
+-	-I$(COMPONENTS_DIR)/pcal6408a  \
+ 	-I$(COMPONENTS_DIR)/pf09  \
+ 	-I$(COMPONENTS_DIR)/pf53  \
+ 	-I$(COMPONENTS_DIR)/pca2131
+@@ -50,7 +50,6 @@ VPATH +=  \
+ 	$(BOARDS_DIR)  \
+ 	$(BOARD_DIR)  \
+ 	$(BOARD_DIR)/sm  \
+-	$(COMPONENTS_DIR)/pcal6408a  \
+ 	$(COMPONENTS_DIR)/pf09  \
+ 	$(COMPONENTS_DIR)/pf53  \
+ 	$(COMPONENTS_DIR)/pca2131
+@@ -63,7 +62,6 @@ OBJS += \
+ 	$(OUT)/brd_sm_sensor.o  \
+ 	$(OUT)/brd_sm_voltage.o  \
+ 	$(OUT)/brd_sm_bbm.o  \
+-	$(OUT)/fsl_pcal6408a.o  \
+ 	$(OUT)/fsl_pf09.o  \
+ 	$(OUT)/fsl_pf53.o  \
+ 	$(OUT)/fsl_pca2131.o
+diff --git a/boards/ccimx95dvk/sm/brd_sm_bbm.c b/boards/ccimx95dvk/sm/brd_sm_bbm.c
+index c2e5cd61dc9f..2b13931c7749 100755
+--- a/boards/ccimx95dvk/sm/brd_sm_bbm.c
+++ b/boards/ccimx95dvk/sm/brd_sm_bbm.c
+@@ -2,6 +2,7 @@
+ ** ###################################################################
+ **
+ ** Copyright 2025 NXP
+** Copyright 2025 Digi International Inc.
+ **
+ ** Redistribution and use in source and binary forms, with or without modification,
+ ** are permitted provided that the following conditions are met:
+@@ -415,8 +416,6 @@ int32_t BRD_SM_BbmRtcAlarmSet(uint32_t rtcId, bool enable, uint64_t val)
+                     /* Enable interrupt */
+                     if (PCA2131_IntEnable(&g_pca2131Dev, true))
+                     {
+-                        /* Enable bus expander interrupt */
+-                        status = BRD_SM_BusExpMaskSet(0U, BIT8(6));
+                     }
+                     else
+                     {
+@@ -440,8 +439,6 @@ int32_t BRD_SM_BbmRtcAlarmSet(uint32_t rtcId, bool enable, uint64_t val)
+             /* Disable interrupt */
+             if (PCA2131_IntEnable(&g_pca2131Dev, false))
+             {
+-                /* Disable bus expander interrupt */
+-                status = BRD_SM_BusExpMaskSet(BIT8(6), BIT8(6));
+             }
+             else
+             {
+diff --git a/boards/ccimx95dvk/sm/brd_sm_control.c b/boards/ccimx95dvk/sm/brd_sm_control.c
+index 5b36c66c593c..8484a6895a3d 100755
+--- a/boards/ccimx95dvk/sm/brd_sm_control.c
+++ b/boards/ccimx95dvk/sm/brd_sm_control.c
+@@ -2,6 +2,7 @@
+ ** ###################################################################
+ **
+ **     Copyright 2023-2024 NXP
+**     Copyright 2025 Digi International Inc.
+ **
+ **     Redistribution and use in source and binary forms, with or without modification,
+ **     are permitted provided that the following conditions are met:
+@@ -44,13 +45,6 @@
+ 
+ /* Local defines */
+ 
+-/* PCAL6408A input signals */
+-#define PCAL6408A_INPUT_SD3_WAKE     0U
+-#define PCAL6408A_INPUT_PCIE1_WAKE   4U
+-#define PCAL6408A_INPUT_BT_WAKE      5U
+-#define PCAL6408A_INPUT_PCIE2_WAKE   6U
+-#define PCAL6408A_INPUT_BUTTON       7U
+-
+ /* Local types */
+ 
+ /* Local variables */
+@@ -117,26 +111,7 @@ int32_t BRD_SM_ControlGet(uint32_t ctrlId, uint32_t *numRtn, uint32_t *rtn)
+         }
+         else
+         {
+-            uint8_t data;
+-
+-            /* Read expander data input */
+-            if (PCAL6408A_InputGet(&g_pcal6408aDev, &data))
+-            {
+-                uint32_t shift = ctrlId - DEV_SM_NUM_CTRL;
+-
+-                /* Adjust bit position */
+-                if (shift > 0U)
+-                {
+-                    shift += 3U;
+-                }
+-
+-                *numRtn = 1U;
+-                rtn[0] = (((uint32_t) data) >> shift) & 0x1UL;
+-            }
+-            else
+-            {
+-                status = SM_ERR_HARDWARE_ERROR;
+-            }
+            status = SM_ERR_HARDWARE_ERROR;
+         }
+     }
+     else
+@@ -231,41 +206,12 @@ int32_t BRD_SM_ControlFlagsSet(uint32_t ctrlId, uint32_t flags)
+     }
+     else
+     {
+-        uint8_t mask;
+-        uint32_t val;
+-        uint32_t enb = (flags != 0U) ? 0U : 1U;
+-
+         switch (ctrlId)
+         {
+-            case BRD_SM_CTRL_SD3_WAKE:
+-                mask = BIT8(PCAL6408A_INPUT_SD3_WAKE);
+-                val = (enb & 0x1U) << PCAL6408A_INPUT_SD3_WAKE;
+-                break;
+-            case BRD_SM_CTRL_PCIE1_WAKE:
+-                mask = BIT8(PCAL6408A_INPUT_PCIE1_WAKE);
+-                val = (enb & 0x1U) << PCAL6408A_INPUT_PCIE1_WAKE;
+-                break;
+-            case BRD_SM_CTRL_BT_WAKE:
+-                mask = BIT8(PCAL6408A_INPUT_BT_WAKE);
+-                val = (enb & 0x1U) << PCAL6408A_INPUT_BT_WAKE;
+-                break;
+-            case BRD_SM_CTRL_PCIE2_WAKE:
+-                mask = BIT8(PCAL6408A_INPUT_PCIE2_WAKE);
+-                val = (enb & 0x1U) << PCAL6408A_INPUT_PCIE2_WAKE;
+-                break;
+-            case BRD_SM_CTRL_BUTTON:
+-                mask = BIT8(PCAL6408A_INPUT_BUTTON);
+-                val = (enb & 0x1U) << PCAL6408A_INPUT_BUTTON;
+-                break;
+             default:
+                 status = SM_ERR_NOT_FOUND;
+                 break;
+         }
+-
+-        if (status == SM_ERR_SUCCESS)
+-        {
+-            status = BRD_SM_BusExpMaskSet((uint8_t) val, mask);
+-        }
+     }
+ 
+     return status;
+@@ -276,42 +222,6 @@ int32_t BRD_SM_ControlFlagsSet(uint32_t ctrlId, uint32_t flags)
+ /*--------------------------------------------------------------------------*/
+ void BRD_SM_ControlHandler(uint8_t status, uint8_t val)
+ {
+-    uint32_t data = (uint32_t) val;
+-
+-    /* Handle SD3 wake */
+-    if ((status & BIT8(PCAL6408A_INPUT_SD3_WAKE)) != 0U)
+-    {
+-        LMM_MiscControlEvent(BRD_SM_CTRL_SD3_WAKE,
+-            ((data >> PCAL6408A_INPUT_SD3_WAKE) & 0x1U) + 1U);
+-    }
+-
+-    /* Handle PCIe1 wake */
+-    if ((status & BIT8(PCAL6408A_INPUT_PCIE1_WAKE)) != 0U)
+-    {
+-        LMM_MiscControlEvent(BRD_SM_CTRL_PCIE1_WAKE,
+-            ((data >> PCAL6408A_INPUT_PCIE1_WAKE) & 0x1U) + 1U);
+-    }
+-
+-    /* Handle BT wake */
+-    if ((status & BIT8(PCAL6408A_INPUT_BT_WAKE)) != 0U)
+-    {
+-        LMM_MiscControlEvent(BRD_SM_CTRL_BT_WAKE,
+-            ((data >> PCAL6408A_INPUT_BT_WAKE) & 0x1U) + 1U);
+-    }
+-
+-    /* Handle PCIe2 wake */
+-    if (((status & BIT8(PCAL6408A_INPUT_PCIE2_WAKE)) != 0U)
+-        && !g_pca2131Used)
+-    {
+-        LMM_MiscControlEvent(BRD_SM_CTRL_PCIE2_WAKE,
+-            ((data >> PCAL6408A_INPUT_PCIE2_WAKE) & 0x1U) + 1U);
+-    }
+-
+-    /* Handle button */
+-    if ((status & BIT8(PCAL6408A_INPUT_BUTTON)) != 0U)
+-    {
+-        LMM_MiscControlEvent(BRD_SM_CTRL_BUTTON,
+-            ((data >> PCAL6408A_INPUT_BUTTON) & 0x1U) + 1U);
+-    }
+    // Call pertinent LMM_MiscControlEvent()
+ }
+ 
+diff --git a/boards/ccimx95dvk/sm/brd_sm_control.h b/boards/ccimx95dvk/sm/brd_sm_control.h
+index bf893782e1d7..12365e56d7e4 100755
+--- a/boards/ccimx95dvk/sm/brd_sm_control.h
+++ b/boards/ccimx95dvk/sm/brd_sm_control.h
+@@ -2,6 +2,7 @@
+ ** ###################################################################
+ **
+ **     Copyright 2023-2024 NXP
+**     Copyright 2025 Digi International Inc.
+ **
+ **     Redistribution and use in source and binary forms, with or without modification,
+ **     are permitted provided that the following conditions are met:
+@@ -66,7 +67,7 @@
+ /** @} */
+ 
+ /*! Number of board controls */
+-#define BRD_SM_NUM_CTRL  7UL
+#define BRD_SM_NUM_CTRL  2UL
+ 
+ /*! Total number of controls */
+ #define SM_NUM_CTRL  (DEV_SM_NUM_CTRL + BRD_SM_NUM_CTRL)
+@@ -75,13 +76,8 @@
+  * @name BRD_SM control domain indexes
+  */
+ /** @{ */
+-#define BRD_SM_CTRL_SD3_WAKE    (DEV_SM_NUM_CTRL + 0U)  /*!< PCAL6408A-0 */
+-#define BRD_SM_CTRL_PCIE1_WAKE  (DEV_SM_NUM_CTRL + 1U)  /*!< PCAL6408A-4 */
+-#define BRD_SM_CTRL_BT_WAKE     (DEV_SM_NUM_CTRL + 2U)  /*!< PCAL6408A-5 */
+-#define BRD_SM_CTRL_PCIE2_WAKE  (DEV_SM_NUM_CTRL + 3U)  /*!< PCAL6408A-6 */
+-#define BRD_SM_CTRL_BUTTON      (DEV_SM_NUM_CTRL + 4U)  /*!< PCAL6408A-7 */
+-#define BRD_SM_CTRL_TEST        (DEV_SM_NUM_CTRL + 5U)  /*!< Test */
+-#define BRD_SM_CTRL_PCA2131     (DEV_SM_NUM_CTRL + 6U)  /*!< PCA2131 raw access */
+#define BRD_SM_CTRL_TEST        (DEV_SM_NUM_CTRL + 0U)  /*!< Test */
+#define BRD_SM_CTRL_PCA2131     (DEV_SM_NUM_CTRL + 1U)  /*!< PCA2131 raw access */
+ /** @} */
+ 
+ /* Types */
+diff --git a/boards/ccimx95dvk/sm/brd_sm_handlers.c b/boards/ccimx95dvk/sm/brd_sm_handlers.c
+index 19ee28e93134..a42359f15e8b 100755
+--- a/boards/ccimx95dvk/sm/brd_sm_handlers.c
+++ b/boards/ccimx95dvk/sm/brd_sm_handlers.c
+@@ -2,6 +2,7 @@
+ ** ###################################################################
+ **
+ ** Copyright 2023-2025 NXP
+** Copyright 2025 Digi International Inc.
+ **
+ ** Redistribution and use in source and binary forms, with or without modification,
+ ** are permitted provided that the following conditions are met:
+@@ -48,23 +49,16 @@
+ 
+ /* I2C device addresses */
+ #define BOARD_PF09_DEV_ADDR         0x08U
+-#define BOARD_PCAL6408A_DEV_ADDR    0x20U
+ #define BOARD_PF5301_DEV_ADDR       0x2AU
+ #define BOARD_PF5302_DEV_ADDR       0x29U
+ #define BOARD_PCA2131_DEV_ADDR      0x53U
+ 
+-#define PCAL6408A_INPUT_PF53_ARM_PG  1U
+-#define PCAL6408A_INPUT_PF53_SOC_PG  2U
+-#define PCAL6408A_INPUT_PF09_INT     3U
+-#define PCAL6408A_INPUT_PCA2131_INT  6U
+-
+ /* Local types */
+ 
+ /* Local variables */
+ 
+ /* Global variables */
+ 
+-PCAL6408A_Type g_pcal6408aDev;
+ PF09_Type g_pf09Dev;
+ PF53_Type g_pf5301Dev;
+ PF53_Type g_pf5302Dev;
+@@ -238,34 +232,6 @@ int32_t BRD_SM_SerialDevicesInit(void)
+     return status;
+ }
+ 
+-/*--------------------------------------------------------------------------*/
+-/* Set bus expander interrupt mask                                          */
+-/*--------------------------------------------------------------------------*/
+-int32_t BRD_SM_BusExpMaskSet(uint8_t val, uint8_t mask)
+-{
+-    int32_t status = SM_ERR_SUCCESS;
+-    static uint8_t cachedMask = PCAL6408A_INITIAL_MASK;
+-    uint8_t newMask = (cachedMask & ~mask);
+-
+-    newMask |= val;
+-
+-    /* Mask changed? */
+-    if (cachedMask != newMask)
+-    {
+-        if (PCAL6408A_IntMaskSet(&g_pcal6408aDev, newMask))
+-        {
+-            cachedMask = newMask;
+-        }
+-        else
+-        {
+-            status = SM_ERR_HARDWARE_ERROR;
+-        }
+-    }
+-
+-    /* Return status */
+-    return status;
+-}
+-
+ /*==========================================================================*/
+ 
+ /*--------------------------------------------------------------------------*/
+diff --git a/boards/ccimx95dvk/sm/brd_sm_handlers.h b/boards/ccimx95dvk/sm/brd_sm_handlers.h
+index e34d52b50f7a..781a443e8444 100755
+--- a/boards/ccimx95dvk/sm/brd_sm_handlers.h
+++ b/boards/ccimx95dvk/sm/brd_sm_handlers.h
+@@ -2,6 +2,7 @@
+ ** ###################################################################
+ **
+ ** Copyright 2023-2024 NXP
+** Copyright 2025 Digi International Inc.
+ **
+ ** Redistribution and use in source and binary forms, with or without modification,
+ ** are permitted provided that the following conditions are met:
+@@ -52,16 +53,12 @@
+ 
+ #include "sm.h"
+ #include "dev_sm.h"
+-#include "fsl_pcal6408a.h"
+ #include "fsl_pf09.h"
+ #include "fsl_pf53.h"
+ #include "fsl_pca2131.h"
+ 
+ /* Defines */
+ 
+-/*! Initial PCAL6408A interrupt mask */
+-#define PCAL6408A_INITIAL_MASK  0xF7U
+-
+ /*! Number of board IRQs participating dynamic prioritization */
+ #define BOARD_NUM_IRQ_PRIO_IDX                 1U
+ 
+@@ -72,9 +69,6 @@
+ 
+ /* External variables */
+ 
+-/*! Handle to access PCAL6408A */
+-extern PCAL6408A_Type g_pcal6408aDev;
+-
+ /*! Handle to access PF09 */
+ extern PF09_Type g_pf09Dev;
+ 
+@@ -105,19 +99,6 @@ extern uint32_t g_pmicFaultFlags;
+  */
+ int32_t BRD_SM_SerialDevicesInit(void);
+ 
+-/*!
+- * Enable/disable bus expander interrupts.
+- *
+- * @param[in]     val      Value to write
+- * @param[in]     mask     Mask of bits to modify
+- *
+- * This function allows a caller to configure the bus expander.
+- * interrupts.
+- *
+- * @return Returns the status (::SM_ERR_SUCCESS = success).
+- */
+-int32_t BRD_SM_BusExpMaskSet(uint8_t val, uint8_t mask);
+-
+ /*!
+  * GPIO 1 interrupt 0 handler.
+  */
+diff --git a/configs/ccimx95dvk.cfg b/configs/ccimx95dvk.cfg
+index afec8eb5b738..4af5cea789d9 100755
+--- a/configs/ccimx95dvk.cfg
+++ b/configs/ccimx95dvk.cfg
+@@ -345,7 +345,6 @@ CHANNEL             db=2, xport=smt, check=crc32, rpc=scmi, \
+ 
+ # API
+ 
+-BRD_SM_CTRL_BUTTON        NOTIFY
+ BRD_SM_CTRL_PCA2131       ALL
+ BRD_SM_CTRL_TEST          ALL
+ BRD_SM_RTC_PCA2131        ALL
+@@ -532,11 +531,6 @@ CHANNEL             db=1, xport=smt, rpc=scmi, type=p2a_notify
+ 
+ AUDIO_PLL1                ALL
+ AUDIO_PLL2                ALL
+-BRD_SM_CTRL_BT_WAKE       NOTIFY
+-BRD_SM_CTRL_BUTTON        NOTIFY
+-BRD_SM_CTRL_PCIE1_WAKE    NOTIFY
+-BRD_SM_CTRL_PCIE2_WAKE    NOTIFY
+-BRD_SM_CTRL_SD3_WAKE      NOTIFY
+ BRD_SM_RTC_PCA2131        PRIV
+ BRD_SM_SENSOR_TEMP_PF09   ALL
+ BRD_SM_SENSOR_TEMP_PF5301 SET
+diff --git a/configs/ccimx95dvk/config_scmi.h b/configs/ccimx95dvk/config_scmi.h
+index 36cbb06126fe..d251f7910b39 100644
+--- a/configs/ccimx95dvk/config_scmi.h
+++ b/configs/ccimx95dvk/config_scmi.h
+@@ -72,7 +72,6 @@
+         .clkPerms[DEV_SM_CLK_M7] = SM_SCMI_PERM_ALL, \
+         .clkPerms[DEV_SM_CLK_TSTMR2] = SM_SCMI_PERM_ALL, \
+         .cpuPerms[DEV_SM_CPU_M7P] = SM_SCMI_PERM_ALL, \
+-        .ctrlPerms[BRD_SM_CTRL_BUTTON] = SM_SCMI_PERM_NOTIFY, \
+         .ctrlPerms[BRD_SM_CTRL_PCA2131] = SM_SCMI_PERM_ALL, \
+         .ctrlPerms[BRD_SM_CTRL_TEST] = SM_SCMI_PERM_ALL, \
+         .daisyPerms[DEV_SM_DAISY_LPTMR2_0] = SM_SCMI_PERM_ALL, \
+@@ -314,11 +313,6 @@
+         .clkPerms[DEV_SM_CLK_VIDEOPLL1_VCO] = SM_SCMI_PERM_ALL, \
+         .clkPerms[DEV_SM_CLK_VPUDSP] = SM_SCMI_PERM_ALL, \
+         .clkPerms[DEV_SM_CLK_XSPISLVROOT] = SM_SCMI_PERM_ALL, \
+-        .ctrlPerms[BRD_SM_CTRL_BT_WAKE] = SM_SCMI_PERM_NOTIFY, \
+-        .ctrlPerms[BRD_SM_CTRL_BUTTON] = SM_SCMI_PERM_NOTIFY, \
+-        .ctrlPerms[BRD_SM_CTRL_PCIE1_WAKE] = SM_SCMI_PERM_NOTIFY, \
+-        .ctrlPerms[BRD_SM_CTRL_PCIE2_WAKE] = SM_SCMI_PERM_NOTIFY, \
+-        .ctrlPerms[BRD_SM_CTRL_SD3_WAKE] = SM_SCMI_PERM_NOTIFY, \
+         .ctrlPerms[DEV_SM_CTRL_ADC_TEST] = SM_SCMI_PERM_ALL, \
+         .ctrlPerms[DEV_SM_CTRL_MQS1_SETTINGS] = SM_SCMI_PERM_ALL, \
+         .ctrlPerms[DEV_SM_CTRL_PDM_CLK_SEL] = SM_SCMI_PERM_ALL, \
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0008-ccimx95dvk-remove-PCA2123-RTC-from-EVK.patch
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0008-ccimx95dvk-remove-PCA2123-RTC-from-EVK.patch
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0009-ccimx95-change-names-of-voltage-regulators.patch
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0009-ccimx95-change-names-of-voltage-regulators.patch
@ -0,0 +1,274 @@
+From: Hector Palacios <hector.palacios@digi.com>
+Date: Mon, 29 Sep 2025 13:02:02 +0200
+Subject: [PATCH 09/11] ccimx95: change names of voltage regulators
+
+Change the names of voltage regulators for easier identification.
+Use the PMIC regulator (SW1, SW2, LDO1...) and then the name of the power
+rail used in the SOM.
+
+Signed-off-by: Hector Palacios <hector.palacios@digi.com>
+---
+ boards/ccimx95dvk/sm/brd_sm_voltage.c | 85 ++++++++++++++-------------
+ boards/ccimx95dvk/sm/brd_sm_voltage.h | 15 ++---
+ 2 files changed, 51 insertions(+), 49 deletions(-)
+
+diff --git a/boards/ccimx95dvk/sm/brd_sm_voltage.c b/boards/ccimx95dvk/sm/brd_sm_voltage.c
+index b81ffd970294..d7e7c9b3ea27 100755
+--- a/boards/ccimx95dvk/sm/brd_sm_voltage.c
+++ b/boards/ccimx95dvk/sm/brd_sm_voltage.c
+@@ -2,6 +2,7 @@
+ ** ###################################################################
+ **
+ **     Copyright 2023-2025 NXP
+**     Copyright 2025 Digi International Inc.
+ **
+ **     Redistribution and use in source and binary forms, with or without modification,
+ **     are permitted provided that the following conditions are met:
+@@ -63,13 +64,13 @@ int32_t BRD_SM_VoltageNameGet(uint32_t domainId, string *voltNameAddr,
+ 
+     static string const s_name[BRD_SM_NUM_VOLT] =
+     {
+-        "vdd_gpio_3p3",
+-        "vdd_ana_0p8",
+-        "vdd_gpio_1p8",
+-        "vddq_ddr",
+-        "vdd2_ddr",
+-        "sd_card",
+-        "nvcc_sd2"
+        "vdd_3v3",
+        "vdd_ana_0v8",
+        "vdd_1v8",
+        "lpd5_vddq",
+        "lpd5_vdd2",
+        "vdd_ldo1",
+        "vdd_sdio2"
+     };
+ 
+     /* Get max string width */
+@@ -117,25 +118,25 @@ int32_t BRD_SM_VoltageDescribe(uint32_t domainId,
+         case DEV_SM_VOLT_ARM:
+             status = DEV_SM_VoltageDescribe(domainId, range);
+             break;
+-        case BRD_SM_VOLT_VDD_GPIO_3P3:
+        case BRD_SM_VOLT_SW1_VDD_3V3:
+             rc = PF09_RegulatorInfoGet(PF09_REG_SW1, &info);
+             break;
+-        case BRD_SM_VOLT_VDD_ANA_0P8:
+        case BRD_SM_VOLT_SW2_VDD_ANA_0V8:
+             rc = PF09_RegulatorInfoGet(PF09_REG_SW2, &info);
+             break;
+-        case BRD_SM_VOLT_VDD_GPIO_1P8:
+        case BRD_SM_VOLT_SW3_VDD_1V8:
+             rc = PF09_RegulatorInfoGet(PF09_REG_SW3, &info);
+             break;
+-        case BRD_SM_VOLT_VDDQ_DDR:
+        case BRD_SM_VOLT_SW4_LPD5_VDDQ:
+             rc = PF09_RegulatorInfoGet(PF09_REG_SW4, &info);
+             break;
+-        case BRD_SM_VOLT_VDD2_DDR:
+        case BRD_SM_VOLT_SW5_LPD5_VDD2:
+             rc = PF09_RegulatorInfoGet(PF09_REG_SW5, &info);
+             break;
+-        case BRD_SM_VOLT_SD_CARD:
+        case BRD_SM_VOLT_LDO1_VDD_LDO1:
+             rc = PF09_RegulatorInfoGet(PF09_REG_LDO1, &info);
+             break;
+-        case BRD_SM_VOLT_NVCC_SD2:
+        case BRD_SM_VOLT_LDO2_VDD_SDIO2:
+             rc = PF09_RegulatorInfoGet(PF09_REG_LDO2, &info);
+             break;
+         default:
+@@ -206,31 +207,31 @@ int32_t BRD_SM_VoltageModeSet(uint32_t domainId, uint8_t voltMode)
+                 s_modeArm = voltMode;
+             }
+             break;
+-        case BRD_SM_VOLT_VDD_GPIO_3P3:
+        case BRD_SM_VOLT_SW1_VDD_3V3:
+             rc = PF09_SwModeSet(&g_pf09Dev, PF09_REG_SW1, PF09_STATE_VRUN,
+                 mode);
+             break;
+-        case BRD_SM_VOLT_VDD_ANA_0P8:
+        case BRD_SM_VOLT_SW2_VDD_ANA_0V8:
+             rc = PF09_SwModeSet(&g_pf09Dev, PF09_REG_SW2, PF09_STATE_VRUN,
+                 mode);
+             break;
+-        case BRD_SM_VOLT_VDD_GPIO_1P8:
+        case BRD_SM_VOLT_SW3_VDD_1V8:
+             rc = PF09_SwModeSet(&g_pf09Dev, PF09_REG_SW3, PF09_STATE_VRUN,
+                 mode);
+             break;
+-        case BRD_SM_VOLT_VDDQ_DDR:
+        case BRD_SM_VOLT_SW4_LPD5_VDDQ:
+             rc = PF09_SwModeSet(&g_pf09Dev, PF09_REG_SW4, PF09_STATE_VRUN,
+                 mode);
+             break;
+-        case BRD_SM_VOLT_VDD2_DDR:
+        case BRD_SM_VOLT_SW5_LPD5_VDD2:
+             rc = PF09_SwModeSet(&g_pf09Dev, PF09_REG_SW5, PF09_STATE_VRUN,
+                 mode);
+             break;
+-        case BRD_SM_VOLT_SD_CARD:
+        case BRD_SM_VOLT_LDO1_VDD_LDO1:
+             rc = PF09_LdoEnable(&g_pf09Dev, PF09_REG_LDO1, PF09_STATE_VRUN,
+                 enable);
+             break;
+-        case BRD_SM_VOLT_NVCC_SD2:
+        case BRD_SM_VOLT_LDO2_VDD_SDIO2:
+             rc = PF09_LdoEnable(&g_pf09Dev, PF09_REG_LDO2, PF09_STATE_VRUN,
+                 enable);
+             break;
+@@ -271,36 +272,36 @@ int32_t BRD_SM_VoltageModeGet(uint32_t domainId, uint8_t *voltMode)
+             rc = PF09_GpioCtrlGet(&g_pf09Dev, PF09_GPIO4, PF53_STATE_VRUN,
+                 &enable);
+             break;
+-        case BRD_SM_VOLT_VDD_GPIO_3P3:
+        case BRD_SM_VOLT_SW1_VDD_3V3:
+             rc = PF09_SwModeGet(&g_pf09Dev, PF09_REG_SW1, PF09_STATE_VRUN,
+                 &mode);
+             enable = (mode != PF09_SW_MODE_OFF);
+             break;
+-        case BRD_SM_VOLT_VDD_ANA_0P8:
+        case BRD_SM_VOLT_SW2_VDD_ANA_0V8:
+             rc = PF09_SwModeGet(&g_pf09Dev, PF09_REG_SW2, PF09_STATE_VRUN,
+                 &mode);
+             enable = (mode != PF09_SW_MODE_OFF);
+             break;
+-        case BRD_SM_VOLT_VDD_GPIO_1P8:
+        case BRD_SM_VOLT_SW3_VDD_1V8:
+             rc = PF09_SwModeGet(&g_pf09Dev, PF09_REG_SW3, PF09_STATE_VRUN,
+                 &mode);
+             enable = (mode != PF09_SW_MODE_OFF);
+             break;
+-        case BRD_SM_VOLT_VDDQ_DDR:
+        case BRD_SM_VOLT_SW4_LPD5_VDDQ:
+             rc = PF09_SwModeGet(&g_pf09Dev, PF09_REG_SW4, PF09_STATE_VRUN,
+                 &mode);
+             enable = (mode != PF09_SW_MODE_OFF);
+             break;
+-        case BRD_SM_VOLT_VDD2_DDR:
+        case BRD_SM_VOLT_SW5_LPD5_VDD2:
+             rc = PF09_SwModeGet(&g_pf09Dev, PF09_REG_SW5, PF09_STATE_VRUN,
+                 &mode);
+             enable = (mode != PF09_SW_MODE_OFF);
+             break;
+-        case BRD_SM_VOLT_SD_CARD:
+        case BRD_SM_VOLT_LDO1_VDD_LDO1:
+             rc = PF09_LdoIsEnabled(&g_pf09Dev, PF09_REG_LDO1, PF09_STATE_VRUN,
+                 &enable);
+             break;
+-        case BRD_SM_VOLT_NVCC_SD2:
+        case BRD_SM_VOLT_LDO2_VDD_SDIO2:
+             rc = PF09_LdoIsEnabled(&g_pf09Dev, PF09_REG_LDO2, PF09_STATE_VRUN,
+                 &enable);
+             break;
+@@ -359,31 +360,31 @@ int32_t BRD_SM_VoltageLevelSet(uint32_t domainId, int32_t voltageLevel)
+                 s_levelArm = (int32_t) level;
+                 rc = true;
+                 break;
+-            case BRD_SM_VOLT_VDD_GPIO_3P3:
+            case BRD_SM_VOLT_SW1_VDD_3V3:
+                 rc = PF09_VoltageSet(&g_pf09Dev, PF09_REG_SW1, PF09_STATE_VRUN,
+                     level);
+                 break;
+-            case BRD_SM_VOLT_VDD_ANA_0P8:
+            case BRD_SM_VOLT_SW2_VDD_ANA_0V8:
+                 rc = PF09_VoltageSet(&g_pf09Dev, PF09_REG_SW2, PF09_STATE_VRUN,
+                     level);
+                 break;
+-            case BRD_SM_VOLT_VDD_GPIO_1P8:
+            case BRD_SM_VOLT_SW3_VDD_1V8:
+                 rc = PF09_VoltageSet(&g_pf09Dev, PF09_REG_SW3, PF09_STATE_VRUN,
+                     level);
+                 break;
+-            case BRD_SM_VOLT_VDDQ_DDR:
+            case BRD_SM_VOLT_SW4_LPD5_VDDQ:
+                 rc = PF09_VoltageSet(&g_pf09Dev, PF09_REG_SW4, PF09_STATE_VRUN,
+                     level);
+                 break;
+-            case BRD_SM_VOLT_VDD2_DDR:
+            case BRD_SM_VOLT_SW5_LPD5_VDD2:
+                 rc = PF09_VoltageSet(&g_pf09Dev, PF09_REG_SW5, PF09_STATE_VRUN,
+                     level);
+                 break;
+-            case BRD_SM_VOLT_SD_CARD:
+            case BRD_SM_VOLT_LDO1_VDD_LDO1:
+                 rc = PF09_VoltageSet(&g_pf09Dev, PF09_REG_LDO1, PF09_STATE_VRUN,
+                     level);
+                 break;
+-            case BRD_SM_VOLT_NVCC_SD2:
+            case BRD_SM_VOLT_LDO2_VDD_SDIO2:
+                 rc = PF09_VoltageSet(&g_pf09Dev, PF09_REG_LDO2, PF09_STATE_VRUN,
+                     level);
+                 break;
+@@ -458,31 +459,31 @@ int32_t BRD_SM_VoltageLevelGet(uint32_t domainId, int32_t *voltageLevel)
+                 }
+             }
+             break;
+-        case BRD_SM_VOLT_VDD_GPIO_3P3:
+        case BRD_SM_VOLT_SW1_VDD_3V3:
+             rc = PF09_VoltageGet(&g_pf09Dev, PF09_REG_SW1, PF09_STATE_VRUN,
+                 &level);
+             break;
+-        case BRD_SM_VOLT_VDD_ANA_0P8:
+        case BRD_SM_VOLT_SW2_VDD_ANA_0V8:
+             rc = PF09_VoltageGet(&g_pf09Dev, PF09_REG_SW2, PF09_STATE_VRUN,
+                 &level);
+             break;
+-        case BRD_SM_VOLT_VDD_GPIO_1P8:
+        case BRD_SM_VOLT_SW3_VDD_1V8:
+             rc = PF09_VoltageGet(&g_pf09Dev, PF09_REG_SW3, PF09_STATE_VRUN,
+                 &level);
+             break;
+-        case BRD_SM_VOLT_VDDQ_DDR:
+        case BRD_SM_VOLT_SW4_LPD5_VDDQ:
+             rc = PF09_VoltageGet(&g_pf09Dev, PF09_REG_SW4, PF09_STATE_VRUN,
+                 &level);
+             break;
+-        case BRD_SM_VOLT_VDD2_DDR:
+        case BRD_SM_VOLT_SW5_LPD5_VDD2:
+             rc = PF09_VoltageGet(&g_pf09Dev, PF09_REG_SW5, PF09_STATE_VRUN,
+                 &level);
+             break;
+-        case BRD_SM_VOLT_SD_CARD:
+        case BRD_SM_VOLT_LDO1_VDD_LDO1:
+             rc = PF09_VoltageGet(&g_pf09Dev, PF09_REG_LDO1, PF09_STATE_VRUN,
+                 &level);
+             break;
+-        case BRD_SM_VOLT_NVCC_SD2:
+        case BRD_SM_VOLT_LDO2_VDD_SDIO2:
+             rc = PF09_VoltageGet(&g_pf09Dev, PF09_REG_LDO2, PF09_STATE_VRUN,
+                 &level);
+             break;
+diff --git a/boards/ccimx95dvk/sm/brd_sm_voltage.h b/boards/ccimx95dvk/sm/brd_sm_voltage.h
+index 6c9e01286e7e..46ddc9d89096 100755
+--- a/boards/ccimx95dvk/sm/brd_sm_voltage.h
+++ b/boards/ccimx95dvk/sm/brd_sm_voltage.h
+@@ -2,6 +2,7 @@
+ ** ###################################################################
+ **
+ **     Copyright 2023-2024 NXP
+**     Copyright 2025 Digi International Inc.
+ **
+ **     Redistribution and use in source and binary forms, with or without modification,
+ **     are permitted provided that the following conditions are met:
+@@ -76,13 +77,13 @@
+  * @name BRD_SM voltage domains
+  */
+ /** @{ */
+-#define BRD_SM_VOLT_VDD_GPIO_3P3  (DEV_SM_NUM_VOLT + 0U)  /*!< VDD GPIO 3.3v */
+-#define BRD_SM_VOLT_VDD_ANA_0P8   (DEV_SM_NUM_VOLT + 1U)  /*!< VDD ANA 0.8v */
+-#define BRD_SM_VOLT_VDD_GPIO_1P8  (DEV_SM_NUM_VOLT + 2U)  /*!< VDD GPIO 1.8v */
+-#define BRD_SM_VOLT_VDDQ_DDR      (DEV_SM_NUM_VOLT + 3U)  /*!< DDR VDDQ */
+-#define BRD_SM_VOLT_VDD2_DDR      (DEV_SM_NUM_VOLT + 4U)  /*!< DDR VDD2 */
+-#define BRD_SM_VOLT_SD_CARD       (DEV_SM_NUM_VOLT + 5U)  /*!< SD1 */
+-#define BRD_SM_VOLT_NVCC_SD2      (DEV_SM_NUM_VOLT + 6U)  /*!< SD2 */
+#define BRD_SM_VOLT_SW1_VDD_3V3     (DEV_SM_NUM_VOLT + 0U)  /*!< VDD 3V3 */
+#define BRD_SM_VOLT_SW2_VDD_ANA_0V8 (DEV_SM_NUM_VOLT + 1U)  /*!< VDD ANA 0V8 */
+#define BRD_SM_VOLT_SW3_VDD_1V8     (DEV_SM_NUM_VOLT + 2U)  /*!< VDD 1V8 */
+#define BRD_SM_VOLT_SW4_LPD5_VDDQ   (DEV_SM_NUM_VOLT + 3U)  /*!< DDR VDDQ */
+#define BRD_SM_VOLT_SW5_LPD5_VDD2   (DEV_SM_NUM_VOLT + 4U)  /*!< DDR VDD2 */
+#define BRD_SM_VOLT_LDO1_VDD_LDO1   (DEV_SM_NUM_VOLT + 5U)  /*!< LDO1 */
+#define BRD_SM_VOLT_LDO2_VDD_SDIO2  (DEV_SM_NUM_VOLT + 6U)  /*!< LDO2 (VDD_SDIO2) */
+ /** @} */
+ 
+ /* Types */
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0010-ccimx95dvk-enable-full-access-to-certain-regulators-.patch
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0010-ccimx95dvk-enable-full-access-to-certain-regulators-.patch
@ -0,0 +1,47 @@
+From: Hector Palacios <hector.palacios@digi.com>
+Date: Thu, 9 Oct 2025 13:16:00 +0200
+Subject: [PATCH 10/11] ccimx95dvk: enable full access to certain regulators
+ from non-secure LVM
+
+The following PMIC regulators are used by the DVK:
+- VDD_3V3 (SW1)
+- VDD_1V8 (SW3)
+- VDD_LDO1 (LDO1)
+- VDD_SDIO2 (LDO2)
+
+Signed-off-by: Hector Palacios <hector.palacios@digi.com>
+---
+ configs/ccimx95dvk.cfg           | 4 ++++
+ configs/ccimx95dvk/config_scmi.h | 4 ++++
+ 2 files changed, 8 insertions(+)
+
+diff --git a/configs/ccimx95dvk.cfg b/configs/ccimx95dvk.cfg
+index b324e0fb0e45..b7c33f8d7e9a 100755
+--- a/configs/ccimx95dvk.cfg
+++ b/configs/ccimx95dvk.cfg
+@@ -532,6 +532,10 @@ AUDIO_PLL2                ALL
+ BRD_SM_SENSOR_TEMP_PF09   ALL
+ BRD_SM_SENSOR_TEMP_PF5301 SET
+ BRD_SM_SENSOR_TEMP_PF5302 SET
+BRD_SM_VOLT_SW1_VDD_3V3      ALL
+BRD_SM_VOLT_SW3_VDD_1V8      ALL
+BRD_SM_VOLT_LDO1_VDD_LDO1    ALL
+BRD_SM_VOLT_LDO2_VDD_SDIO2   ALL
+ BUTTON                    ALL, test
+ CLOCK_DISP1PIX            ALL
+ CLOCK_DISP2PIX            ALL
+diff --git a/configs/ccimx95dvk/config_scmi.h b/configs/ccimx95dvk/config_scmi.h
+index b23958f33138..18a4e5ef6360 100644
+--- a/configs/ccimx95dvk/config_scmi.h
+++ b/configs/ccimx95dvk/config_scmi.h
+@@ -610,6 +610,10 @@
+         .sensorPerms[DEV_SM_SENSOR_TEMP_A55] = SM_SCMI_PERM_ALL, \
+         .sensorPerms[DEV_SM_SENSOR_TEMP_ANA] = SM_SCMI_PERM_SET, \
+         .sysPerms = SM_SCMI_PERM_NOTIFY, \
+        .voltPerms[BRD_SM_VOLT_LDO1_VDD_LDO1] = SM_SCMI_PERM_ALL, \
+        .voltPerms[BRD_SM_VOLT_LDO2_VDD_SDIO2] = SM_SCMI_PERM_ALL, \
+        .voltPerms[BRD_SM_VOLT_SW1_VDD_3V3] = SM_SCMI_PERM_ALL, \
+        .voltPerms[BRD_SM_VOLT_SW3_VDD_1V8] = SM_SCMI_PERM_ALL, \
+     }
+ 
+ /*! Config for SCMI channel 5 */
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0011-components-pf09-reduce-LDOs-step-to-50mV.patch
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0011-components-pf09-reduce-LDOs-step-to-50mV.patch
@ -0,0 +1,37 @@
+From: Hector Palacios <hector.palacios@digi.com>
+Date: Mon, 13 Oct 2025 08:49:57 +0200
+Subject: [PATCH 11/11] components: pf09: reduce LDOs step to 50mV
+
+The voltage values that can be programmed to the LDOs are not linear.
+For low voltages, the step is 50mV, but for higher voltages it is 100mV.
+Setting the step as 100mV fools the Linux kernel regulator framework
+which does not properly calculate the selector it must call when using
+the SCMI regulator framework, resulting in -EINVAL errors.
+
+Signed-off-by: Hector Palacios <hector.palacios@digi.com>
+---
+ components/pf09/fsl_pf09.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/components/pf09/fsl_pf09.c b/components/pf09/fsl_pf09.c
+index 21a0b5557244..3e1887158d7d 100755
+--- a/components/pf09/fsl_pf09.c
+++ b/components/pf09/fsl_pf09.c
+@@ -528,7 +528,7 @@ bool PF09_RegulatorInfoGet(uint8_t regulator, PF09_RegInfo *regInfo)
+                     /* set min/max/step in microvolts */
+                     regInfo->minV = 750000U;
+                     regInfo->maxV = 3300000U;
+-                    regInfo->stepV = 100000U;
+                    regInfo->stepV = 50000U;
+                 }
+                 break;
+             case PF09_REG_LDO2:
+@@ -537,7 +537,7 @@ bool PF09_RegulatorInfoGet(uint8_t regulator, PF09_RegInfo *regInfo)
+                     /* set min/max/step in microvolts */
+                     regInfo->minV = 650000U;
+                     regInfo->maxV = 3300000U;
+-                    regInfo->stepV = 100000U;
+                    regInfo->stepV = 50000U;
+                 }
+                 break;
+             default:
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0012-ccimx95dvk-remove-access-to-VDD_3V3-and-VDD_1V8-from.patch
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0012-ccimx95dvk-remove-access-to-VDD_3V3-and-VDD_1V8-from.patch
@ -0,0 +1,58 @@
+From: Hector Palacios <hector.palacios@digi.com>
+Date: Wed, 29 Oct 2025 16:54:45 +0100
+Subject: [PATCH] ccimx95dvk: remove access to VDD_3V3 and VDD_1V8 from
+ non-secure world
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+There doesn't seem to be a clear registered handler for reboot or shutdown
+path from Linux to SM.
+When a 'reboot' is requested, Linux falls back to run the global
+device_shutdown() path.
+The SM will turn these regulators off in their shutdown path or via a
+global “disable regulators on reboot” policy. The current SM firmware
+doesn't get to know if Linux has marked these regulators as "always-on".
+
+Powering these regulators off removes power to the SOM who is then not
+able to continue the reset (it is not powered).
+
+By removing access to Linux, we fully rely on SM managing these regulators,
+though apparently support is incomplete (for instance they are not powered
+off on the poweroff path from Linux), so this may need to be revisited in
+future BSP upgrades.
+
+Signed-off-by: Hector Palacios <hector.palacios@digi.com>
+
+https://onedigi.atlassian.net/browse/DEL-9804
+---
+ configs/ccimx95dvk.cfg           | 2 --
+ configs/ccimx95dvk/config_scmi.h | 2 --
+ 2 files changed, 4 deletions(-)
+
+diff --git a/configs/ccimx95dvk.cfg b/configs/ccimx95dvk.cfg
+index b7c33f8d7e9a..19d3b0ab27b4 100755
+--- a/configs/ccimx95dvk.cfg
+++ b/configs/ccimx95dvk.cfg
+@@ -532,8 +532,6 @@ AUDIO_PLL2                ALL
+ BRD_SM_SENSOR_TEMP_PF09   ALL
+ BRD_SM_SENSOR_TEMP_PF5301 SET
+ BRD_SM_SENSOR_TEMP_PF5302 SET
+-BRD_SM_VOLT_SW1_VDD_3V3      ALL
+-BRD_SM_VOLT_SW3_VDD_1V8      ALL
+ BRD_SM_VOLT_LDO1_VDD_LDO1    ALL
+ BRD_SM_VOLT_LDO2_VDD_SDIO2   ALL
+ BUTTON                    ALL, test
+diff --git a/configs/ccimx95dvk/config_scmi.h b/configs/ccimx95dvk/config_scmi.h
+index 18a4e5ef6360..8094e9a9ef77 100644
+--- a/configs/ccimx95dvk/config_scmi.h
+++ b/configs/ccimx95dvk/config_scmi.h
+@@ -612,8 +612,6 @@
+         .sysPerms = SM_SCMI_PERM_NOTIFY, \
+         .voltPerms[BRD_SM_VOLT_LDO1_VDD_LDO1] = SM_SCMI_PERM_ALL, \
+         .voltPerms[BRD_SM_VOLT_LDO2_VDD_SDIO2] = SM_SCMI_PERM_ALL, \
+-        .voltPerms[BRD_SM_VOLT_SW1_VDD_3V3] = SM_SCMI_PERM_ALL, \
+-        .voltPerms[BRD_SM_VOLT_SW3_VDD_1V8] = SM_SCMI_PERM_ALL, \
+     }
+ 
+ /*! Config for SCMI channel 5 */
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager_1.0.0.bbappend
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager_1.0.0.bbappend
@ -0,0 +1,21 @@
+# Copyright (C) 2025, Digi International Inc.
+
+FILESEXTRAPATHS:prepend := "${THISDIR}/${BPN}:"
+
+SRC_URI:append:dey = " \
+    file://0001-ccimx95dvk-add-new-platform-config-and-board.patch \
+    file://0002-ccimx95dvk-configure-board-and-switch-debug-UART-to-.patch \
+    file://0003-ccimx95dvk-disable-PCAL6408A-expander-and-move-GPIO1.patch \
+    file://0004-ccimx95dvk-move-resources-from-M7-to-A55.patch \
+    file://0005-ccimx95dvk-move-pads-to-non-secure-A55.patch \
+    file://0006-ccimx95dvk-move-CAN1-to-be-used-by-A55.patch \
+    file://0007-ccimx95dvk-remove-PCAL6408A-IO-expander-from-EVK.patch \
+    file://0008-ccimx95dvk-remove-PCA2123-RTC-from-EVK.patch \
+    file://0009-ccimx95-change-names-of-voltage-regulators.patch \
+    file://0010-ccimx95dvk-enable-full-access-to-certain-regulators-.patch \
+    file://0011-components-pf09-reduce-LDOs-step-to-50mV.patch \
+    file://0012-ccimx95dvk-remove-access-to-VDD_3V3-and-VDD_1V8-from.patch \
+"
+
+# Disable debug monitor by default
+PACKAGECONFIG ??= "m0"
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-devtools/external-arm-toolchain/gcc-arm-none-eabi_14.2.rel1.bb
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-devtools/external-arm-toolchain/gcc-arm-none-eabi_14.2.rel1.bb
@ -0,0 +1,21 @@
+# Copyright (C) 2019 Garmin Ltd. or its subsidiaries
+# Released under the MIT license (see COPYING.MIT for the terms)
+
+require recipes-devtools/external-arm-toolchain/arm-binary-toolchain.inc
+
+COMPATIBLE_HOST = "(x86_64|aarch64).*-linux"
+
+SUMMARY = "Arm GNU Toolchain - AArch32 bare-metal target (arm-none-eabi)"
+LICENSE = "GPL-3.0-with-GCC-exception & GPL-3.0-only"
+
+LIC_FILES_CHKSUM:aarch64 = "file://share/doc/gcc/Copying.html;md5=b58b1e79cb685387c684bf647c848b82"
+LIC_FILES_CHKSUM:x86-64 = "file://share/doc/gcc/Copying.html;md5=b58b1e79cb685387c684bf647c848b82"
+
+SRC_URI = "https://developer.arm.com/-/media/Files/downloads/gnu/${PV}/binrel/arm-gnu-toolchain-${PV}-${HOST_ARCH}-${BINNAME}.tar.xz;name=gcc-${HOST_ARCH}"
+SRC_URI[gcc-aarch64.sha256sum] = "87330bab085dd8749d4ed0ad633674b9dc48b237b61069e3b481abd364d0a684"
+SRC_URI[gcc-x86_64.sha256sum] = "62a63b981fe391a9cbad7ef51b17e49aeaa3e7b0d029b36ca1e9c3b2a9b78823"
+
+S = "${WORKDIR}/arm-gnu-toolchain-${PV}-${HOST_ARCH}-${BINNAME}"
+
+UPSTREAM_CHECK_URI = "https://developer.arm.com/downloads/-/arm-gnu-toolchain-downloads"
+UPSTREAM_CHECK_REGEX = "arm-gnu-toolchain-(?P<pver>\d+\.\d*\.[A-z]*\d*).*-${HOST_ARCH}-${BINNAME}\.tar\.\w+"
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/firmware-imx/firmware-ele-imx_%.bbappend
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/firmware-imx/firmware-ele-imx_%.bbappend
@ -1,12 +1,9 @@
-# Copyright 2024 Digi International Inc.
+# Copyright 2024,2025 Digi International Inc.
 FILESEXTRAPATHS:prepend := "${THISDIR}/${BPN}:"

 # Forward-port the i.MX93 A0 fw from v0.1.0
 SRC_URI:append:ccimx93 = " file://mx93a0-ahab-container.img"

-IMX_SRCREV_ABBREV = "7b1e150"
-SRC_URI[sha256sum] = "09165fe5df75ad665df304e89d494a02c5f379624604d230e1b595cb5ae3b5b8"
-
 UNPACK_POSTFUNC = ""
 UNPACK_POSTFUNC:ccimx93 = "copy_ele_a0_fw"
 copy_ele_a0_fw() {
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf/0001-imx8mm-Define-UART1-as-console-for-boot-stage.patch
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf/0001-imx8mm-Define-UART1-as-console-for-boot-stage.patch
@ -13,7 +13,7 @@ Signed-off-by: Gabriel Valcazar <gabriel.valcazar@digi.com>
 1 file changed, 1 insertion(+), 1 deletion(-)

 diff --git a/plat/imx/imx8m/imx8mm/platform.mk b/plat/imx/imx8m/imx8mm/platform.mk
-index 41fc3507f..1de30f40f 100644
+index 41fc3507f796..1de30f40f397 100644
 --- a/plat/imx/imx8m/imx8mm/platform.mk
 +++ b/plat/imx/imx8m/imx8mm/platform.mk
@@ -172,7 +172,7 @@ $(eval $(call add_define,BL32_BASE))
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf/0002-imx8mm-Disable-M4-debug-console.patch
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf/0002-imx8mm-Disable-M4-debug-console.patch
@ -14,7 +14,7 @@ Signed-off-by: Arturo Buzarra <arturo.buzarra@digi.com>
 1 file changed, 1 insertion(+), 1 deletion(-)

 diff --git a/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c b/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c
-index 179b6226f..388deae2b 100644
+index 179b6226f00f..388deae2b0e8 100644
 --- a/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c
 +++ b/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c
@@ -117,7 +117,7 @@ static const struct imx_rdc_cfg rdc[] = {
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf/0003-imx8mn-Define-UART1-as-console-for-boot-stage.patch
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf/0003-imx8mn-Define-UART1-as-console-for-boot-stage.patch
@ -14,7 +14,7 @@ Signed-off-by: Gabriel Valcazar <gabriel.valcazar@digi.com>
 2 files changed, 2 insertions(+), 2 deletions(-)

 diff --git a/plat/imx/imx8m/imx8mn/imx8mn_bl31_setup.c b/plat/imx/imx8m/imx8mn/imx8mn_bl31_setup.c
-index 312eb32d1..9a82be010 100644
+index 312eb32d1cb5..9a82be010e49 100644
 --- a/plat/imx/imx8m/imx8mn/imx8mn_bl31_setup.c
 +++ b/plat/imx/imx8m/imx8mn/imx8mn_bl31_setup.c
@@ -110,7 +110,7 @@ static const struct imx_rdc_cfg rdc[] = {
@ -27,7 +27,7 @@ index 312eb32d1..9a82be010 100644
 
 	/* memory region */
 diff --git a/plat/imx/imx8m/imx8mn/platform.mk b/plat/imx/imx8m/imx8mn/platform.mk
-index 84519426c..964ed9e5c 100644
+index 84519426c68a..964ed9e5c2d1 100644
 --- a/plat/imx/imx8m/imx8mn/platform.mk
 +++ b/plat/imx/imx8m/imx8mn/platform.mk
@@ -77,7 +77,7 @@ $(eval $(call add_define,BL32_BASE))
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf/0004-imx8mn-Disable-M7-debug-console.patch
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf/0004-imx8mn-Disable-M7-debug-console.patch
@ -15,7 +15,7 @@ Signed-off-by: Gabriel Valcazar <gabriel.valcazar@digi.com>
 1 file changed, 1 insertion(+), 1 deletion(-)

 diff --git a/plat/imx/imx8m/imx8mn/imx8mn_bl31_setup.c b/plat/imx/imx8m/imx8mn/imx8mn_bl31_setup.c
-index 9a82be010..7f9a0f5f4 100644
+index 9a82be010e49..7f9a0f5f4c85 100644
 --- a/plat/imx/imx8m/imx8mn/imx8mn_bl31_setup.c
 +++ b/plat/imx/imx8m/imx8mn/imx8mn_bl31_setup.c
@@ -109,7 +109,7 @@ static const struct imx_rdc_cfg rdc[] = {
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf/0006-ccimx93-use-UART6-for-the-default-console.patch
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf/0006-ccimx93-use-UART6-for-the-default-console.patch
@ -10,7 +10,7 @@ Signed-off-by: Javier Viguera <javier.viguera@digi.com>
 1 file changed, 1 insertion(+), 1 deletion(-)

 diff --git a/plat/imx/imx93/include/platform_def.h b/plat/imx/imx93/include/platform_def.h
-index 2d140400d97e..cb5b6eba061c 100644
+index 82e904b2c962..ef74d847decd 100644
 --- a/plat/imx/imx93/include/platform_def.h
 +++ b/plat/imx/imx93/include/platform_def.h
@@ -53,7 +53,7 @@
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf/0007-imx93-bring-back-ELE-clock-workaround-for-soc-revisi.patch
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf/0007-imx93-bring-back-ELE-clock-workaround-for-soc-revisi.patch
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf/0008-ccimx91-use-UART6-for-the-default-console.patch
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf/0008-ccimx91-use-UART6-for-the-default-console.patch
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf/0009-ccimx95-set-DVK-console-to-LPUART6.patch
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf/0009-ccimx95-set-DVK-console-to-LPUART6.patch
@ -0,0 +1,26 @@
+From: Hector Palacios <hector.palacios@digi.com>
+Date: Wed, 10 Sep 2025 09:21:43 +0200
+Subject: [PATCH] ccimx95: set DVK console to LPUART6
+
+Upstream-Status: Inappropriate [DEY specific]
+
+Signed-off-by: Hector Palacios <hector.palacios@digi.com>
+Signed-off-by: Isaac Hermida <isaac.hermida@digi.com>
+Signed-off-by: Javier Viguera <javier.viguera@digi.com>
+---
+ plat/imx/imx95/include/platform_def.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/plat/imx/imx95/include/platform_def.h b/plat/imx/imx95/include/platform_def.h
+index d2eff001f548..3f0a43e49694 100644
+--- a/plat/imx/imx95/include/platform_def.h
+++ b/plat/imx/imx95/include/platform_def.h
+@@ -55,7 +55,7 @@
+ #ifdef IMX_EMU
+ #define IMX_LPUART_BASE			0x42570000
+ #else
+-#define IMX_LPUART_BASE			0x44380000
+#define IMX_LPUART_BASE			0x425A0000	/* LPUART6 */
+ #endif
+ 
+ #define IMX_BOOT_UART_CLK_IN_HZ		24000000 /* Select 24MHz oscillator */
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf/0010-ccimx95-enable-non-secure-non-privilege-access-to-GP.patch
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf/0010-ccimx95-enable-non-secure-non-privilege-access-to-GP.patch
@ -0,0 +1,30 @@
+From: Hector Palacios <hector.palacios@digi.com>
+Date: Fri, 21 Nov 2025 11:30:35 +0100
+Subject: [PATCH] ccimx95: enable non-secure, non-privilege access to GPIO1
+
+GPIO1 port is reserved on NXP EVK but we want to enable
+full access to the port from the non-secure world.
+
+Signed-off-by: Hector Palacios <hector.palacios@digi.com>
+
+https://onedigi.atlassian.net/browse/DEL-9839
+---
+ plat/imx/imx95/imx95_bl31_setup.c | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/plat/imx/imx95/imx95_bl31_setup.c b/plat/imx/imx95/imx95_bl31_setup.c
+index 175a78a20021..fcf41a0ffa5b 100644
+--- a/plat/imx/imx95/imx95_bl31_setup.c
+++ b/plat/imx/imx95/imx95_bl31_setup.c
+@@ -108,6 +108,11 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
+ void bl31_plat_arch_setup(void)
+ {
+ 	/* Assign all the GPIO pins to non-secure world by default */
+	mmio_write_32(GPIO1_BASE + 0x10, 0xffffffff);
+	mmio_write_32(GPIO1_BASE + 0x14, 0x3);
+	mmio_write_32(GPIO1_BASE + 0x18, 0xffffffff);
+	mmio_write_32(GPIO1_BASE + 0x1c, 0x3);
+
+ 	mmio_write_32(GPIO2_BASE + 0x10, 0xffffffff);
+ 	mmio_write_32(GPIO2_BASE + 0x14, 0x3);
+ 	mmio_write_32(GPIO2_BASE + 0x18, 0xffffffff);
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf_%.bbappend
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf_%.bbappend
@ -2,22 +2,18 @@

 FILESEXTRAPATHS:prepend := "${THISDIR}/${BPN}:"

-SRC_URI:append:ccimx8m = " \
+SRC_URI:append:dey = " \
    file://0001-imx8mm-Define-UART1-as-console-for-boot-stage.patch \
    file://0002-imx8mm-Disable-M4-debug-console.patch \
    file://0003-imx8mn-Define-UART1-as-console-for-boot-stage.patch \
    file://0004-imx8mn-Disable-M7-debug-console.patch \
    file://0005-imx8mm-set-BL32_BASE-and-map-high-DRAM-for-ccimx8mm-.patch \
+    file://0006-ccimx93-use-UART6-for-the-default-console.patch \
+    file://0007-imx93-bring-back-ELE-clock-workaround-for-soc-revisi.patch \
+    file://0008-ccimx91-use-UART6-for-the-default-console.patch \
+    file://0009-ccimx95-set-DVK-console-to-LPUART6.patch \
+    file://0010-ccimx95-enable-non-secure-non-privilege-access-to-GP.patch \
 "
-SRC_URI:append:ccimx91 = " \
-    file://0001-ccimx91-use-UART6-for-the-default-console.patch \
-"
-SRC_URI:append:ccimx93 = " \
-    file://0001-ccimx93-use-UART6-for-the-default-console.patch \
-    file://0002-imx93-bring-back-ELE-clock-workaround-for-soc-revisi.patch \
-"
-
-SRCREV = "1b27ee3edbb40ef9432c69ccaa744d1ac5d54c5d"

 BOOT_TOOLS = "imx-boot-tools"

--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-mkimage/files/0001-iMX8M-soc.mak-use-native-mkimage-from-sysroot.patch
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-mkimage/files/0001-iMX8M-soc.mak-use-native-mkimage-from-sysroot.patch
@ -1,3 +1,4 @@
+From 3e0f78a4efeac4ea0651ac763099d780447a18b4 Mon Sep 17 00:00:00 2001
 From: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
 Date: Wed, 19 Jul 2023 18:34:32 +0300
 Subject: [PATCH] iMX8M: soc.mak: use native mkimage from sysroot
@ -17,13 +18,14 @@ Reinjected the original patch from Andrey Zhizhikin <andrey.z@gmail.com>
 Upstream-Status: Inappropriate [OE-specific]
 Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
 ---
+
 iMX8M/soc.mak | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

-diff --git a/iMX8M/soc.mak b/iMX8M/soc.mak
-index e7c762b748a1..f1b37a4f425a 100644
--- a/iMX8M/soc.mak
-+++ b/iMX8M/soc.mak
+Index: git/iMX8M/soc.mak
+===================================================================
+--- git.orig/iMX8M/soc.mak
+++ git/iMX8M/soc.mak
@@ -160,7 +160,7 @@ u-boot.itb: $(dtb) $(supp_dtbs)
 	./$(PAD_IMAGE) bl31.bin
 	./$(PAD_IMAGE) u-boot-nodtb.bin $(dtb) $(supp_dtbs)
@ -33,7 +35,7 @@ index e7c762b748a1..f1b37a4f425a 100644
 	@rm -f u-boot.its $(dtb)
 
 dtb_ddr3l = valddr3l.dtb
-@@ -172,7 +172,7 @@ u-boot-ddr3l.itb: $(dtb_ddr3l) $(supp_dtbs)
+@@ -172,7 +172,7 @@ u-boot-ddr3l.itb: $(dtb_ddr3l) $(supp_dt
 	./$(PAD_IMAGE) bl31.bin
 	./$(PAD_IMAGE) u-boot-nodtb.bin $(dtb_ddr3l) $(supp_dtbs)
 	DEK_BLOB_LOAD_ADDR=$(DEK_BLOB_LOAD_ADDR) TEE_LOAD_ADDR=$(TEE_LOAD_ADDR) ATF_LOAD_ADDR=$(ATF_LOAD_ADDR) ../$(SOC_DIR)/mkimage_fit_atf.sh $(dtb_ddr3l) $(supp_dtbs) > u-boot-ddr3l.its
@ -42,7 +44,7 @@ index e7c762b748a1..f1b37a4f425a 100644
 	@rm -f u-boot.its $(dtb_ddr3l)
 
 dtb_ddr3l_evk = evkddr3l.dtb
-@@ -184,7 +184,7 @@ u-boot-ddr3l-evk.itb: $(dtb_ddr3l_evk) $(supp_dtbs)
+@@ -184,7 +184,7 @@ u-boot-ddr3l-evk.itb: $(dtb_ddr3l_evk) $
 	./$(PAD_IMAGE) bl31.bin
 	./$(PAD_IMAGE) u-boot-nodtb.bin $(dtb_ddr3l_evk) $(supp_dtbs)
 	DEK_BLOB_LOAD_ADDR=$(DEK_BLOB_LOAD_ADDR) TEE_LOAD_ADDR=$(TEE_LOAD_ADDR) ATF_LOAD_ADDR=$(ATF_LOAD_ADDR) ../$(SOC_DIR)/mkimage_fit_atf.sh $(dtb_ddr3l_evk) $(supp_dtbs) > u-boot-ddr3l-evk.its
@ -51,7 +53,7 @@ index e7c762b748a1..f1b37a4f425a 100644
 	@rm -f u-boot.its $(dtb_ddr3l_evk)
 
 dtb_ddr4 = valddr4.dtb
-@@ -196,7 +196,7 @@ u-boot-ddr4.itb: $(dtb_ddr4) $(supp_dtbs)
+@@ -196,7 +196,7 @@ u-boot-ddr4.itb: $(dtb_ddr4) $(supp_dtbs
 	./$(PAD_IMAGE) bl31.bin
 	./$(PAD_IMAGE) u-boot-nodtb.bin $(dtb_ddr4) $(supp_dtbs)
 	DEK_BLOB_LOAD_ADDR=$(DEK_BLOB_LOAD_ADDR) TEE_LOAD_ADDR=$(TEE_LOAD_ADDR) ATF_LOAD_ADDR=$(ATF_LOAD_ADDR) ../$(SOC_DIR)/mkimage_fit_atf.sh $(dtb_ddr4) $(supp_dtbs) > u-boot-ddr4.its
@ -60,7 +62,7 @@ index e7c762b748a1..f1b37a4f425a 100644
 	@rm -f u-boot.its $(dtb_ddr4)
 
 dtb_ddr4_evk = evkddr4.dtb
-@@ -208,7 +208,7 @@ u-boot-ddr4-evk.itb: $(dtb_ddr4_evk) $(supp_dtbs)
+@@ -208,7 +208,7 @@ u-boot-ddr4-evk.itb: $(dtb_ddr4_evk) $(s
 	./$(PAD_IMAGE) bl31.bin
 	./$(PAD_IMAGE) u-boot-nodtb.bin $(dtb_ddr4_evk) $(supp_dtbs)
 	DEK_BLOB_LOAD_ADDR=$(DEK_BLOB_LOAD_ADDR) TEE_LOAD_ADDR=$(TEE_LOAD_ADDR) ATF_LOAD_ADDR=$(ATF_LOAD_ADDR) ../$(SOC_DIR)/mkimage_fit_atf.sh $(dtb_ddr4_evk) $(supp_dtbs) > u-boot-ddr4-evk.its
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-mkimage/files/0002-imx8m-soc.mak-capture-commands-output-into-a-log-fil.patch
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-mkimage/files/0002-imx8m-soc.mak-capture-commands-output-into-a-log-fil.patch
@ -13,7 +13,7 @@ Signed-off-by: Javier Viguera <javier.viguera@digi.com>
 1 file changed, 4 insertions(+), 3 deletions(-)

 diff --git a/iMX8M/soc.mak b/iMX8M/soc.mak
-index f1b37a4f425a..ffd70af8ac7d 100644
+index e7c762b748a1..3b0b6b603cd5 100644
 --- a/iMX8M/soc.mak
 +++ b/iMX8M/soc.mak
@@ -1,5 +1,6 @@
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-mkimage/files/0004-imx8mm-adjust-TEE_LOAD_ADDR-for-ccimx8mm.patch
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-mkimage/files/0004-imx8mm-adjust-TEE_LOAD_ADDR-for-ccimx8mm.patch
@ -12,7 +12,7 @@ Signed-off-by: Javier Viguera <javier.viguera@digi.com>
 1 file changed, 1 insertion(+), 1 deletion(-)

 diff --git a/iMX8M/soc.mak b/iMX8M/soc.mak
-index ffd70af8ac7d..7ab1ea099894 100644
+index 3b0b6b603cd5..aea1dbef3f85 100644
 --- a/iMX8M/soc.mak
 +++ b/iMX8M/soc.mak
@@ -35,7 +35,7 @@ PLAT = imx8mm
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-mkimage/files/0005-imx93-soc.mak-capture-commands-output-into-a-log-fil.patch
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-mkimage/files/0005-imx93-soc.mak-capture-commands-output-into-a-log-fil.patch
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-mkimage/files/0006-imx93-soc.mak-add-makefile-target-to-build-A0-revisi.patch
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-mkimage/files/0006-imx93-soc.mak-add-makefile-target-to-build-A0-revisi.patch
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-mkimage/files/0007-imx91-soc.mak-capture-commands-output-into-a-log-fil.patch
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-mkimage/files/0007-imx91-soc.mak-capture-commands-output-into-a-log-fil.patch
@ -13,7 +13,7 @@ Signed-off-by: Javier Viguera <javier.viguera@digi.com>
 1 file changed, 4 insertions(+), 3 deletions(-)

 diff --git a/iMX91/soc.mak b/iMX91/soc.mak
-index b87a5bef79ce..3db3760c546d 100644
+index fca7fdc447b0..2b884d0b3c69 100644
 --- a/iMX91/soc.mak
 +++ b/iMX91/soc.mak
@@ -1,4 +1,5 @@
@ -48,4 +48,4 @@ index b87a5bef79ce..3db3760c546d 100644
 +	./$(MKIMG) -soc IMX9 -append $(AHAB_IMG) -c -ap $(SPL_A55_IMG) a55 $(SPL_LOAD_ADDR) -out flash.bin | tee -a $(MKIMAGE_LOG)
 	$(call append_container,u-boot-atf-container.img,1)
 
- flash_singleboot_no_ahabfw: $(MKIMG) $(SPL_A55_IMG) u-boot-atf-container.img
+ flash_singleboot_gdet: $(MKIMG) $(AHAB_IMG) $(SPL_A55_IMG) u-boot-atf-container.img
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-mkimage/files/0008-imx95-soc.mak-capture-commands-output-into-a-log-fil.patch
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-mkimage/files/0008-imx95-soc.mak-capture-commands-output-into-a-log-fil.patch
@ -0,0 +1,60 @@
+From: Javier Viguera <javier.viguera@digi.com>
+Date: Wed, 24 Sep 2025 18:27:36 +0200
+Subject: [PATCH] imx95: soc.mak: capture commands output into a log file
+
+This is later used to get the needed information for the signing of the
+boot artifacts.
+
+Upstream-Status: Inappropriate [DEY specific]
+
+Signed-off-by: Javier Viguera <javier.viguera@digi.com>
+---
+ iMX95/soc.mak | 9 +++++----
+ 1 file changed, 5 insertions(+), 4 deletions(-)
+
+diff --git a/iMX95/soc.mak b/iMX95/soc.mak
+index a3eaa2e93b98..a7cf6c4363a3 100644
+--- a/iMX95/soc.mak
+++ b/iMX95/soc.mak
+@@ -1,4 +1,5 @@
+ MKIMG = ../mkimage_imx8
+MKIMAGE_LOG = "mkimage-$(firstword $(MAKECMDGOALS)).log"
+ 
+ CC ?= gcc
+ REV ?= A1
+@@ -182,7 +183,7 @@ define append_container
+ 	@flashbin_size=`wc -c flash.bin | awk '{print $$1}'`; \
+                    psize=$$((0x400 * $(2))); \
+                    pad_cnt=$$(((flashbin_size + psize - 1) / psize)); \
+-                   echo "append $(1) at $$((pad_cnt * $(2))) KB, psize=$$psize"; \
+                   echo "append $(1) at $$((pad_cnt * $(2))) KB, psize=$$psize" | tee -a $(MKIMAGE_LOG); \
+                    dd if=$(1) of=flash.bin bs=1K seek=$$((pad_cnt * $(2)));
+ endef
+ 
+@@ -271,7 +272,7 @@ u-boot-atf-container.img: bl31.bin u-boot-hash.bin
+ 			   -ap bl31.bin a55 $(ATF_LOAD_ADDR) \
+ 			   -ap u-boot-hash.bin a55 $(UBOOT_LOAD_ADDR) \
+ 			   -out u-boot-atf-container.img; \
+-	fi
+	fi | tee $(MKIMAGE_LOG)
+ 
+ u-boot-atf-container-spinand.img: bl31.bin u-boot-hash.bin
+ 	if [ -f $(TEE) ]; then \
+@@ -335,7 +336,7 @@ flash_lpboot_flexspi_xip: $(MKIMG) $(AHAB_IMG) $(MCU_IMG) $(OEI_IMG_M33)
+ flash_a55: $(MKIMG) $(AHAB_IMG) $(MCU_IMG) u-boot-atf-container.img $(SPL_A55_IMG) $(OEI_IMG_M33) $(OEI_M33_DDR_IMG)
+ 	./$(MKIMG) -soc IMX9 -cntr_version $(CTNR_VERSION) $(MMC_FAST_HASH) -append $(AHAB_IMG) -c $(OEI_OPT_M33) -msel $(MSEL) \
+ 		   -m33 $(MCU_IMG) 0 $(MCU_TCM_ADDR) \
+-		   -ap $(SPL_A55_IMG) a55 $(SPL_LOAD_ADDR_M33_VIEW) $(V2X_DUMMY) -out flash.bin
+		   -ap $(SPL_A55_IMG) a55 $(SPL_LOAD_ADDR_M33_VIEW) $(V2X_DUMMY) -out flash.bin | tee -a $(MKIMAGE_LOG)
+ 	$(call append_container,u-boot-atf-container.img,1)
+ 
+ flash_a55_no_ahabfw: $(MKIMG) $(MCU_IMG) u-boot-atf-container.img $(SPL_A55_IMG) $(OEI_IMG_M33)
+@@ -386,7 +387,7 @@ flash_all: $(MKIMG) $(AHAB_IMG) $(MCU_IMG) $(M7_IMG) u-boot-atf-container.img $(
+ 	./$(MKIMG) -soc IMX9 -cntr_version $(CTNR_VERSION) $(MMC_FAST_HASH) -append $(AHAB_IMG) -c $(OEI_OPT_M33) -msel $(MSEL) \
+ 		   -m33 $(MCU_IMG) 0 $(MCU_TCM_ADDR) \
+ 		   -m7 $(M7_IMG) 0 $(M7_TCM_ADDR) $(M7_TCM_ADDR_ALIAS)  \
+-		   -ap $(SPL_A55_IMG) a55 $(SPL_LOAD_ADDR_M33_VIEW) $(V2X_DUMMY) -out flash.bin
+		   -ap $(SPL_A55_IMG) a55 $(SPL_LOAD_ADDR_M33_VIEW) $(V2X_DUMMY) -out flash.bin | tee -a $(MKIMAGE_LOG)
+ 	$(call append_container,u-boot-atf-container.img,1)
+ 
+ flash_all_ddr: $(MKIMG) $(AHAB_IMG) $(MCU_IMG) $(M7_IMG) u-boot-atf-container.img $(SPL_A55_IMG) $(OEI_IMG_M33)
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-mkimage/imx-boot_1.0.bbappend
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-mkimage/imx-boot_1.0.bbappend
@ -2,37 +2,30 @@

 FILESEXTRAPATHS:prepend := "${THISDIR}/files:"

-SRC_URI:append:ccimx8m = " \
+DEPENDS += "${@oe.utils.conditional('TRUSTFENCE_SIGN', '1', 'trustfence-sign-tools-native', '', d)}"
+
+SRC_URI:append:dey = " \
+    file://0001-iMX8QX-soc.mak-capture-commands-output-into-a-log-fi.patch \
    file://0002-imx8m-soc.mak-capture-commands-output-into-a-log-fil.patch \
    file://0003-imx8m-print_fit_hab-follow-symlinks.patch \
    file://0004-imx8mm-adjust-TEE_LOAD_ADDR-for-ccimx8mm.patch \
+    file://0005-imx93-soc.mak-capture-commands-output-into-a-log-fil.patch \
+    file://0006-imx93-soc.mak-add-makefile-target-to-build-A0-revisi.patch \
+    file://0007-imx91-soc.mak-capture-commands-output-into-a-log-fil.patch \
+    file://0008-imx95-soc.mak-capture-commands-output-into-a-log-fil.patch \
 "
-SRC_URI:append:ccimx8x = " \
-    file://0001-iMX8QX-soc.mak-capture-commands-output-into-a-log-fi.patch \
-"
-SRC_URI:append:ccimx91 = " \
-    file://0001-imx91-soc.mak-capture-commands-output-into-a-log-fil.patch \
-"
-SRC_URI:append:ccimx93 = " \
-    file://0001-imx93-soc.mak-capture-commands-output-into-a-log-fil.patch \
-    file://0002-imx93-soc.mak-add-makefile-target-to-build-A0-revisi.patch \
-"
-SRCBRANCH = "lf-6.6.52_2.2.0"
-SRCREV = "71b8c18af93a5eb972d80fbec290006066cff24f"

-DEPENDS += "${@oe.utils.conditional('TRUSTFENCE_SIGN', '1', 'trustfence-sign-tools-native', '', d)}"
+IMX_CORTEXM_DEMOS = ""
+IMX_CORTEXM_DEMOS:ccimx95 = "imx-m7-demos:do_deploy"

-# Do not tag imx-boot
-UUU_BOOTLOADER:mx8-generic-bsp = ""
-UUU_BOOTLOADER:mx9-generic-bsp = ""
-BOOT_STAGING:mx91-generic-bsp  = "${S}/iMX91"
-BOOT_STAGING:mx93-generic-bsp  = "${S}/iMX93"
+CORTEXM_DEFAULT_IMAGE = ""
+CORTEXM_DEFAULT_IMAGE:ccimx95 = "imx95-19x19-evk_m7_TCM_power_mode_switch.bin"

-# Add SOC family
-SOC_FAMILY:mx91-generic-bsp = "mx91"
+do_compile[depends] += "${IMX_CORTEXM_DEMOS}"

-REV_OPTION:ccimx91 = "REV=A0"
-REV_OPTION:ccimx93 = "REV=A1"
+compile_mx95:append:ccimx95() {
+    cp ${DEPLOY_DIR_IMAGE}/mcore-demos/${CORTEXM_DEFAULT_IMAGE} ${BOOT_STAGING}/m7_image.bin
+}

 # Revert compile_mx8m() to how it was in kirkstone branch of meta-freescale,
 # otherwise, a dead symlink is created in place of the dtb
@ -66,7 +59,7 @@ compile_mx8m() {

 compile_mx8m:append:ccimx8m() {
 	# Create dummy DEK blob to support building with encrypted u-boot
-	if [ -n "${TRUSTFENCE_DEK_PATH}" ] && [ "${TRUSTFENCE_DEK_PATH}" != "0" ]; then
+	if [ "${TRUSTFENCE_ENCRYPT}" = "1" ]; then
 		dd if=/dev/zero of=${BOOT_STAGING}/dek_blob_fit_dummy.bin bs=96 count=1 oflag=sync
 	fi
 }
@ -83,11 +76,6 @@ compile_mx93:append:ccimx93() {
 	fi
 }

-compile_mx91() {
-	bbnote i.MX 91 boot binary build
-	compile_mx93
-}
-
 do_compile:append:ccimx8m() {
 	bbnote "building ${IMX_BOOT_SOC_TARGET} - print_fit_hab"
 	make SOC=${IMX_BOOT_SOC_TARGET} dtbs=${UBOOT_DTB_NAME} print_fit_hab
@ -127,10 +115,6 @@ do_install:ccimx8x () {
 	done
 }

-deploy_mx91() {
-	deploy_mx93
-}
-
 generate_symlinks() {
 	# imx-boot recipe in meta-freescale supports *multiple* build configurations.
 	# We assume here only ONE build configuration for our platforms (otherwise
@ -142,6 +126,10 @@ generate_symlinks() {
 	ln -sf imx-boot-${MACHINE}.bin-${IMAGE_IMXBOOT_TARGET} ${DEPLOYDIR}/imx-boot
 }

+deploy_mx95:append:ccimx95() {
+    install -m 0644 ${DEPLOY_DIR_IMAGE}/mcore-demos/${CORTEXM_DEFAULT_IMAGE} ${DEPLOYDIR}/${BOOT_TOOLS}
+}
+
 do_deploy:append:ccimx8m() {
 	generate_symlinks
 	for target in ${IMXBOOT_TARGETS}; do
@ -173,6 +161,13 @@ do_deploy:append:ccimx93() {
 	fi
 }

+do_deploy:append:ccimx95() {
+    generate_symlinks
+    for target in ${IMXBOOT_TARGETS}; do
+        install -m 0644 ${BOOT_STAGING}/mkimage-${target}.log ${DEPLOYDIR}/${BOOT_TOOLS}
+    done
+}
+
 do_deploy:ccimx8x () {
 	deploy_${SOC_FAMILY}
 	# copy tee.bin to deploy path
@ -196,16 +191,16 @@ do_deploy:ccimx8x () {
 		done
 		cd ${DEPLOYDIR}
 		ln -sf ${UBOOT_PREFIX}-${MACHINE}-${rev}.bin-${IMAGE_IMXBOOT_TARGET} ${UBOOT_PREFIX}-${MACHINE}-${rev}.bin
-		# Link to default bootable U-Boot filename. It gets overwritten
-		# on every loop so the only last RAM_CONFIG will survive.
-		ln -sf ${UBOOT_PREFIX}-${MACHINE}-${rev}.bin-${IMAGE_IMXBOOT_TARGET} ${BOOTABLE_FILENAME}
 		cd -
 	done
+
+    # Generate an imx-boot symlink to the last SOC_REVISION. This is required for WIC images
+    ln -sf ${UBOOT_PREFIX}-${MACHINE}-${rev}.bin-${IMAGE_IMXBOOT_TARGET} ${DEPLOYDIR}/imx-boot
 }

 do_deploy[postfuncs] += "${@oe.utils.conditional('TRUSTFENCE_SIGN', '1', 'trustfence_sign_imxboot', '', d)}"
 trustfence_sign_imxboot() {
-	TF_SIGN_ENV="CONFIG_SIGN_KEYS_PATH=${TRUSTFENCE_SIGN_KEYS_PATH}"
+	TF_SIGN_ENV="CONFIG_SIGN_KEYS_PATH=${TRUSTFENCE_KEYS_PATH}"
 	TF_SIGN_ENV="$TF_SIGN_ENV CONFIG_FIT_HAB_LOG_PATH=${DEPLOYDIR}/${BOOT_TOOLS}/mkimage-print_fit_hab.log"
 	[ -n "${TRUSTFENCE_KEY_INDEX}" ] && TF_SIGN_ENV="$TF_SIGN_ENV CONFIG_KEY_INDEX=${TRUSTFENCE_KEY_INDEX}"
 	[ -n "${TRUSTFENCE_SIGN_MODE}" ] && TF_SIGN_ENV="$TF_SIGN_ENV CONFIG_SIGN_MODE=${TRUSTFENCE_SIGN_MODE}"
@ -221,21 +216,21 @@ trustfence_sign_imxboot() {
 		fi
 		TF_SIGN_ENV="$TF_SIGN_ENV CONFIG_MKIMAGE_LOG_PATH=${DEPLOYDIR}/${BOOT_TOOLS}/mkimage-${target}.log"
 		env $TF_SIGN_ENV trustfence-sign-uboot.sh imx-boot-${MACHINE}.bin-${target} imx-boot-signed-${MACHINE}.bin-${target}
-		if [ -n "${TRUSTFENCE_DEK_PATH}" ] && [ "${TRUSTFENCE_DEK_PATH}" != "0" ]; then
-			TF_ENC_ENV="CONFIG_DEK_PATH=${TRUSTFENCE_DEK_PATH} ENABLE_ENCRYPTION=y"
+		if [ "${TRUSTFENCE_ENCRYPT}" = "1" ]; then
+			TF_ENC_ENV="CONFIG_DEK_PATH=${TRUSTFENCE_KEYS_PATH}/${TRUSTFENCE_DEK_ENCRYPT_KEYNAME} ENABLE_ENCRYPTION=y"
 			env $TF_SIGN_ENV $TF_ENC_ENV trustfence-sign-uboot.sh imx-boot-${MACHINE}.bin-${target} imx-boot-encrypted-${MACHINE}.bin-${target}
 		fi
 	done

 	# Generate symlinks for trustfence artifacts.
 	ln -sf imx-boot-signed-${MACHINE}.bin-${IMAGE_IMXBOOT_TARGET} ${DEPLOYDIR}/imx-boot-signed-${MACHINE}.bin
-	if [ -n "${TRUSTFENCE_DEK_PATH}" ] && [ "${TRUSTFENCE_DEK_PATH}" != "0" ]; then
+	if [ "${TRUSTFENCE_ENCRYPT}" = "1" ]; then
 		ln -sf imx-boot-encrypted-${MACHINE}.bin-${IMAGE_IMXBOOT_TARGET} ${DEPLOYDIR}/imx-boot-encrypted-${MACHINE}.bin
 	fi
 }

 trustfence_sign_imxboot:ccimx8x() {
-	TF_SIGN_ENV="CONFIG_SIGN_KEYS_PATH=${TRUSTFENCE_SIGN_KEYS_PATH}"
+	TF_SIGN_ENV="CONFIG_SIGN_KEYS_PATH=${TRUSTFENCE_KEYS_PATH}"
 	[ -n "${TRUSTFENCE_KEY_INDEX}" ] && TF_SIGN_ENV="$TF_SIGN_ENV CONFIG_KEY_INDEX=${TRUSTFENCE_KEY_INDEX}"
 	[ -n "${TRUSTFENCE_SIGN_MODE}" ] && TF_SIGN_ENV="$TF_SIGN_ENV CONFIG_SIGN_MODE=${TRUSTFENCE_SIGN_MODE}"
 	[ -n "${TRUSTFENCE_SRK_REVOKE_MASK}" ] && TF_SIGN_ENV="$TF_SIGN_ENV SRK_REVOKE_MASK=${TRUSTFENCE_SRK_REVOKE_MASK}"
@ -250,8 +245,8 @@ trustfence_sign_imxboot:ccimx8x() {
 		for rev in ${SOC_REVISIONS}; do
 			TF_SIGN_ENV="$TF_SIGN_ENV CONFIG_MKIMAGE_LOG_PATH=${DEPLOYDIR}/${BOOT_TOOLS}/mkimage-${rev}-${target}.log"
 			env $TF_SIGN_ENV trustfence-sign-uboot.sh imx-boot-${MACHINE}-${rev}.bin-${target} imx-boot-signed-${MACHINE}-${rev}.bin-${target}
-			if [ -n "${TRUSTFENCE_DEK_PATH}" ] && [ "${TRUSTFENCE_DEK_PATH}" != "0" ]; then
-				TF_ENC_ENV="CONFIG_DEK_PATH=${TRUSTFENCE_DEK_PATH} ENABLE_ENCRYPTION=y"
+			if [ "${TRUSTFENCE_ENCRYPT}" = "1" ]; then
+				TF_ENC_ENV="CONFIG_DEK_PATH=${TRUSTFENCE_KEYS_PATH}/${TRUSTFENCE_DEK_ENCRYPT_KEYNAME} ENABLE_ENCRYPTION=y"
 				env $TF_SIGN_ENV $TF_ENC_ENV trustfence-sign-uboot.sh imx-boot-${MACHINE}-${rev}.bin-${target} imx-boot-encrypted-${MACHINE}-${rev}.bin-${target}
 			fi
 		done
@ -260,11 +255,11 @@ trustfence_sign_imxboot:ccimx8x() {
 	# Generate symlinks for trustfence artifacts.
 	for rev in ${SOC_REVISIONS}; do
 		ln -sf ${UBOOT_PREFIX}-signed-${MACHINE}-${rev}.bin-${IMAGE_IMXBOOT_TARGET} ${DEPLOYDIR}/${UBOOT_PREFIX}-signed-${MACHINE}-${rev}.bin
-		if [ -n "${TRUSTFENCE_DEK_PATH}" ] && [ "${TRUSTFENCE_DEK_PATH}" != "0" ]; then
+		if [ "${TRUSTFENCE_ENCRYPT}" = "1" ]; then
 			ln -sf ${UBOOT_PREFIX}-encrypted-${MACHINE}-${rev}.bin-${IMAGE_IMXBOOT_TARGET} ${DEPLOYDIR}/${UBOOT_PREFIX}-encrypted-${MACHINE}-${rev}.bin
 		fi
 	done
 }

 trustfence_sign_imxboot[dirs] = "${DEPLOYDIR}"
-trustfence_sign_imxboot[vardeps] += "TRUSTFENCE_SIGN_KEYS_PATH TRUSTFENCE_KEY_INDEX TRUSTFENCE_DEK_PATH TRUSTFENCE_SIGN_MODE TRUSTFENCE_SRK_REVOKE_MASK TRUSTFENCE_UNLOCK_KEY_REVOCATION"
+trustfence_sign_imxboot[vardeps] += "TRUSTFENCE_KEYS_PATH TRUSTFENCE_KEY_INDEX TRUSTFENCE_ENCRYPT TRUSTFENCE_SIGN_MODE TRUSTFENCE_SRK_REVOKE_MASK TRUSTFENCE_UNLOCK_KEY_REVOCATION"
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-mkimage/imx-mkimage_git.inc
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-mkimage/imx-mkimage_git.inc
@ -1,12 +1,14 @@
 # Copyright 2017-2023 NXP

+# Keep the depends "not-native" so they get properly transformed
+# for native/nativesdk packages
 DEPENDS = "zlib openssl"

 SRC_URI = "git://github.com/nxp-imx/imx-mkimage.git;protocol=https;branch=${SRCBRANCH} \
           file://0001-iMX8M-soc.mak-use-native-mkimage-from-sysroot.patch \
 "
-SRCBRANCH = "lf-6.6.52_2.2.0"
-SRCREV = "71b8c18af93a5eb972d80fbec290006066cff24f"
+SRCBRANCH = "lf-6.6.52_2.2.1"
+SRCREV = "81fca6434be0610f3f9216a762aadc4dc3e8d8db"

 S = "${WORKDIR}/git"

--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-seco/imx-seco_5.9.4.1.bb
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-seco/imx-seco_5.9.4.1.bb
@ -7,7 +7,6 @@ require recipes-bsp/imx-seco/imx-seco_5.9.4.bb

 LIC_FILES_CHKSUM = "file://COPYING;md5=ca53281cc0caa7e320d4945a896fb837"

-SRC_URI[md5sum] = "2a8fcdd322713bc127398ee66bf9b50a"
 SRC_URI[sha256sum] = "bd8dc01966076836aabff53f2463295294166595006e1db430db21b6ffa6b667"
 IMX_SRCREV_ABBREV = "0333596"

--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-secure-enclave/imx-secure-enclave-seco_git.bb
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-secure-enclave/imx-secure-enclave-seco_git.bb
@ -5,7 +5,9 @@ DESCRIPTION += "SECO"

 PLAT = "seco"

-do_install:append() {
+EXTRA_OEMAKE:append:mx8x-nxp-bsp = " COMPATIBLE_MACHINE=mx8dxl-nxp-bsp"
+
+do_install:append:mx95-nxp-bsp() {
    # Remove common content that is to be installed by imx-secure-enclave
    for i in common hsm nvm.h; do
        rm -rf ${D}${includedir}/$i
@ -14,4 +16,4 @@ do_install:append() {
    rm ${D}${bindir}/nvmd_conf_setup.sh
 }

-COMPATIBLE_MACHINE = "(mx95-nxp-bsp)"
+COMPATIBLE_MACHINE = "(mx8x-nxp-bsp|mx95-nxp-bsp)"
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-secure-enclave/imx-secure-enclave.inc
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-secure-enclave/imx-secure-enclave.inc
@ -1,4 +1,4 @@
-# Copyright 2021-2024 NXP
+# Copyright 2021-2025 NXP

 SUMMARY = "NXP i.MX SECURE ENCLAVE library"
 DESCRIPTION = "NXP IMX SECURE ENCLAVE library"
@ -10,8 +10,11 @@ DEPENDS = " mbedtls openssl"

 SRC_URI = "${SECURE_ENCLAVE_LIB_SRC};branch=${SRCBRANCH}"
 SECURE_ENCLAVE_LIB_SRC ?= "git://github.com/NXP/imx-secure-enclave.git;protocol=https"
-SRCBRANCH = "lf-6.6.52_2.2.0"
-SRCREV = "dffbb844e86f4a49058ffbb40548474059969c27"
+SRCBRANCH = "lf-6.6.52_2.2.1"
+SRCREV = "4f0340fb4cf6b16a64c7d65281b4880c5d1cd453"
+
+# Set package version to the release, so it overrides the recipe in meta-freescale
+PV = "lf-6.6.52_2.2.1"

 S = "${WORKDIR}/git"

--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-graphics/wayland/weston_12.0.5.imx.bb
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-graphics/wayland/weston_12.0.5.imx.bb
@ -0,0 +1,15 @@
+# Copyright (C) 2025, Digi International Inc.
+
+#
+# Reuse meta-freescale's weston_12.0.4.imx.bb
+#
+require recipes-graphics/wayland/weston_12.0.4.imx.bb
+
+#
+# We need to get the rest of SRC_URI artifacts from meta-freescale, so
+# "abuse" COREBASE to get the path to "meta-freescale"
+#
+FILESEXTRAPATHS:prepend := "${COREBASE}/../meta-freescale/recipes-graphics/wayland/weston:"
+
+SRCBRANCH = "weston-imx-12.0.5"
+SRCREV = "fce3595b96eab0b2b432ceae070a65db7d16d866"
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-kernel/kernel-modules/kernel-module-nxp-wlan/0001-mxm_wifiex-do-not-process-countryIE-internally.patch
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-kernel/kernel-modules/kernel-module-nxp-wlan/0001-mxm_wifiex-do-not-process-countryIE-internally.patch
@ -0,0 +1,47 @@
+From: Gonzalo Ruiz <Gonzalo.Ruiz@digi.com>
+Date: Fri, 25 Jul 2025 09:44:32 +0200
+Subject: [PATCH 1/1] mxm_wifiex: do not process countryIE internally
+
+Driver does not support processing countryIE, however when argument
+'country_ie_ignore=0' was set, driver could receive and store the
+country code but not apply the country power table.
+
+If a regulatory change was issued afterwards by the user (i.e. iw reg
+set) for the same country, change request was ignored and the power
+table was still not applied.
+
+Correct that by ignoring the countryIE when there is a self-managed
+wiphy registered.
+
+Patch provided by NXP.
+
+Signed-off-by: Gonzalo Ruiz <Gonzalo.Ruiz@digi.com>
+---
+ mlinux/moal_sta_cfg80211.c | 14 ++++++++++++++
+ 1 file changed, 14 insertions(+)
+
+diff --git a/mlinux/moal_sta_cfg80211.c b/mlinux/moal_sta_cfg80211.c
+index f30134c..32822ac 100644
+--- a/mlinux/moal_sta_cfg80211.c
+++ b/mlinux/moal_sta_cfg80211.c
+@@ -1847,6 +1847,20 @@ static int woal_process_country_ie(moal_private *priv, struct cfg80211_bss *bss)
+ 	mlan_status status = MLAN_STATUS_SUCCESS;
+ 
+ 	ENTER();
+
+	if (!priv) {
+		PRINTM(MERROR, "%s(): priv is NULL!\n", __func__);
+		LEAVE();
+		return 0;
+	}
+#if CFG80211_VERSION_CODE >= KERNEL_VERSION(4, 0, 0)
+	if (priv->wdev && priv->wdev->wiphy &&
+		(priv->wdev->wiphy->regulatory_flags & REGULATORY_WIPHY_SELF_MANAGED)) {
+		LEAVE();
+		return 0;
+	}
+#endif
+
+ 	rcu_read_lock();
+ 	country_ie = (u8 *)ieee80211_bss_get_ie(bss, WLAN_EID_COUNTRY);
+ 	if (!country_ie) {
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-kernel/kernel-modules/kernel-module-nxp-wlan/watch-regdomain.service
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-kernel/kernel-modules/kernel-module-nxp-wlan/watch-regdomain.service
@ -0,0 +1,7 @@
+[Unit]
+Description=Monitor for global regulatory domain changes
+After=network.target
+
+[Service]
+Type=oneshot
+ExecStart=/usr/sbin/watch_regdomain.sh
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-kernel/kernel-modules/kernel-module-nxp-wlan/watch-regdomain.timer
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-kernel/kernel-modules/kernel-module-nxp-wlan/watch-regdomain.timer
@ -0,0 +1,11 @@
+[Unit]
+Description=Check regdomain every 5 seconds
+
+[Timer]
+OnBootSec=5sec
+OnUnitInactiveSec=5sec
+AccuracySec=1s
+Unit=watch-regdomain.service
+
+[Install]
+WantedBy=timers.target
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-kernel/kernel-modules/kernel-module-nxp-wlan/watch_regdomain.sh
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-kernel/kernel-modules/kernel-module-nxp-wlan/watch_regdomain.sh
@ -0,0 +1,14 @@
+#!/bin/sh
+
+REGDOMAIN_FILE="/var/run/regdomain"
+
+previous=$(cat "${REGDOMAIN_FILE}" 2>/dev/null)
+
+# Extract the 'global' regulatory domain
+current=$(iw reg get | grep -m1 '^country' | cut -d' ' -f2 | tr -d ':')
+
+if [ -n "${current}" ] && [ "${current}" != "${previous}" ]; then
+	echo "Global regulatory domain changed to '${current}'"
+	echo "${current}" > "${REGDOMAIN_FILE}"
+	iw reg set ${current}
+fi
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-kernel/kernel-modules/kernel-module-nxp-wlan_git.bbappend
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-kernel/kernel-modules/kernel-module-nxp-wlan_git.bbappend
@ -5,6 +5,10 @@ FILESEXTRAPATHS:prepend := "${THISDIR}/${BPN}:"
 SRC_URI:append = " \
    file://81-iw612-wifi.rules \
    file://load_iw612.sh \
+    file://watch_regdomain.sh \
+    file://watch-regdomain.service \
+    file://watch-regdomain.timer \
+    file://0001-mxm_wifiex-do-not-process-countryIE-internally.patch \
 "

 do_install:append () {
@ -12,11 +16,23 @@ do_install:append () {
 	install -m 0644 ${WORKDIR}/81-iw612-wifi.rules ${D}${sysconfdir}/udev/rules.d/
 	install -d ${D}${sysconfdir}/udev/scripts
 	install -m 0777 ${WORKDIR}/load_iw612.sh ${D}${sysconfdir}/udev/scripts/
+
+	if ${@bb.utils.contains('DISTRO_FEATURES','systemd','true','false',d)}; then
+		install -d ${D}${systemd_system_unitdir}
+		install -m 0644 ${WORKDIR}/watch-regdomain.service ${D}${systemd_system_unitdir}/watch-regdomain.service
+		install -m 0644 ${WORKDIR}/watch-regdomain.timer ${D}${systemd_system_unitdir}/watch-regdomain.timer
+	fi
+
+	install -d ${D}${sbindir}
+	install -m 0755 ${WORKDIR}/watch_regdomain.sh ${D}${sbindir}/
 }

 FILES:${PN}:append = " \
 	${sysconfdir}/udev/rules.d \
 	${sysconfdir}/udev/scripts \
+	${sbindir}/watch_regdomain.sh \
+	${systemd_system_unitdir}/watch-regdomain.service \
+	${systemd_system_unitdir}/watch-regdomain.timer \
 "

 RDEPENDS:${PN}:append = " firmware-murata-nxp"
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-client/tee-supplicant.service
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-client/tee-supplicant.service
@ -1,10 +0,0 @@
-[Unit]
-Description=TEE Supplicant
-
-[Service]
-User=root
-EnvironmentFile=-@sysconfdir@/default/tee-supplicant
-ExecStart=@sbindir@/tee-supplicant $OPTARGS
-
-[Install]
-WantedBy=basic.target
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-client_4.4.0.imx.bb
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-client_4.4.0.imx.bb
@ -1,9 +0,0 @@
-# Copyright (C) 2025, Digi International Inc.
-
-#
-# Reuse meta-freescale's optee-client_4.2.0.imx.bb
-#
-require recipes-security/optee-imx/optee-client_4.2.0.imx.bb
-
-SRCBRANCH = "lf-6.6.52_2.2.0"
-SRCREV = "d221676a58b305bddbf97db00395205b3038de8e"
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-client_4.4.0.imx.bbappend
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-client_4.4.0.imx.bbappend
@ -1,19 +1,12 @@
 # Copyright (C) 2024, 2025, Digi International Inc.
+
 FILESEXTRAPATHS:prepend := "${THISDIR}/${BPN}:"

 SRC_URI += "${@oe.utils.vartrue('TRUSTFENCE_FILE_BASED_ENCRYPT', 'file://tee-supplicant', '', d)}"

-EXTRA_OEMAKE += "PKG_CONFIG=pkg-config CFG_TEE_FS_PARENT_PATH='${localstatedir}/lib/tee'"
-
-do_install() {
-	oe_runmake DESTDIR=${D} install
-	install -D -p -m0644 ${WORKDIR}/tee-supplicant.service ${D}${systemd_system_unitdir}/tee-supplicant.service
-	sed -i -e s:@sysconfdir@:${sysconfdir}:g \
-		-e s:@sbindir@:${sbindir}:g \
-		${D}${systemd_system_unitdir}/tee-supplicant.service
-
-	if ${@oe.utils.vartrue('TRUSTFENCE_FILE_BASED_ENCRYPT', 'true', 'false',d)}; then
-		install -d ${D}${sysconfdir}/default/
-		install -m 0644 ${WORKDIR}/tee-supplicant ${D}${sysconfdir}/default/tee-supplicant
-	fi
+do_install:append(){
+    if ${@oe.utils.vartrue('TRUSTFENCE_FILE_BASED_ENCRYPT', 'true', 'false',d)}; then
+        install -d ${D}${sysconfdir}/default/
+        install -m 0644 ${WORKDIR}/tee-supplicant ${D}${sysconfdir}/default/tee-supplicant
+    fi
 }
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os/0001-core-Define-section-attributes-for-clang.patch
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os/0001-core-Define-section-attributes-for-clang.patch
@ -1,245 +0,0 @@
-From ef83625c9a5f50610e25aa860c4b9c5e64723a66 Mon Sep 17 00:00:00 2001
-From: Emekcan Aras <emekcan.aras@arm.com>
-Date: Wed, 21 Dec 2022 10:55:58 +0000
-Subject: [PATCH 1/4] core: Define section attributes for clang
-
-Clang's attribute section is not same as gcc, here we need to add flags
-to sections so they can be eventually collected by linker into final
-output segments. Only way to do so with clang is to use
-
-pragma clang section ...
-
-The behavious is described here [1], this allows us to define names bss
-sections. This was not an issue until clang-15 where LLD linker starts
-to detect the section flags before merging them and throws the following
-errors
-
-| ld.lld: error: section type mismatch for .nozi.kdata_page
-| >>> /mnt/b/yoe/master/build/tmp/work/qemuarm64-yoe-linux/optee-os-tadevkit/3.17.0-r0/build/core/arch/arm/kernel/thread.o:(.nozi.kdata_page): SHT_PROGBITS
-| >>> output section .nozi: SHT_NOBITS
-|
-| ld.lld: error: section type mismatch for .nozi.mmu.l2
-| >>> /mnt/b/yoe/master/build/tmp/work/qemuarm64-yoe-linux/optee-os-tadevkit/3.17.0-r0/build/core/arch/arm/mm/core_mmu_lpae.o:(.nozi.mmu.l2): SHT_PROGBITS
-| >>> output section .nozi: SHT_NOBITS
-
-These sections should be carrying SHT_NOBITS but so far it was not
-possible to do so, this patch tries to use clangs pragma to get this
-going and match the functionality with gcc.
-
-[1] https://intel.github.io/llvm-docs/clang/LanguageExtensions.html#specifying-section-names-for-global-objects-pragma-clang-section
-
-Upstream-Status: Pending
-Signed-off-by: Khem Raj <raj.khem@gmail.com>
-Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
---
-
- core/arch/arm/kernel/thread.c    | 19 +++++++++++++++--
- core/arch/arm/mm/core_mmu_lpae.c | 35 +++++++++++++++++++++++++++----
- core/arch/arm/mm/core_mmu_v7.c   | 36 +++++++++++++++++++++++++++++---
- core/kernel/thread.c             | 13 +++++++++++-
- core/mm/pgt_cache.c              | 12 ++++++++++-
- 5 files changed, 104 insertions(+), 11 deletions(-)
-
-diff --git a/core/arch/arm/kernel/thread.c b/core/arch/arm/kernel/thread.c
-index 66833b3a0..b3eb9cf9a 100644
--- a/core/arch/arm/kernel/thread.c
-+++ b/core/arch/arm/kernel/thread.c
-@@ -45,15 +45,30 @@ static size_t thread_user_kcode_size __nex_bss;
- #if defined(CFG_CORE_UNMAP_CORE_AT_EL0) && \
- 	defined(CFG_CORE_WORKAROUND_SPECTRE_BP_SEC) && defined(ARM64)
- long thread_user_kdata_sp_offset __nex_bss;
-+#ifdef __clang__
-+#ifndef CFG_VIRTUALIZATION
-+#pragma clang section bss=".nozi.kdata_page"
-+#else
-+#pragma clang section bss=".nex_nozi.kdata_page"
-+#endif
-+#endif
- static uint8_t thread_user_kdata_page[
- 	ROUNDUP(sizeof(struct thread_core_local) * CFG_TEE_CORE_NB_CORE,
- 		SMALL_PAGE_SIZE)]
- 	__aligned(SMALL_PAGE_SIZE)
-+#ifndef __clang__
- #ifndef CFG_NS_VIRTUALIZATION
-	__section(".nozi.kdata_page");
-+	__section(".nozi.kdata_page")
- #else
-	__section(".nex_nozi.kdata_page");
-+	__section(".nex_nozi.kdata_page")
- #endif
-+#endif
-+    ;
-+#endif
-+
-+/* reset BSS section to default ( .bss ) */
-+#ifdef __clang__
-+#pragma clang section bss=""
- #endif
- 
- #ifdef ARM32
-diff --git a/core/arch/arm/mm/core_mmu_lpae.c b/core/arch/arm/mm/core_mmu_lpae.c
-index 4c8b85e39..1885e1d3f 100644
--- a/core/arch/arm/mm/core_mmu_lpae.c
-+++ b/core/arch/arm/mm/core_mmu_lpae.c
-@@ -234,19 +234,46 @@ typedef uint16_t l1_idx_t;
- typedef uint64_t base_xlat_tbls_t[CFG_TEE_CORE_NB_CORE][NUM_BASE_LEVEL_ENTRIES];
- typedef uint64_t xlat_tbl_t[XLAT_TABLE_ENTRIES];
- 
-+#ifdef __clang__
-+#pragma clang section bss=".nozi.mmu.base_table"
-+#endif
- static base_xlat_tbls_t base_xlation_table[NUM_BASE_TABLES]
- 	__aligned(NUM_BASE_LEVEL_ENTRIES * XLAT_ENTRY_SIZE)
-	__section(".nozi.mmu.base_table");
-+#ifndef __clang__
-+	__section(".nozi.mmu.base_table")
-+#endif
-+;
-+#ifdef __clang__
-+#pragma clang section bss=""
-+#endif
- 
-+#ifdef __clang__
-+#pragma clang section bss=".nozi.mmu.l2"
-+#endif
- static xlat_tbl_t xlat_tables[MAX_XLAT_TABLES]
-	__aligned(XLAT_TABLE_SIZE) __section(".nozi.mmu.l2");
-+	__aligned(XLAT_TABLE_SIZE)
-+#ifndef __clang__
-+	__section(".nozi.mmu.l2")
-+#endif
-+;
-+#ifdef __clang__
-+#pragma clang section bss=""
-+#endif
- 
- #define XLAT_TABLES_SIZE	(sizeof(xlat_tbl_t) * MAX_XLAT_TABLES)
- 
-+#ifdef __clang__
-+#pragma clang section bss=".nozi.mmu.l2"
-+#endif
- /* MMU L2 table for TAs, one for each thread */
- static xlat_tbl_t xlat_tables_ul1[CFG_NUM_THREADS]
-	__aligned(XLAT_TABLE_SIZE) __section(".nozi.mmu.l2");
-
-+#ifndef __clang__
-+	__aligned(XLAT_TABLE_SIZE) __section(".nozi.mmu.l2")
-+#endif
-+;
-+#ifdef __clang__
-+#pragma clang section bss=""
-+#endif
- /*
-  * TAs page table entry inside a level 1 page table.
-  *
-diff --git a/core/arch/arm/mm/core_mmu_v7.c b/core/arch/arm/mm/core_mmu_v7.c
-index 61e703da8..1960c08ca 100644
--- a/core/arch/arm/mm/core_mmu_v7.c
-+++ b/core/arch/arm/mm/core_mmu_v7.c
-@@ -204,16 +204,46 @@ typedef uint32_t l1_xlat_tbl_t[NUM_L1_ENTRIES];
- typedef uint32_t l2_xlat_tbl_t[NUM_L2_ENTRIES];
- typedef uint32_t ul1_xlat_tbl_t[NUM_UL1_ENTRIES];
- 
-+#ifdef __clang__
-+#pragma clang section bss=".nozi.mmu.l1"
-+#endif
- static l1_xlat_tbl_t main_mmu_l1_ttb
-		__aligned(L1_ALIGNMENT) __section(".nozi.mmu.l1");
-+		__aligned(L1_ALIGNMENT)
-+#ifndef __clang__
-+       __section(".nozi.mmu.l1")
-+#endif
-+;
-+#ifdef __clang__
-+#pragma clang section bss=""
-+#endif
- 
- /* L2 MMU tables */
-+#ifdef __clang__
-+#pragma clang section bss=".nozi.mmu.l2"
-+#endif
- static l2_xlat_tbl_t main_mmu_l2_ttb[MAX_XLAT_TABLES]
-		__aligned(L2_ALIGNMENT) __section(".nozi.mmu.l2");
-+		__aligned(L2_ALIGNMENT)
-+#ifndef __clang__
-+       __section(".nozi.mmu.l2")
-+#endif
-+;
-+#ifdef __clang__
-+#pragma clang section bss=""
-+#endif
- 
- /* MMU L1 table for TAs, one for each thread */
-+#ifdef __clang__
-+#pragma clang section bss=".nozi.mmu.ul1"
-+#endif
- static ul1_xlat_tbl_t main_mmu_ul1_ttb[CFG_NUM_THREADS]
-		__aligned(UL1_ALIGNMENT) __section(".nozi.mmu.ul1");
-+		__aligned(UL1_ALIGNMENT)
-+#ifndef __clang__
-+       __section(".nozi.mmu.ul1")
-+#endif
-+;
-+#ifdef __clang__
-+#pragma clang section bss=""
-+#endif
- 
- struct mmu_partition {
- 	l1_xlat_tbl_t *l1_table;
-diff --git a/core/kernel/thread.c b/core/kernel/thread.c
-index 2a1f22dce..5516b6771 100644
--- a/core/kernel/thread.c
-+++ b/core/kernel/thread.c
-@@ -39,13 +39,24 @@ static uint32_t end_canary_value = 0xababab00;
- 	name[stack_num][sizeof(name[stack_num]) / sizeof(uint32_t) - 1]
- #endif
- 
-+#define DO_PRAGMA(x) _Pragma (#x)
-+
-+#ifdef __clang__
-+#define DECLARE_STACK(name, num_stacks, stack_size, linkage) \
-+DO_PRAGMA (clang section bss=".nozi_stack." #name) \
-+linkage uint32_t name[num_stacks] \
-+		[ROUNDUP(stack_size + STACK_CANARY_SIZE + STACK_CHECK_EXTRA, \
-+			 STACK_ALIGNMENT) / sizeof(uint32_t)] \
-+		__attribute__((aligned(STACK_ALIGNMENT))); \
-+DO_PRAGMA(clang section bss="")
-+#else
- #define DECLARE_STACK(name, num_stacks, stack_size, linkage) \
- linkage uint32_t name[num_stacks] \
- 		[ROUNDUP(stack_size + STACK_CANARY_SIZE + STACK_CHECK_EXTRA, \
- 			 STACK_ALIGNMENT) / sizeof(uint32_t)] \
- 		__attribute__((section(".nozi_stack." # name), \
- 			       aligned(STACK_ALIGNMENT)))
-
-+#endif
- #define GET_STACK(stack) ((vaddr_t)(stack) + STACK_SIZE(stack))
- 
- DECLARE_STACK(stack_tmp, CFG_TEE_CORE_NB_CORE, STACK_TMP_SIZE,
-diff --git a/core/mm/pgt_cache.c b/core/mm/pgt_cache.c
-index 79553c6d2..b9efdf427 100644
--- a/core/mm/pgt_cache.c
-+++ b/core/mm/pgt_cache.c
-@@ -410,8 +410,18 @@ void pgt_init(void)
- 	 * has a large alignment, while .bss has a small alignment. The current
- 	 * link script is optimized for small alignment in .bss
- 	 */
-+#ifdef __clang__
-+#pragma clang section bss=".nozi.mmu.l2"
-+#endif
- 	static uint8_t pgt_tables[PGT_CACHE_SIZE][PGT_SIZE]
-			__aligned(PGT_SIZE) __section(".nozi.pgt_cache");
-+			__aligned(PGT_SIZE)
-+#ifndef __clang__
-+			__section(".nozi.pgt_cache")
-+#endif
-+			;
-+#ifdef __clang__
-+#pragma clang section bss=""
-+#endif
- 	size_t n;
- 
- 	for (n = 0; n < ARRAY_SIZE(pgt_tables); n++) {
-- 
-2.43.2
-
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os/0002-core-imx-support-ccimx91-dvk.patch
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os/0002-core-imx-support-ccimx91-dvk.patch
@ -11,10 +11,10 @@ Signed-off-by: Javier Viguera <javier.viguera@digi.com>
 2 files changed, 7 insertions(+)

 diff --git a/core/arch/arm/plat-imx/conf.mk b/core/arch/arm/plat-imx/conf.mk
-index 33647835f2fb..ca0a718ba6e5 100644
+index 62cc51b61063..c65e383edf38 100644
 --- a/core/arch/arm/plat-imx/conf.mk
 +++ b/core/arch/arm/plat-imx/conf.mk
-@@ -95,6 +95,7 @@ mx95-flavorlist = \
+@@ -96,6 +96,7 @@ mx95-flavorlist = \
 	mx95evk \
 
 mx91-flavorlist = \
@ -22,7 +22,7 @@ index 33647835f2fb..ca0a718ba6e5 100644
 	mx91evk \
 
 ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ul-flavorlist)))
-@@ -493,6 +494,11 @@ CFG_DDR_SIZE ?= 0x80000000
+@@ -504,6 +505,11 @@ CFG_DDR_SIZE ?= 0x80000000
 CFG_UART_BASE ?= UART1_BASE
 endif
 
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os/0002-optee-enable-clang-support.patch
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os/0002-optee-enable-clang-support.patch
@ -1,34 +0,0 @@
-From 2ba573c9763329fbfdfacc8393d565ab747cac4d Mon Sep 17 00:00:00 2001
-From: Brett Warren <brett.warren@arm.com>
-Date: Wed, 23 Sep 2020 09:27:34 +0100
-Subject: [PATCH 2/4] optee: enable clang support
-
-When compiling with clang, the LIBGCC_LOCATE_CFLAG variable used
-to provide a sysroot wasn't included, which results in not locating
-compiler-rt. This is mitigated by including the variable as ammended.
-
-Upstream-Status: Pending
-ChangeId: 8ba69a4b2eb8ebaa047cb266c9aa6c2c3da45701
-Signed-off-by: Brett Warren <brett.warren@arm.com>
-Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
---
-
- mk/clang.mk | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/mk/clang.mk b/mk/clang.mk
-index a045beee8..1ebe2f702 100644
--- a/mk/clang.mk
-+++ b/mk/clang.mk
-@@ -30,7 +30,7 @@ comp-cflags-warns-clang := -Wno-language-extension-token \
- 
- # Note, use the compiler runtime library (libclang_rt.builtins.*.a) instead of
- # libgcc for clang
-libgcc$(sm)	:= $(shell $(CC$(sm)) $(CFLAGS$(arch-bits-$(sm))) \
-+libgcc$(sm)	:= $(shell $(CC$(sm)) $(LIBGCC_LOCATE_CFLAGS) $(CFLAGS$(arch-bits-$(sm))) \
- 			-rtlib=compiler-rt -print-libgcc-file-name 2> /dev/null)
- 
- # Core ASLR relies on the executable being ready to run from its preferred load
-- 
-2.43.2
-
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os/0003-arm32-libutils-libutee-ta-add-.note.GNU-stack-sectio.patch
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os/0003-arm32-libutils-libutee-ta-add-.note.GNU-stack-sectio.patch
@ -1,133 +0,0 @@
-From 6f738803a59613ec4a683ddbc1747ebffd75a4e6 Mon Sep 17 00:00:00 2001
-From: Jerome Forissier <jerome.forissier@linaro.org>
-Date: Tue, 23 Aug 2022 12:31:46 +0000
-Subject: [PATCH 3/4] arm32: libutils, libutee, ta: add .note.GNU-stack section
- to
-
- .S files
-
-When building for arm32 with GNU binutils 2.39, the linker outputs
-warnings when linking Trusted Applications:
-
- arm-unknown-linux-uclibcgnueabihf-ld.bfd: warning: utee_syscalls_a32.o: missing .note.GNU-stack section implies executable stack
- arm-unknown-linux-uclibcgnueabihf-ld.bfd: NOTE: This behaviour is deprecated and will be removed in a future version of the linker
-
-We could silence the warning by adding the '-z execstack' option to the
-TA link flags, like we did in the parent commit for the TEE core and
-ldelf. Indeed, ldelf always allocates a non-executable piece of memory
-for the TA to use as a stack.
-
-However it seems preferable to comply with the common ELF practices in
-this case. A better fix is therefore to add the missing .note.GNU-stack
-sections in the assembler files.
-
-Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
-
-Signed-off-by: Anton Antonov <Anton.Antonov@arm.com>
-Upstream-Status: Backport [https://github.com/OP-TEE/optee_os/pull/5499]
-Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
---
-
- lib/libutee/arch/arm/utee_syscalls_a32.S             | 2 ++
- lib/libutils/ext/arch/arm/atomic_a32.S               | 2 ++
- lib/libutils/ext/arch/arm/mcount_a32.S               | 2 ++
- lib/libutils/isoc/arch/arm/arm32_aeabi_divmod_a32.S  | 2 ++
- lib/libutils/isoc/arch/arm/arm32_aeabi_ldivmod_a32.S | 2 ++
- lib/libutils/isoc/arch/arm/setjmp_a32.S              | 2 ++
- ta/arch/arm/ta_entry_a32.S                           | 2 ++
- 7 files changed, 14 insertions(+)
-
-diff --git a/lib/libutee/arch/arm/utee_syscalls_a32.S b/lib/libutee/arch/arm/utee_syscalls_a32.S
-index 2dea83ab8..668b65a86 100644
--- a/lib/libutee/arch/arm/utee_syscalls_a32.S
-+++ b/lib/libutee/arch/arm/utee_syscalls_a32.S
-@@ -9,6 +9,8 @@
- 
- 	.section .note.GNU-stack,"",%progbits
- 
-+	.section .note.GNU-stack,"",%progbits
-+
-         .section .text
-         .balign 4
-         .code 32
-diff --git a/lib/libutils/ext/arch/arm/atomic_a32.S b/lib/libutils/ext/arch/arm/atomic_a32.S
-index 2be73ffad..87ddf1065 100644
--- a/lib/libutils/ext/arch/arm/atomic_a32.S
-+++ b/lib/libutils/ext/arch/arm/atomic_a32.S
-@@ -7,6 +7,8 @@
- 
- 	.section .note.GNU-stack,"",%progbits
- 
-+	.section .note.GNU-stack,"",%progbits
-+
- /* uint32_t atomic_inc32(uint32_t *v); */
- FUNC atomic_inc32 , :
- 	ldrex	r1, [r0]
-diff --git a/lib/libutils/ext/arch/arm/mcount_a32.S b/lib/libutils/ext/arch/arm/mcount_a32.S
-index 54dc3c02d..2f24632b8 100644
--- a/lib/libutils/ext/arch/arm/mcount_a32.S
-+++ b/lib/libutils/ext/arch/arm/mcount_a32.S
-@@ -9,6 +9,8 @@
- 
- 	.section .note.GNU-stack,"",%progbits
- 
-+	.section .note.GNU-stack,"",%progbits
-+
- /*
-  * Convert return address to call site address by subtracting the size of the
-  * mcount call instruction (blx __gnu_mcount_nc).
-diff --git a/lib/libutils/isoc/arch/arm/arm32_aeabi_divmod_a32.S b/lib/libutils/isoc/arch/arm/arm32_aeabi_divmod_a32.S
-index 37ae9ec6f..bc6c48b1a 100644
--- a/lib/libutils/isoc/arch/arm/arm32_aeabi_divmod_a32.S
-+++ b/lib/libutils/isoc/arch/arm/arm32_aeabi_divmod_a32.S
-@@ -7,6 +7,8 @@
- 
- 	.section .note.GNU-stack,"",%progbits
- 
-+	.section .note.GNU-stack,"",%progbits
-+
- /*
-  * signed ret_idivmod_values(signed quot, signed rem);
-  * return quotient and remaining the EABI way (regs r0,r1)
-diff --git a/lib/libutils/isoc/arch/arm/arm32_aeabi_ldivmod_a32.S b/lib/libutils/isoc/arch/arm/arm32_aeabi_ldivmod_a32.S
-index 5c3353e2c..9fb5e0283 100644
--- a/lib/libutils/isoc/arch/arm/arm32_aeabi_ldivmod_a32.S
-+++ b/lib/libutils/isoc/arch/arm/arm32_aeabi_ldivmod_a32.S
-@@ -7,6 +7,8 @@
- 
- 	.section .note.GNU-stack,"",%progbits
- 
-+	.section .note.GNU-stack,"",%progbits
-+
- /*
-  * __value_in_regs lldiv_t __aeabi_ldivmod( long long n, long long d)
-  */
-diff --git a/lib/libutils/isoc/arch/arm/setjmp_a32.S b/lib/libutils/isoc/arch/arm/setjmp_a32.S
-index f8a0b70df..37d7cb88e 100644
--- a/lib/libutils/isoc/arch/arm/setjmp_a32.S
-+++ b/lib/libutils/isoc/arch/arm/setjmp_a32.S
-@@ -53,6 +53,8 @@
- 
- 	.section .note.GNU-stack,"",%progbits
- 
-+	.section .note.GNU-stack,"",%progbits
-+
- /* Arm/Thumb interworking support:
- 
-    The interworking scheme expects functions to use a BX instruction
-diff --git a/ta/arch/arm/ta_entry_a32.S b/ta/arch/arm/ta_entry_a32.S
-index cd9a12f9d..ccdc19928 100644
--- a/ta/arch/arm/ta_entry_a32.S
-+++ b/ta/arch/arm/ta_entry_a32.S
-@@ -7,6 +7,8 @@
- 
- 	.section .note.GNU-stack,"",%progbits
- 
-+	.section .note.GNU-stack,"",%progbits
-+
- /*
-  * This function is the bottom of the user call stack. Mark it as such so that
-  * the unwinding code won't try to go further down.
-- 
-2.43.2
-
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os/0003-core-imx-support-ccimx93-dvk.patch
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os/0003-core-imx-support-ccimx93-dvk.patch
@ -7,16 +7,17 @@ SOC revision A0 requires a different build.
 Upstream-Status: Inappropriate [DEY specific]

 Signed-off-by: Javier Viguera <javier.viguera@digi.com>
+Signed-off-by: Hector Palacios <hector.palacios@digi.com>
 ---
 core/arch/arm/plat-imx/conf.mk           | 13 +++++++++++++
- core/arch/arm/plat-imx/registers/imx93.h |  5 +++++
- 2 files changed, 18 insertions(+)
+ core/arch/arm/plat-imx/registers/imx93.h |  4 ++++
+ 2 files changed, 17 insertions(+)

 diff --git a/core/arch/arm/plat-imx/conf.mk b/core/arch/arm/plat-imx/conf.mk
-index 33647835f2fb..8d065a3d3db3 100644
+index c65e383edf38..ee0b6d6a0463 100644
 --- a/core/arch/arm/plat-imx/conf.mk
 +++ b/core/arch/arm/plat-imx/conf.mk
-@@ -89,6 +89,8 @@ mx8ulp-flavorlist = \
+@@ -90,6 +90,8 @@ mx8ulp-flavorlist = \
 	mx8ulpevk \
 
 mx93-flavorlist = \
@ -25,8 +26,8 @@ index 33647835f2fb..8d065a3d3db3 100644
 	mx93evk \
 
 mx95-flavorlist = \
-@@ -493,6 +495,17 @@ CFG_DDR_SIZE ?= 0x80000000
- CFG_UART_BASE ?= UART1_BASE
+@@ -510,6 +512,17 @@ CFG_DDR_SIZE ?= 0x20000000
+ CFG_UART_BASE ?= UART6_BASE
 endif
 
 +ifneq (,$(filter $(PLATFORM_FLAVOR),ccimx93dvk))
@ -44,15 +45,10 @@ index 33647835f2fb..8d065a3d3db3 100644
 CFG_DDR_SIZE ?= 0x80000000
 CFG_UART_BASE ?= UART1_BASE
 diff --git a/core/arch/arm/plat-imx/registers/imx93.h b/core/arch/arm/plat-imx/registers/imx93.h
-index 21080da82d04..29070eb917ac 100644
+index 17f4d8f5755e..29070eb917ac 100644
 --- a/core/arch/arm/plat-imx/registers/imx93.h
 +++ b/core/arch/arm/plat-imx/registers/imx93.h
-@@ -9,11 +9,16 @@
- #define GICR_BASE 0x48040000
- 
- #define UART1_BASE 0x44380000
-+#define UART6_BASE 0x425a0000
- /*
+@@ -14,7 +14,11 @@
  * For Normal MU - Use MU_BASE as 0x47520000
  * For Trust MU - Use MU_BASE as 0x47530000
  */
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os/0004-core-ccimx93-enable-AES_HUK-trusted-application.patch
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os/0004-core-ccimx93-enable-AES_HUK-trusted-application.patch
@ -26,10 +26,10 @@ Signed-off-by: Javier Viguera <javier.viguera@digi.com>
 create mode 100644 ta/aes_huk/user_ta_header_defines.h

 diff --git a/core/arch/arm/plat-imx/conf.mk b/core/arch/arm/plat-imx/conf.mk
-index 8d065a3d3db3..de1cf45ca9b6 100644
+index ee0b6d6a0463..916b6b6a1fbb 100644
 --- a/core/arch/arm/plat-imx/conf.mk
 +++ b/core/arch/arm/plat-imx/conf.mk
-@@ -498,12 +498,14 @@ endif
+@@ -515,12 +515,14 @@ endif
 ifneq (,$(filter $(PLATFORM_FLAVOR),ccimx93dvk))
 CFG_DDR_SIZE ?= 0x40000000
 CFG_UART_BASE ?= UART6_BASE
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os/0004-core-link-add-no-warn-rwx-segments.patch
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os/0004-core-link-add-no-warn-rwx-segments.patch
@ -1,67 +0,0 @@
-From a63f82f74e015eb662242cdb51ef814e3f576829 Mon Sep 17 00:00:00 2001
-From: Jerome Forissier <jerome.forissier@linaro.org>
-Date: Fri, 5 Aug 2022 09:48:03 +0200
-Subject: [PATCH 4/4] core: link: add --no-warn-rwx-segments
-
-Signed-off-by: Anton Antonov <Anton.Antonov@arm.com>
-Upstream-Status: Backport [https://github.com/OP-TEE/optee_os/pull/5474]
-
-binutils ld.bfd generates one RWX LOAD segment by merging several sections
-with mixed R/W/X attributes (.text, .rodata, .data). After version 2.38 it
-also warns by default when that happens [1], which breaks the build due to
--fatal-warnings. The RWX segment is not a problem for the TEE core, since
-that information is not used to set memory permissions. Therefore, silence
-the warning.
-
-Link: [1] https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=ba951afb99912da01a6e8434126b8fac7aa75107
-Link: https://sourceware.org/bugzilla/show_bug.cgi?id=29448
-Reported-by: Dominique Martinet <dominique.martinet@atmark-techno.com>
-Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
-Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
-Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
---
-
- core/arch/arm/kernel/link.mk | 6 ++++--
- 1 file changed, 4 insertions(+), 2 deletions(-)
-
-diff --git a/core/arch/arm/kernel/link.mk b/core/arch/arm/kernel/link.mk
-index 49e9f4fa1..9e1cc172f 100644
--- a/core/arch/arm/kernel/link.mk
-+++ b/core/arch/arm/kernel/link.mk
-@@ -37,6 +37,7 @@ link-ldflags += --sort-section=alignment
- link-ldflags += --fatal-warnings
- link-ldflags += --gc-sections
- link-ldflags += $(link-ldflags-common)
-+link-ldflags += $(call ld-option,--no-warn-rwx-segments)
- 
- link-ldadd  = $(LDADD)
- link-ldadd += $(ldflags-external)
-@@ -61,6 +62,7 @@ link-script-cppflags := \
- 		$(cppflagscore))
- 
- ldargs-all_objs := -T $(link-script-dummy) --no-check-sections \
-+		   $(call ld-option,--no-warn-rwx-segments) \
- 		   $(link-ldflags-common) \
- 		   $(link-objs) $(link-ldadd) $(libgcccore)
- cleanfiles += $(link-out-dir)/all_objs.o
-@@ -75,7 +77,7 @@ $(link-out-dir)/unpaged_entries.txt: $(link-out-dir)/all_objs.o
- 		$(AWK) '/ ____keep_pager/ { printf "-u%s ", $$3 }' > $@
- 
- unpaged-ldargs := -T $(link-script-dummy) --no-check-sections --gc-sections \
-		 $(link-ldflags-common)
-+		 $(link-ldflags-common) $(call ld-option,--no-warn-rwx-segments)
- unpaged-ldadd := $(objs) $(link-ldadd) $(libgcccore)
- cleanfiles += $(link-out-dir)/unpaged.o
- $(link-out-dir)/unpaged.o: $(link-out-dir)/unpaged_entries.txt
-@@ -104,7 +106,7 @@ $(link-out-dir)/init_entries.txt: $(link-out-dir)/all_objs.o
- 		$(AWK) '/ ____keep_init/ { printf "-u%s ", $$3 }' > $@
- 
- init-ldargs := -T $(link-script-dummy) --no-check-sections --gc-sections \
-	       $(link-ldflags-common)
-+	       $(link-ldflags-common) $(call ld-option,--no-warn-rwx-segments)
- init-ldadd := $(link-objs-init) $(link-out-dir)/version.o  $(link-ldadd) \
- 	      $(libgcccore)
- cleanfiles += $(link-out-dir)/init.o
-- 
-2.43.2
-
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os/0005-core-imx-support-ccimx95-dvk.patch
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os/0005-core-imx-support-ccimx95-dvk.patch
@ -0,0 +1,51 @@
+From: Javier Viguera <javier.viguera@digi.com>
+Date: Wed, 10 Sep 2025 14:19:01 +0200
+Subject: [PATCH] core: imx: support ccimx95-dvk
+
+Upstream-Status: Inappropriate [DEY specific]
+
+Signed-off-by: Javier Viguera <javier.viguera@digi.com>
+---
+ core/arch/arm/plat-imx/conf.mk           | 9 +++++++++
+ core/arch/arm/plat-imx/registers/imx95.h | 1 +
+ 2 files changed, 10 insertions(+)
+
+diff --git a/core/arch/arm/plat-imx/conf.mk b/core/arch/arm/plat-imx/conf.mk
+index 916b6b6a1fbb..55f4c21d0321 100644
+--- a/core/arch/arm/plat-imx/conf.mk
+++ b/core/arch/arm/plat-imx/conf.mk
+@@ -95,6 +95,7 @@ mx93-flavorlist = \
+ 	mx93evk \
+ 
+ mx95-flavorlist = \
+	ccimx95dvk \
+ 	mx95evk \
+ 
+ mx91-flavorlist = \
+@@ -525,6 +526,14 @@ $(call force,CFG_SOC_REV_A0,y)
+ CFG_IN_TREE_EARLY_TAS += aes_huk/c2fad363-5d9f-4fc4-a417-555841e05745
+ endif
+ 
+ifneq (,$(filter $(PLATFORM_FLAVOR),ccimx95dvk))
+CFG_DDR_SIZE ?= 0x80000000
+CFG_UART_BASE ?= UART6_BASE
+CFG_NSEC_DDR_1_BASE ?= 0x100000000UL
+CFG_NSEC_DDR_1_SIZE ?= 0x180000000UL
+CFG_CORE_ARM64_PA_BITS ?= 40
+endif
+
+ ifneq (,$(filter $(PLATFORM_FLAVOR),mx95evk))
+ CFG_DDR_SIZE ?= 0x80000000
+ CFG_UART_BASE ?= UART1_BASE
+diff --git a/core/arch/arm/plat-imx/registers/imx95.h b/core/arch/arm/plat-imx/registers/imx95.h
+index b0382e682c17..05d8efad2cdc 100644
+--- a/core/arch/arm/plat-imx/registers/imx95.h
+++ b/core/arch/arm/plat-imx/registers/imx95.h
+@@ -9,6 +9,7 @@
+ #define GICR_BASE 0x48060000
+ 
+ #define UART1_BASE 0x44380000
+#define UART6_BASE 0x425A0000
+ 
+ #define MU_BASE 0x47530000
+ #define MU_SIZE 0x10000
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os_4.4.0.imx.bb
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os_4.4.0.imx.bb
@ -1,9 +0,0 @@
-# Copyright (C) 2025, Digi International Inc.
-
-#
-# Reuse meta-freescale's optee-os_4.2.0.imx.bb
-#
-require recipes-security/optee-imx/optee-os_4.2.0.imx.bb
-
-SRCBRANCH = "lf-6.6.52_2.2.0"
-SRCREV = "60beb308810f9561a67fdb435388a64c85eb6dcb"
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os_4.4.0.imx.bbappend
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os_4.4.0.imx.bbappend
@ -3,25 +3,21 @@ FILESEXTRAPATHS:prepend := "${THISDIR}/${BPN}:"

 SRC_URI += "file://environment.d-optee-sdk.sh"

-SRC_URI:append:ccimx8mm = " \
+SRC_URI:append:dey = " \
    file://0001-plat-imx-add-support-for-ConnectCore-8M-Mini.patch \
+    file://0002-core-imx-support-ccimx91-dvk.patch \
+    file://0003-core-imx-support-ccimx93-dvk.patch \
+    file://0004-core-ccimx93-enable-AES_HUK-trusted-application.patch \
+    file://0005-core-imx-support-ccimx95-dvk.patch \
 "

-SRC_URI:append:ccimx91 = " \
-    file://0001-core-imx-support-ccimx91-dvk.patch \
-"
-
-SRC_URI:append:ccimx93 = " \
-    file://0001-core-imx-support-ccimx93-dvk.patch \
-    file://0002-core-ccimx93-enable-AES_HUK-trusted-application.patch \
-"
-
-PLATFORM_FLAVOR:ccimx8mm = "ccimx8mmdvk"
-PLATFORM_FLAVOR:ccimx91 = "ccimx91dvk"
-PLATFORM_FLAVOR:ccimx93 = "ccimx93dvk"
+OPTEEMACHINE:ccimx8mm = "imx-ccimx8mmdvk"
+OPTEEMACHINE:ccimx91 = "imx-ccimx91dvk"
+OPTEEMACHINE:ccimx93 = "imx-ccimx93dvk"
+OPTEEMACHINE:ccimx95 = "imx-ccimx95dvk"

 do_compile:append:ccimx93 () {
-    oe_runmake PLATFORM=imx-${PLATFORM_FLAVOR}_a0 O=${B}-A0 all
+    oe_runmake -C ${S} PLATFORM=imx-${PLATFORM_FLAVOR}_a0 O=${B}-A0
 }
 do_compile:ccimx93[cleandirs] += "${B}-A0"

@ -29,10 +25,10 @@ do_deploy:append:ccimx93 () {
    cp ${B}-A0/core/tee-raw.bin ${DEPLOYDIR}/tee.${PLATFORM_FLAVOR}_a0.bin
 }

-do_install:append () {
-	mkdir -p ${D}/environment-setup.d
-	sed -e "s,#OPTEE_ARCH#,${OPTEE_ARCH},g" ${WORKDIR}/environment.d-optee-sdk.sh > ${D}/environment-setup.d/optee-sdk.sh
+do_install:append() {
+    mkdir -p ${D}/environment-setup.d
+    sed -e "s,#OPTEE_ARCH#,${OPTEE_ARCH},g" ${WORKDIR}/environment.d-optee-sdk.sh >${D}/environment-setup.d/optee-sdk.sh
 }

-FILES:${PN}-staticdev += " /environment-setup.d/"
+FILES:${PN}-staticdev += "/environment-setup.d/"
 INSANE_SKIP:${PN}-staticdev += "buildpaths"
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-test_4.4.0.imx.bb
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-test_4.4.0.imx.bb
@ -1,15 +0,0 @@
-# Copyright (C) 2025, Digi International Inc.
-
-#
-# Reuse meta-freescale's optee-test_4.2.0.imx.bb
-#
-require recipes-security/optee-imx/optee-test_4.2.0.imx.bb
-
-# The BSD and GPL license files are now included in the source
-# https://github.com/OP-TEE/optee_test/commit/a748f5fcd9ec8a574dc86a5aa56d05bc6ac174e7
-LIC_FILES_CHKSUM = "file://LICENSE.md;md5=a8fa504109e4cd7ea575bc49ea4be560 \
-                    file://LICENSE-BSD;md5=dca16d6efa93b55d0fd662ae5cd6feeb \
-                    file://LICENSE-GPL;md5=10e86b5d2a6cb0e2b9dcfdd26a9ac58d"
-
-SRCBRANCH = "lf-6.6.52_2.2.0"
-SRCREV = "dafc98ed8364d7281a9a7f0788dd0a2067844a59"
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-support/opencv/opencv/0101-MGS-6470-ccc-Modify-host-ptr-alignment-size-in-UMAT.patch
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-support/opencv/opencv/0101-MGS-6470-ccc-Modify-host-ptr-alignment-size-in-UMAT.patch
@ -0,0 +1,29 @@
+From 0a1c77e4c810999632d648f63775b7ea265bc25c Mon Sep 17 00:00:00 2001
+From: Eric Guo <eric.guo@nxp.com>
+Date: Tue, 9 Nov 2021 14:38:00 +0800
+Subject: [PATCH 1/4] MGS-6470 [#ccc] Modify host ptr alignment size in UMAT
+
+change CV_OPENCL_ALIGNMENT_MEM_USE_HOST_PTR from 4 to 64
+
+Upstream-Status: Inappropriate [i.MX specific]
+Signed-off-by: Eric Guo <eric.guo@nxp.com>
+---
+ modules/core/src/ocl.cpp | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/modules/core/src/ocl.cpp b/modules/core/src/ocl.cpp
+index 8479667fd7..6eb7b5e425 100644
+--- a/modules/core/src/ocl.cpp
+++ b/modules/core/src/ocl.cpp
+@@ -245,7 +245,7 @@ static String getBuildExtraOptions()
+ }
+ 
+ static const bool CV_OPENCL_ENABLE_MEM_USE_HOST_PTR = utils::getConfigurationParameterBool("OPENCV_OPENCL_ENABLE_MEM_USE_HOST_PTR", true);
+-static const size_t CV_OPENCL_ALIGNMENT_MEM_USE_HOST_PTR = utils::getConfigurationParameterSizeT("OPENCV_OPENCL_ALIGNMENT_MEM_USE_HOST_PTR", 4);
+static const size_t CV_OPENCL_ALIGNMENT_MEM_USE_HOST_PTR = utils::getConfigurationParameterSizeT("OPENCV_OPENCL_ALIGNMENT_MEM_USE_HOST_PTR", 64);
+ 
+ 
+ struct UMat2D
+-- 
+2.34.1
+
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-support/opencv/opencv/0102-MGS-6470-ccc-Add-configuration-parameter-to-force-en.patch
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-support/opencv/opencv/0102-MGS-6470-ccc-Add-configuration-parameter-to-force-en.patch
@ -0,0 +1,32 @@
+From 965365fff0815b8afc9833102d8e4e6c4ee1dda3 Mon Sep 17 00:00:00 2001
+From: Eric Guo <eric.guo@nxp.com>
+Date: Wed, 17 Nov 2021 15:04:23 +0800
+Subject: [PATCH 2/4] MGS-6470 [#ccc] Add configuration parameter to force
+ enable hostptr in OpenCL
+
+USAGE: `set OPENCV_OPENCL_ALIGNMENT_MEM_ALLOC_HOST_PTR=true`
+
+Upstream-Status: Inappropriate [i.MX specific]
+Signed-off-by: Eric Guo <eric.guo@nxp.com>
+---
+ modules/core/src/ocl.cpp | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+diff --git a/modules/core/src/ocl.cpp b/modules/core/src/ocl.cpp
+index 6eb7b5e425..5c50b06865 100644
+--- a/modules/core/src/ocl.cpp
+++ b/modules/core/src/ocl.cpp
+@@ -5416,7 +5416,9 @@ public:
+     {
+         const Device& dev = ctx.device(0);
+         createFlags = 0;
+-        if ((usageFlags & USAGE_ALLOCATE_HOST_MEMORY) != 0)
+        bool allocHostPtr = utils::getConfigurationParameterBool("OPENCV_OPENCL_ALIGNMENT_MEM_ALLOC_HOST_PTR", false);
+
+        if ((usageFlags & USAGE_ALLOCATE_HOST_MEMORY) != 0 || allocHostPtr)
+             createFlags |= CL_MEM_ALLOC_HOST_PTR;
+ 
+         if (!isOpenCLCopyingForced() &&
+-- 
+2.34.1
+
--- a/Show More
+++ b/Show More