From 0b2e6edea828018358301864411ad648afb4936c Mon Sep 17 00:00:00 2001 From: Gonzalo Ruiz Date: Fri, 23 Jan 2026 09:31:03 +0100 Subject: [PATCH] ccimx95: add ATF, OEI, OPTEE, SM patches for SOM v2 https://onedigi.atlassian.net/browse/DEL-9915 Signed-off-by: Gonzalo Ruiz --- ...ccimx95-configure-console-on-LPUART1.patch | 37 +++ .../imx-oei/imx-oei_1.0.0.bbappend | 1 + ...e-SM-console-from-LPUART7-to-LPUART2.patch | 226 ++++++++++++++++++ ...PMIC-interrupt-moved-to-PDM_BIT_STRE.patch | 69 ++++++ .../imx-system-manager_2025q3.bbappend | 4 +- ...t-ccimx95-set-DVK-console-to-LPUART6.patch | 29 +++ .../recipes-bsp/imx-atf/imx-atf_%.bbappend | 3 +- ...ccimx95-configure-console-on-LPUART1.patch | 29 +++ .../optee-imx/optee-os_4.4.0.imx.bbappend | 3 +- 9 files changed, 398 insertions(+), 3 deletions(-) create mode 100644 meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-oei/imx-oei/0005-ccimx95-configure-console-on-LPUART1.patch create mode 100644 meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0013-ccimx95dvk-change-SM-console-from-LPUART7-to-LPUART2.patch create mode 100644 meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0014-ccimx95dvk-PF09-PMIC-interrupt-moved-to-PDM_BIT_STRE.patch create mode 100644 meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf/0011-Revert-ccimx95-set-DVK-console-to-LPUART6.patch create mode 100644 meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os/0006-ccimx95-configure-console-on-LPUART1.patch diff --git a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-oei/imx-oei/0005-ccimx95-configure-console-on-LPUART1.patch b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-oei/imx-oei/0005-ccimx95-configure-console-on-LPUART1.patch new file mode 100644 index 000000000..b0f5ff468 --- /dev/null +++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-oei/imx-oei/0005-ccimx95-configure-console-on-LPUART1.patch @@ -0,0 +1,37 @@ +From: Hector Palacios +Date: Wed, 14 Jan 2026 17:11:28 +0100 +Subject: [PATCH] ccimx95: configure console on LPUART1 + +On version 2 of the SOM, the console has been changed +to LPUART1. + +Upstream-Status: Inappropriate [DEY specific] + +Signed-off-by: Hector Palacios + +https://onedigi.atlassian.net/browse/DEL-9915 +--- + boards/ccimx95/config_board.h | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/boards/ccimx95/config_board.h b/boards/ccimx95/config_board.h +index ec97626a2a28..e666575ae6e8 100644 +--- a/boards/ccimx95/config_board.h ++++ b/boards/ccimx95/config_board.h +@@ -2,6 +2,7 @@ + ** ################################################################### + ** + ** Copyright 2023-2024 NXP ++** Copyright 2025-2026 Digi International Inc. + ** + ** Redistribution and use in source and binary forms, with or without modification, + ** are permitted provided that the following conditions are met: +@@ -52,7 +53,7 @@ + /* Defines */ + + /*! Config for UART instance */ +-#define BOARD_DEBUG_UART_INSTANCE 6U ++#define BOARD_DEBUG_UART_INSTANCE 1U + /*! Config for UART baudrate */ + #define BOARD_DEBUG_UART_BAUDRATE 115200U + diff --git a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-oei/imx-oei_1.0.0.bbappend b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-oei/imx-oei_1.0.0.bbappend index 88cec2f61..4a32d7fcc 100644 --- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-oei/imx-oei_1.0.0.bbappend +++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-oei/imx-oei_1.0.0.bbappend @@ -7,6 +7,7 @@ SRC_URI:append:dey = " \ file://0002-ddr-add-DDR-configuration-file-for-ccimx95.patch \ file://0003-ccimx95-configure-console-on-LPUART6.patch \ file://0004-ccimx95-add-DDR-configuration-file-for-ccimx95-B0-si.patch \ + file://0005-ccimx95-configure-console-on-LPUART1.patch \ " # NXP's 'lf-6.6.52_2.2.2' release SRCREV = "49bfaa93e9d1fe213866bcb9507927a59a9ede5a" diff --git a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0013-ccimx95dvk-change-SM-console-from-LPUART7-to-LPUART2.patch b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0013-ccimx95dvk-change-SM-console-from-LPUART7-to-LPUART2.patch new file mode 100644 index 000000000..5ef043f3a --- /dev/null +++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0013-ccimx95dvk-change-SM-console-from-LPUART7-to-LPUART2.patch @@ -0,0 +1,226 @@ +From: Hector Palacios +Date: Wed, 14 Jan 2026 16:03:29 +0100 +Subject: [PATCH 13/14] ccimx95dvk: change SM console from LPUART7 to LPUART2 + +On version 2 of the SOM, the SM console has changed to LPUART2. + +Upstream-Status: Inappropriate [DEY specific] + +Signed-off-by: Hector Palacios + +https://onedigi.atlassian.net/browse/DEL-9915 +--- + configs/ccimx95dvk.cfg | 18 +++++++++--------- + configs/ccimx95dvk/config_board.h | 2 +- + configs/ccimx95dvk/config_scmi.h | 12 +++++++----- + configs/ccimx95dvk/config_trdc.h | 7 +++---- + 4 files changed, 20 insertions(+), 19 deletions(-) + +diff --git a/configs/ccimx95dvk.cfg b/configs/ccimx95dvk.cfg +index b73401792592..53444e785270 100755 +--- a/configs/ccimx95dvk.cfg ++++ b/configs/ccimx95dvk.cfg +@@ -1,7 +1,7 @@ + ## ################################################################### + ## + ## Copyright 2023-2025 NXP +-## Copyright 2025 Digi International Inc. ++## Copyright 2025,2026 Digi International Inc. + ## + ## Redistribution and use in source and binary forms, with or without modification, + ## are permitted provided that the following conditions are met: +@@ -42,7 +42,7 @@ include ../devices/MIMX95/configtool/device.cfg + # Board # + #==========================================================================# + +-BOARD DEBUG_UART_INSTANCE=7 ++BOARD DEBUG_UART_INSTANCE=2 + BOARD DEBUG_UART_BAUDRATE=115200 + + BOARD I2C_INSTANCE=1 +@@ -233,7 +233,7 @@ IOMUXC OWNER + IOMUX_GPR OWNER + JTAG OWNER + LPI2C1 OWNER +-LPUART7 OWNER ++LPUART2 OWNER + M33_CACHE_CTRL OWNER + M33_PCF OWNER + M33_PSF OWNER +@@ -306,8 +306,8 @@ L_STCU_NPUMIX OWNER + PIN_FCCU_ERR0 OWNER + PIN_I2C1_SCL OWNER + PIN_I2C1_SDA OWNER +-PIN_GPIO_IO08 OWNER # LPUART7_TX +-PIN_GPIO_IO09 OWNER # LPUART7_RX ++PIN_UART2_RXD OWNER ++PIN_UART2_TXD OWNER + PIN_WDOG_ANY OWNER + + # Memory +@@ -488,11 +488,11 @@ PERLPI_GPIO3 ALL + PERLPI_GPIO4 ALL + PERLPI_GPIO5 ALL + PERLPI_LPUART1 ALL +-PERLPI_LPUART2 ALL + PERLPI_LPUART3 ALL + PERLPI_LPUART4 ALL + PERLPI_LPUART5 ALL + PERLPI_LPUART6 ALL ++PERLPI_LPUART7 ALL + PERLPI_LPUART8 ALL + PERLPI_GPIO1 ALL + PERLPI_WDOG3 ALL +@@ -772,11 +772,11 @@ LPTPM4 OWNER + LPTPM5 OWNER + LPTPM6 OWNER + LPUART1 OWNER +-LPUART2 OWNER + LPUART3 OWNER + LPUART4 OWNER + LPUART5 OWNER + LPUART6 OWNER ++LPUART7 OWNER + LPUART8 OWNER, test + LVDS OWNER + MIPI_CSI0 OWNER +@@ -922,6 +922,8 @@ PIN_GPIO_IO04 OWNER + PIN_GPIO_IO05 OWNER + PIN_GPIO_IO06 OWNER + PIN_GPIO_IO07 OWNER ++PIN_GPIO_IO08 OWNER ++PIN_GPIO_IO09 OWNER + PIN_GPIO_IO10 OWNER + PIN_GPIO_IO11 OWNER + PIN_GPIO_IO12 OWNER +@@ -987,8 +989,6 @@ PIN_SD3_DATA2 OWNER + PIN_SD3_DATA3 OWNER + PIN_UART1_RXD OWNER, test + PIN_UART1_TXD OWNER +-PIN_UART2_RXD OWNER +-PIN_UART2_TXD OWNER + PIN_XSPI1_DATA0 OWNER + PIN_XSPI1_DATA1 OWNER + PIN_XSPI1_DATA2 OWNER +diff --git a/configs/ccimx95dvk/config_board.h b/configs/ccimx95dvk/config_board.h +index 23ecae56cf78..b511a0320a68 100644 +--- a/configs/ccimx95dvk/config_board.h ++++ b/configs/ccimx95dvk/config_board.h +@@ -54,7 +54,7 @@ + /* Defines */ + + /*! Config for UART instance */ +-#define BOARD_DEBUG_UART_INSTANCE 7U ++#define BOARD_DEBUG_UART_INSTANCE 2U + /*! Config for UART baudrate */ + #define BOARD_DEBUG_UART_BAUDRATE 115200U + +diff --git a/configs/ccimx95dvk/config_scmi.h b/configs/ccimx95dvk/config_scmi.h +index 506cb750af65..3b6899a7b9c8 100644 +--- a/configs/ccimx95dvk/config_scmi.h ++++ b/configs/ccimx95dvk/config_scmi.h +@@ -177,11 +177,11 @@ + .perlpiPerms[DEV_SM_PERLPI_GPIO4] = SM_SCMI_PERM_ALL, \ + .perlpiPerms[DEV_SM_PERLPI_GPIO5] = SM_SCMI_PERM_ALL, \ + .perlpiPerms[DEV_SM_PERLPI_LPUART1] = SM_SCMI_PERM_ALL, \ +- .perlpiPerms[DEV_SM_PERLPI_LPUART2] = SM_SCMI_PERM_ALL, \ + .perlpiPerms[DEV_SM_PERLPI_LPUART3] = SM_SCMI_PERM_ALL, \ + .perlpiPerms[DEV_SM_PERLPI_LPUART4] = SM_SCMI_PERM_ALL, \ + .perlpiPerms[DEV_SM_PERLPI_LPUART5] = SM_SCMI_PERM_ALL, \ + .perlpiPerms[DEV_SM_PERLPI_LPUART6] = SM_SCMI_PERM_ALL, \ ++ .perlpiPerms[DEV_SM_PERLPI_LPUART7] = SM_SCMI_PERM_ALL, \ + .perlpiPerms[DEV_SM_PERLPI_LPUART8] = SM_SCMI_PERM_ALL, \ + .perlpiPerms[DEV_SM_PERLPI_WDOG3] = SM_SCMI_PERM_ALL, \ + .perlpiPerms[DEV_SM_PERLPI_WDOG4] = SM_SCMI_PERM_ALL, \ +@@ -270,11 +270,11 @@ + .clkPerms[DEV_SM_CLK_LPSPI7] = SM_SCMI_PERM_ALL, \ + .clkPerms[DEV_SM_CLK_LPSPI8] = SM_SCMI_PERM_ALL, \ + .clkPerms[DEV_SM_CLK_LPUART1] = SM_SCMI_PERM_ALL, \ +- .clkPerms[DEV_SM_CLK_LPUART2] = SM_SCMI_PERM_ALL, \ + .clkPerms[DEV_SM_CLK_LPUART3] = SM_SCMI_PERM_ALL, \ + .clkPerms[DEV_SM_CLK_LPUART4] = SM_SCMI_PERM_ALL, \ + .clkPerms[DEV_SM_CLK_LPUART5] = SM_SCMI_PERM_ALL, \ + .clkPerms[DEV_SM_CLK_LPUART6] = SM_SCMI_PERM_ALL, \ ++ .clkPerms[DEV_SM_CLK_LPUART7] = SM_SCMI_PERM_ALL, \ + .clkPerms[DEV_SM_CLK_LPUART8] = SM_SCMI_PERM_ALL, \ + .clkPerms[DEV_SM_CLK_MIPIPHYCFG] = SM_SCMI_PERM_ALL, \ + .clkPerms[DEV_SM_CLK_MIPIPHYPLLBYPASS] = SM_SCMI_PERM_ALL, \ +@@ -388,6 +388,8 @@ + .daisyPerms[DEV_SM_DAISY_LPUART6_CTS] = SM_SCMI_PERM_ALL, \ + .daisyPerms[DEV_SM_DAISY_LPUART6_RXD] = SM_SCMI_PERM_ALL, \ + .daisyPerms[DEV_SM_DAISY_LPUART6_TXD] = SM_SCMI_PERM_ALL, \ ++ .daisyPerms[DEV_SM_DAISY_LPUART7_RXD] = SM_SCMI_PERM_ALL, \ ++ .daisyPerms[DEV_SM_DAISY_LPUART7_TXD] = SM_SCMI_PERM_ALL, \ + .daisyPerms[DEV_SM_DAISY_NETC_EMDC] = SM_SCMI_PERM_ALL, \ + .daisyPerms[DEV_SM_DAISY_NETC_EMDIO] = SM_SCMI_PERM_ALL, \ + .daisyPerms[DEV_SM_DAISY_NETC_ETH0_RMII_RX_ER] = SM_SCMI_PERM_ALL, \ +@@ -463,11 +465,11 @@ + .perlpiPerms[DEV_SM_PERLPI_GPIO4] = SM_SCMI_PERM_ALL, \ + .perlpiPerms[DEV_SM_PERLPI_GPIO5] = SM_SCMI_PERM_ALL, \ + .perlpiPerms[DEV_SM_PERLPI_LPUART1] = SM_SCMI_PERM_ALL, \ +- .perlpiPerms[DEV_SM_PERLPI_LPUART2] = SM_SCMI_PERM_ALL, \ + .perlpiPerms[DEV_SM_PERLPI_LPUART3] = SM_SCMI_PERM_ALL, \ + .perlpiPerms[DEV_SM_PERLPI_LPUART4] = SM_SCMI_PERM_ALL, \ + .perlpiPerms[DEV_SM_PERLPI_LPUART5] = SM_SCMI_PERM_ALL, \ + .perlpiPerms[DEV_SM_PERLPI_LPUART6] = SM_SCMI_PERM_ALL, \ ++ .perlpiPerms[DEV_SM_PERLPI_LPUART7] = SM_SCMI_PERM_ALL, \ + .perlpiPerms[DEV_SM_PERLPI_LPUART8] = SM_SCMI_PERM_ALL, \ + .perlpiPerms[DEV_SM_PERLPI_WDOG3] = SM_SCMI_PERM_ALL, \ + .perlpiPerms[DEV_SM_PERLPI_WDOG4] = SM_SCMI_PERM_ALL, \ +@@ -515,6 +517,8 @@ + .pinPerms[DEV_SM_PIN_GPIO_IO05] = SM_SCMI_PERM_ALL, \ + .pinPerms[DEV_SM_PIN_GPIO_IO06] = SM_SCMI_PERM_ALL, \ + .pinPerms[DEV_SM_PIN_GPIO_IO07] = SM_SCMI_PERM_ALL, \ ++ .pinPerms[DEV_SM_PIN_GPIO_IO08] = SM_SCMI_PERM_ALL, \ ++ .pinPerms[DEV_SM_PIN_GPIO_IO09] = SM_SCMI_PERM_ALL, \ + .pinPerms[DEV_SM_PIN_GPIO_IO10] = SM_SCMI_PERM_ALL, \ + .pinPerms[DEV_SM_PIN_GPIO_IO11] = SM_SCMI_PERM_ALL, \ + .pinPerms[DEV_SM_PIN_GPIO_IO12] = SM_SCMI_PERM_ALL, \ +@@ -580,8 +584,6 @@ + .pinPerms[DEV_SM_PIN_SD3_DATA3] = SM_SCMI_PERM_ALL, \ + .pinPerms[DEV_SM_PIN_UART1_RXD] = SM_SCMI_PERM_ALL, \ + .pinPerms[DEV_SM_PIN_UART1_TXD] = SM_SCMI_PERM_ALL, \ +- .pinPerms[DEV_SM_PIN_UART2_RXD] = SM_SCMI_PERM_ALL, \ +- .pinPerms[DEV_SM_PIN_UART2_TXD] = SM_SCMI_PERM_ALL, \ + .pinPerms[DEV_SM_PIN_XSPI1_DATA0] = SM_SCMI_PERM_ALL, \ + .pinPerms[DEV_SM_PIN_XSPI1_DATA1] = SM_SCMI_PERM_ALL, \ + .pinPerms[DEV_SM_PIN_XSPI1_DATA2] = SM_SCMI_PERM_ALL, \ +diff --git a/configs/ccimx95dvk/config_trdc.h b/configs/ccimx95dvk/config_trdc.h +index 12ebbc61ca64..5758f62bdef5 100644 +--- a/configs/ccimx95dvk/config_trdc.h ++++ b/configs/ccimx95dvk/config_trdc.h +@@ -108,7 +108,7 @@ + SM_CFG_W1(0x00010450U), 0x30003330U, \ + SM_CFG_W1(0x00010454U), 0x03333033U, \ + SM_CFG_W1(0x00010458U), 0x00030000U, \ +- SM_CFG_W1(0x0001045cU), 0x33330000U, \ ++ SM_CFG_W1(0x0001045cU), 0x33330030U, \ + SM_CFG_W1(0x00010460U), 0x33333333U, \ + SM_CFG_W1(0x00010464U), 0x30000003U, \ + SM_CFG_W1(0x00010468U), 0x33330030U, \ +@@ -123,7 +123,7 @@ + SM_CFG_W1(0x00010650U), 0x09000309U, \ + SM_CFG_W1(0x00010654U), 0x0000C900U, \ + SM_CFG_W1(0x00010658U), 0x99909900U, \ +- SM_CFG_W1(0x0001065cU), 0x00009999U, \ ++ SM_CFG_W1(0x0001065cU), 0x00009909U, \ + SM_CFG_W1(0x00010668U), 0x00009900U, \ + SM_CFG_W1(0x0001066cU), 0x90909000U, \ + SM_CFG_W1(0x00010670U), 0x00009000U, \ +@@ -1151,7 +1151,6 @@ + SM_CFG_Z1(0x00010260U), \ + SM_CFG_W1(0x00010270U), 0x00000090U, \ + SM_CFG_W1(0x00010460U), 0x33000300U, \ +- SM_CFG_W1(0x00010474U), 0x00000030U, \ + SM_CFG_W1(0x00010478U), 0x33300000U, \ + SM_CFG_W1(0x0001047cU), 0x00003333U, \ + SM_CFG_W1(0x000105d0U), 0x33333333U, \ +@@ -1170,7 +1169,7 @@ + SM_CFG_W1(0x00010668U), 0x99999999U, \ + SM_CFG_W1(0x0001066cU), 0x09999999U, \ + SM_CFG_W1(0x00010670U), 0x99900009U, \ +- SM_CFG_W1(0x00010674U), 0x99999909U, \ ++ SM_CFG_W1(0x00010674U), 0x99999999U, \ + SM_CFG_W1(0x00010678U), 0x00009999U, \ + SM_CFG_W1(0x0001067cU), 0x00990000U, \ + SM_CFG_W1(0x00010780U), 0x00000009U, \ diff --git a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0014-ccimx95dvk-PF09-PMIC-interrupt-moved-to-PDM_BIT_STRE.patch b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0014-ccimx95dvk-PF09-PMIC-interrupt-moved-to-PDM_BIT_STRE.patch new file mode 100644 index 000000000..ecb3489e4 --- /dev/null +++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0014-ccimx95dvk-PF09-PMIC-interrupt-moved-to-PDM_BIT_STRE.patch @@ -0,0 +1,69 @@ +From: Hector Palacios +Date: Wed, 14 Jan 2026 14:05:57 +0100 +Subject: [PATCH 14/14] ccimx95dvk: PF09 PMIC interrupt moved to + PDM_BIT_STREAM1 + +Upstream-Status: Inappropriate [DEY specific] + +Signed-off-by: Hector Palacios + +https://onedigi.atlassian.net/browse/DEL-9915 +--- + boards/ccimx95dvk/pin_mux.c | 5 +++++ + configs/ccimx95dvk.cfg | 2 +- + configs/ccimx95dvk/config_scmi.h | 1 - + 3 files changed, 6 insertions(+), 2 deletions(-) + +diff --git a/boards/ccimx95dvk/pin_mux.c b/boards/ccimx95dvk/pin_mux.c +index 6f5bb4a51c4c..41ad97dd4e75 100755 +--- a/boards/ccimx95dvk/pin_mux.c ++++ b/boards/ccimx95dvk/pin_mux.c +@@ -1,5 +1,6 @@ + /* + * Copyright 2023, 2025 NXP ++ * Copyright 2025, 2026 Digi International Inc. + * + * SPDX-License-Identifier: BSD-3-Clause + */ +@@ -57,5 +58,9 @@ void BOARD_InitPins(void) + IOMUXC_SetPinConfig(IOMUXC_PAD_I2C2_SDA__LPI2C2_SDA, IOMUXC_PAD_DSE(0xFU) + | IOMUXC_PAD_FSEL1(0x3U) | IOMUXC_PAD_PU(0x1U) | IOMUXC_PAD_OD(0x1U)); + #endif ++ ++ /* Configure GPIO1-10 (INT from PF09) */ ++ IOMUXC_SetPinMux(IOMUXC_PAD_PDM_BIT_STREAM1__GPIO1_IO_BIT10, 0U); ++ IOMUXC_SetPinConfig(IOMUXC_PAD_PDM_BIT_STREAM1__GPIO1_IO_BIT10, 0U); + } + +diff --git a/configs/ccimx95dvk.cfg b/configs/ccimx95dvk.cfg +index 53444e785270..ba7cc9e0499a 100755 +--- a/configs/ccimx95dvk.cfg ++++ b/configs/ccimx95dvk.cfg +@@ -306,6 +306,7 @@ L_STCU_NPUMIX OWNER + PIN_FCCU_ERR0 OWNER + PIN_I2C1_SCL OWNER + PIN_I2C1_SDA OWNER ++PIN_PDM_BIT_STREAM1 OWNER # PF09_INT_B + PIN_UART2_RXD OWNER + PIN_UART2_TXD OWNER + PIN_WDOG_ANY OWNER +@@ -955,7 +956,6 @@ PIN_GPIO_IO37 OWNER + PIN_I2C2_SCL OWNER + PIN_I2C2_SDA OWNER + PIN_PDM_BIT_STREAM0 OWNER +-PIN_PDM_BIT_STREAM1 OWNER + PIN_PDM_CLK OWNER + PIN_SAI1_RXD0 OWNER + PIN_SAI1_TXC OWNER +diff --git a/configs/ccimx95dvk/config_scmi.h b/configs/ccimx95dvk/config_scmi.h +index 3b6899a7b9c8..20168f81df9d 100644 +--- a/configs/ccimx95dvk/config_scmi.h ++++ b/configs/ccimx95dvk/config_scmi.h +@@ -550,7 +550,6 @@ + .pinPerms[DEV_SM_PIN_I2C2_SCL] = SM_SCMI_PERM_ALL, \ + .pinPerms[DEV_SM_PIN_I2C2_SDA] = SM_SCMI_PERM_ALL, \ + .pinPerms[DEV_SM_PIN_PDM_BIT_STREAM0] = SM_SCMI_PERM_ALL, \ +- .pinPerms[DEV_SM_PIN_PDM_BIT_STREAM1] = SM_SCMI_PERM_ALL, \ + .pinPerms[DEV_SM_PIN_PDM_CLK] = SM_SCMI_PERM_ALL, \ + .pinPerms[DEV_SM_PIN_SAI1_RXD0] = SM_SCMI_PERM_ALL, \ + .pinPerms[DEV_SM_PIN_SAI1_TXC] = SM_SCMI_PERM_ALL, \ diff --git a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager_2025q3.bbappend b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager_2025q3.bbappend index 7cca3cd6f..1690f9080 100644 --- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager_2025q3.bbappend +++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager_2025q3.bbappend @@ -1,4 +1,4 @@ -# Copyright (C) 2025, Digi International Inc. +# Copyright (C) 2025, 2026, Digi International Inc. FILESEXTRAPATHS:prepend := "${THISDIR}/${BPN}:" @@ -15,6 +15,8 @@ SRC_URI:append:dey = " \ file://0010-ccimx95dvk-enable-full-access-to-certain-regulators-.patch \ file://0011-components-pf09-reduce-LDOs-step-to-50mV.patch \ file://0012-ccimx95dvk-remove-access-to-VDD_3V3-and-VDD_1V8-from.patch \ + file://0013-ccimx95dvk-change-SM-console-from-LPUART7-to-LPUART2.patch \ + file://0014-ccimx95dvk-PF09-PMIC-interrupt-moved-to-PDM_BIT_STRE.patch \ " # Disable debug monitor by default diff --git a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf/0011-Revert-ccimx95-set-DVK-console-to-LPUART6.patch b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf/0011-Revert-ccimx95-set-DVK-console-to-LPUART6.patch new file mode 100644 index 000000000..b51b8a1c1 --- /dev/null +++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf/0011-Revert-ccimx95-set-DVK-console-to-LPUART6.patch @@ -0,0 +1,29 @@ +From: Hector Palacios +Date: Wed, 14 Jan 2026 17:47:38 +0100 +Subject: [PATCH] Revert "ccimx95: set DVK console to LPUART6" + +On v2 of the SOM, the console has been changed to LPUART1. +This reverts commit 3c0e275d1b1286505dd57591dcf0cd34bd2d1849. + +Upstream-Status: Inappropriate [DEY specific] + +Signed-off-by: Hector Palacios + +https://onedigi.atlassian.net/browse/DEL-9915 +--- + plat/imx/imx95/include/platform_def.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/plat/imx/imx95/include/platform_def.h b/plat/imx/imx95/include/platform_def.h +index 3f0a43e49694..d2eff001f548 100644 +--- a/plat/imx/imx95/include/platform_def.h ++++ b/plat/imx/imx95/include/platform_def.h +@@ -55,7 +55,7 @@ + #ifdef IMX_EMU + #define IMX_LPUART_BASE 0x42570000 + #else +-#define IMX_LPUART_BASE 0x425A0000 /* LPUART6 */ ++#define IMX_LPUART_BASE 0x44380000 + #endif + + #define IMX_BOOT_UART_CLK_IN_HZ 24000000 /* Select 24MHz oscillator */ diff --git a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf_%.bbappend b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf_%.bbappend index 5350a21a3..e892b0c47 100644 --- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf_%.bbappend +++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf_%.bbappend @@ -1,4 +1,4 @@ -# Copyright (C) 2022-2025, Digi International Inc. +# Copyright (C) 2022-2026, Digi International Inc. FILESEXTRAPATHS:prepend := "${THISDIR}/${BPN}:" @@ -13,6 +13,7 @@ SRC_URI:append:dey = " \ file://0008-ccimx91-use-UART6-for-the-default-console.patch \ file://0009-ccimx95-set-DVK-console-to-LPUART6.patch \ file://0010-ccimx95-enable-non-secure-non-privilege-access-to-GP.patch \ + file://0011-Revert-ccimx95-set-DVK-console-to-LPUART6.patch \ " SRCREV = "8ec7e38031f8c022a9760a8da77bdc6e1938db8c" diff --git a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os/0006-ccimx95-configure-console-on-LPUART1.patch b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os/0006-ccimx95-configure-console-on-LPUART1.patch new file mode 100644 index 000000000..bae807180 --- /dev/null +++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os/0006-ccimx95-configure-console-on-LPUART1.patch @@ -0,0 +1,29 @@ +From: Hector Palacios +Date: Wed, 14 Jan 2026 17:15:53 +0100 +Subject: [PATCH] ccimx95: configure console on LPUART1 + +On version 2 of the SOM, the console has been changed +to LPUART1. + +Upstream-Status: Inappropriate [DEY specific] + +Signed-off-by: Hector Palacios + +https://onedigi.atlassian.net/browse/DEL-9915 +--- + core/arch/arm/plat-imx/conf.mk | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/core/arch/arm/plat-imx/conf.mk b/core/arch/arm/plat-imx/conf.mk +index 55f4c21d0321..7c674e6f99a2 100644 +--- a/core/arch/arm/plat-imx/conf.mk ++++ b/core/arch/arm/plat-imx/conf.mk +@@ -528,7 +528,7 @@ endif + + ifneq (,$(filter $(PLATFORM_FLAVOR),ccimx95dvk)) + CFG_DDR_SIZE ?= 0x80000000 +-CFG_UART_BASE ?= UART6_BASE ++CFG_UART_BASE ?= UART1_BASE + CFG_NSEC_DDR_1_BASE ?= 0x100000000UL + CFG_NSEC_DDR_1_SIZE ?= 0x180000000UL + CFG_CORE_ARM64_PA_BITS ?= 40 diff --git a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os_4.4.0.imx.bbappend b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os_4.4.0.imx.bbappend index 49463446c..2b4fa8922 100644 --- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os_4.4.0.imx.bbappend +++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os_4.4.0.imx.bbappend @@ -1,4 +1,4 @@ -# Copyright (C) 2024, 2025, Digi International Inc. +# Copyright (C) 2024-2026, Digi International Inc. FILESEXTRAPATHS:prepend := "${THISDIR}/${BPN}:" SRC_URI += "file://environment.d-optee-sdk.sh" @@ -9,6 +9,7 @@ SRC_URI:append:dey = " \ file://0003-core-imx-support-ccimx93-dvk.patch \ file://0004-core-ccimx93-enable-AES_HUK-trusted-application.patch \ file://0005-core-imx-support-ccimx95-dvk.patch \ + file://0006-ccimx95-configure-console-on-LPUART1.patch \ " OPTEEMACHINE:ccimx8mm = "imx-ccimx8mmdvk"