imx-boot: update boot artifacts for NXP's lf-6.6.52-2.2.2 release

Also, refresh patches on top of new release. https://onedigi.atlassian.net/browse/DEL-9905 Signed-off-by: Javier Viguera <javier.viguera@digi.com>
2026-01-20 17:53:01 +01:00 · 2026-01-20 17:53:01 +01:00 · 2dfe30fb54
parent 6b08824f14
commit 2dfe30fb54
25 changed files with 27791 additions and 25515 deletions
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-oei/imx-oei/0001-boards-ccimx95-add-platform-as-a-clone-of-mx95lp5.patch
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-oei/imx-oei/0001-boards-ccimx95-add-platform-as-a-clone-of-mx95lp5.patch
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-oei/imx-oei/0002-ddr-add-DDR-configuration-file-for-ccimx95.patch
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-oei/imx-oei/0002-ddr-add-DDR-configuration-file-for-ccimx95.patch
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-oei/imx-oei/0003-ccimx95-configure-console-on-LPUART6.patch
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-oei/imx-oei/0003-ccimx95-configure-console-on-LPUART6.patch
@ -42,7 +42,7 @@ index a8c15513b578..3cb33909f740 100644
 #endif
 }
 diff --git a/devices/MIMX95/oei/soc_clock.c b/devices/MIMX95/oei/soc_clock.c
-index 3421e3efe143..9205b9a12782 100644
+index 17493b08e1b8..c1f5cecfa9b6 100644
 --- a/devices/MIMX95/oei/soc_clock.c
 +++ b/devices/MIMX95/oei/soc_clock.c
@@ -25,6 +25,8 @@ static struct clk_root_cfg clk_root_cfgs[] = {
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-oei/imx-oei_1.0.0.bbappend
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-oei/imx-oei_1.0.0.bbappend
@ -1,4 +1,4 @@
-# Copyright (C) 2025, Digi International Inc.
+# Copyright (C) 2025,2026 Digi International Inc.
 FILESEXTRAPATHS:prepend := "${THISDIR}/${BPN}:"
@ -8,3 +8,5 @@ SRC_URI:append:dey = " \
    file://0003-ccimx95-configure-console-on-LPUART6.patch \
    file://0004-ccimx95-add-DDR-configuration-file-for-ccimx95-B0-si.patch \
 "
 # NXP's 'lf-6.6.52_2.2.2' release
 SRCREV = "49bfaa93e9d1fe213866bcb9507927a59a9ede5a"
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager.inc
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager.inc
@ -0,0 +1,44 @@
 # Set generic compiler for system manager core
 INHIBIT_DEFAULT_DEPS = "1"
 DEPENDS = "${SM_COMPILER}"
 SM_COMPILER ?= "gcc-arm-none-eabi-native"
 PROVIDES += "virtual/imx-system-manager"
 inherit deploy
 PACKAGE_ARCH = "${MACHINE_ARCH}"
 # Set monitor mode for none, one, or two
 PACKAGECONFIG[m0] = "M=0,,,,,m1 m2"
 PACKAGECONFIG[m1] = ",,,,,m0 m2"
 PACKAGECONFIG[m2] = "M=2,,,,,m0 m1"
 SYSTEM_MANAGER_CONFIG ?= "INVALID"
 LDFLAGS[unexport] = "1"
 EXTRA_OEMAKE = " \
    V=1 \
    SM_CROSS_COMPILE=arm-none-eabi- \
    ${PACKAGECONFIG_CONFARGS} \
 "
 do_configure() {
    oe_runmake config=${SYSTEM_MANAGER_CONFIG} clean
    oe_runmake config=${SYSTEM_MANAGER_CONFIG} cfg
 }
 do_compile() {
    oe_runmake config=${SYSTEM_MANAGER_CONFIG}
 }
 do_install[noexec] = "1"
 addtask deploy after do_compile
 do_deploy() {
    install -D -p -m 0644 \
        ${B}/build/${SYSTEM_MANAGER_CONFIG}/${SYSTEM_MANAGER_FIRMWARE_BASENAME}.bin \
        ${DEPLOYDIR}/${SYSTEM_MANAGER_FIRMWARE_BASENAME}-${SYSTEM_MANAGER_CONFIG}.bin
 }
 COMPATIBLE_MACHINE = "(mx95-generic-bsp)"
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0001-ccimx95dvk-add-new-platform-config-and-board.patch
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0001-ccimx95dvk-add-new-platform-config-and-board.patch
@ -8,26 +8,26 @@ Upstream-Status: Inappropriate [DEY specific]
 Signed-off-by: Javier Viguera <javier.viguera@digi.com>
 ---
- boards/ccimx95dvk/board.c              | 579 ++++++++++++++
+ boards/ccimx95dvk/board.c              |  609 ++++++++++++++
- boards/ccimx95dvk/board.h              | 164 ++++
+ boards/ccimx95dvk/board.h              |  164 ++++
- boards/ccimx95dvk/pin_mux.c            |  58 ++
+ boards/ccimx95dvk/pin_mux.c            |   58 ++
- boards/ccimx95dvk/pin_mux.h            |  44 ++
+ boards/ccimx95dvk/pin_mux.h            |   44 +
- boards/ccimx95dvk/sm/Makefile          |  70 ++
+ boards/ccimx95dvk/sm/Makefile          |   70 ++
- boards/ccimx95dvk/sm/brd_sm.c          | 665 +++++++++++++++++
+ boards/ccimx95dvk/sm/brd_sm.c          |  664 +++++++++++++++
- boards/ccimx95dvk/sm/brd_sm.dox        |  55 ++
+ boards/ccimx95dvk/sm/brd_sm.dox        |   55 ++
- boards/ccimx95dvk/sm/brd_sm.h          | 100 +++
+ boards/ccimx95dvk/sm/brd_sm.h          |  100 +++
- boards/ccimx95dvk/sm/brd_sm_bbm.c      | 674 +++++++++++++++++
+ boards/ccimx95dvk/sm/brd_sm_bbm.c      |  721 +++++++++++++++++
- boards/ccimx95dvk/sm/brd_sm_bbm.h      | 242 ++++++
+ boards/ccimx95dvk/sm/brd_sm_bbm.h      |  242 ++++++
- boards/ccimx95dvk/sm/brd_sm_control.c  | 317 ++++++++
+ boards/ccimx95dvk/sm/brd_sm_control.c  |  356 +++++++++
- boards/ccimx95dvk/sm/brd_sm_control.h  | 202 +++++
+ boards/ccimx95dvk/sm/brd_sm_control.h  |  226 ++++++
- boards/ccimx95dvk/sm/brd_sm_handlers.c | 372 +++++++++
+ boards/ccimx95dvk/sm/brd_sm_handlers.c |  372 +++++++++
- boards/ccimx95dvk/sm/brd_sm_handlers.h | 129 ++++
+ boards/ccimx95dvk/sm/brd_sm_handlers.h |  129 +++
- boards/ccimx95dvk/sm/brd_sm_sensor.c   | 375 ++++++++++
+ boards/ccimx95dvk/sm/brd_sm_sensor.c   |  375 +++++++++
- boards/ccimx95dvk/sm/brd_sm_sensor.h   | 210 ++++++
+ boards/ccimx95dvk/sm/brd_sm_sensor.h   |  210 +++++
- boards/ccimx95dvk/sm/brd_sm_voltage.c  | 565 ++++++++++++++
+ boards/ccimx95dvk/sm/brd_sm_voltage.c  |  565 +++++++++++++
- boards/ccimx95dvk/sm/brd_sm_voltage.h  | 213 ++++++
+ boards/ccimx95dvk/sm/brd_sm_voltage.h  |  213 +++++
- configs/ccimx95dvk.cfg                 | 997 +++++++++++++++++++++++++
+ configs/ccimx95dvk.cfg                 | 1019 ++++++++++++++++++++++++
- 19 files changed, 6031 insertions(+)
+ 19 files changed, 6192 insertions(+)
 create mode 100755 boards/ccimx95dvk/board.c
 create mode 100755 boards/ccimx95dvk/board.h
 create mode 100755 boards/ccimx95dvk/pin_mux.c
@ -50,10 +50,10 @@ Signed-off-by: Javier Viguera <javier.viguera@digi.com>
 diff --git a/boards/ccimx95dvk/board.c b/boards/ccimx95dvk/board.c
 new file mode 100755
-index 000000000000..d4a671f6d7f8
+index 000000000000..c9b97b2a67d9
 --- /dev/null
 +++ b/boards/ccimx95dvk/board.c
-@@ -0,0 +1,579 @@
+@@ -0,0 +1,609 @@
 +/*
 + * Copyright 2023-2025 NXP
 + *
@ -169,8 +169,8 @@ index 000000000000..d4a671f6d7f8
 +    uint8_t attr;
 +
 +    /* Disable code cache(ICache) and system cache(DCache) */
-+    XCACHE_DisableCache(LPCAC_PC);
+    XCACHE_DisableCache(M33_CACHE_CTRLPC);
-+    XCACHE_DisableCache(LPCAC_PS);
+    XCACHE_DisableCache(M33_CACHE_CTRLPS);
 +
 +    /* NOTE: All TCRAM is non-cacheable regardless of MPU setting. */
 +
@ -196,12 +196,12 @@ index 000000000000..d4a671f6d7f8
 +    ARM_MPU_Disable();
 +
 +    /* Attr0: Device-nGnRnE */
-+    // coverity[misra_c_2012_rule_14_3_violation:FALSE]
+    // coverity[misra_c_2012_rule_14_3_violation]
 +    ARM_MPU_SetMemAttr(0U, ARM_MPU_ATTR(ARM_MPU_ATTR_DEVICE,
 +        ARM_MPU_ATTR_DEVICE));
 +
 +    /* Attr1: Normal memory, Outer non-cacheable, Inner non-cacheable */
-+    // coverity[misra_c_2012_rule_14_3_violation:FALSE]
+    // coverity[misra_c_2012_rule_14_3_violation]
 +    ARM_MPU_SetMemAttr(1U, ARM_MPU_ATTR(ARM_MPU_ATTR_NON_CACHEABLE,
 +        ARM_MPU_ATTR_NON_CACHEABLE));
 +
@ -293,8 +293,8 @@ index 000000000000..d4a671f6d7f8
 +    ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk);
 +
 +    /* Enable ICache and DCache */
-+    XCACHE_EnableCache(LPCAC_PC);
+    XCACHE_EnableCache(M33_CACHE_CTRLPC);
-+    XCACHE_EnableCache(LPCAC_PS);
+    XCACHE_EnableCache(M33_CACHE_CTRLPS);
 +}
 +
 +/*--------------------------------------------------------------------------*/
@ -302,32 +302,47 @@ index 000000000000..d4a671f6d7f8
 +/*--------------------------------------------------------------------------*/
 +void BOARD_InitClocks(void)
 +{
 +    bool rc;
 +    uint32_t fuseTrim = DEV_SM_FuseGet(DEV_SM_FUSE_FRO_TRIM);
 +
 +    if (fuseTrim == 0U)
 +    {
 +        /* Enable the FRO clock with default value */
-+        (void) FRO_SetEnable(true);
+        rc = FRO_SetEnable(true);
 +    }
 +    else
 +    {
 +        /* Set the Trim value read from the fuses */
-+        bool status = FRO_SetTrim(fuseTrim);
+        rc = FRO_SetTrim(fuseTrim);
 +
-+        if (status)
+        if (rc)
 +        {
 +            /* Enable the FRO clock with default value */
-+            (void) FRO_SetEnable(true);
+            rc = FRO_SetEnable(true);
 +        }
 +    }
 +
 +    /* Configure default EXT_CLK1 rate tied to XTAL_OUT/EXT_CLK pin */
-+    (void) CLOCK_SourceSetRate(CLOCK_SRC_EXT1, BOARD_EXT_CLK_RATE, 0U);
+    if (rc)
 +    {
 +        rc = CLOCK_SourceSetRate(CLOCK_SRC_EXT1, BOARD_EXT_CLK_RATE, 0U);
 +    }
 +
 +    /* Configure ADC clock */
-+    (void) CCM_RootSetParent(CLOCK_ROOT_ADC, CLOCK_SRC_SYSPLL1_PFD1_DIV2);
+    if (rc)
-+    (void) CCM_RootSetRate(CLOCK_ROOT_ADC, BOARD_ADC_CLK_RATE,
+    {
-+        CLOCK_ROUND_RULE_CEILING);
+        rc = CCM_RootSetParent(CLOCK_ROOT_ADC, CLOCK_SRC_SYSPLL1_PFD1_DIV2);
 +    }
 +    if (rc)
 +    {
 +        rc = CCM_RootSetRate(CLOCK_ROOT_ADC, BOARD_ADC_CLK_RATE,
 +            CLOCK_ROUND_RULE_CEILING);
 +    }
 +
 +    if (!rc)
 +    {
 +        DEV_SM_ErrorLog(DEV_SM_ERR_INITCLOCKS);
 +    }
 +}
 +
 +/*--------------------------------------------------------------------------*/
@ -357,8 +372,11 @@ index 000000000000..d4a671f6d7f8
 +            FSL_FEATURE_LPUART_FIFO_SIZEn(s_uartConfig.base)) - 1U;
 +        lpuart_config.enableTx = true;
 +        lpuart_config.enableRx = true;
-+        (void) LPUART_Init(s_uartConfig.base, &lpuart_config,
+        if (LPUART_Init(s_uartConfig.base, &lpuart_config,
-+            U64_U32(rate));
+            U64_U32(rate)) != kStatus_Success)
 +        {
 +            DEV_SM_ErrorLog(DEV_SM_ERR_INITCONSOLE);
 +        }
 +    }
 +}
 +
@ -371,7 +389,7 @@ index 000000000000..d4a671f6d7f8
 +    for (int32_t irq = ((int32_t) SVCall_IRQn); irq < ((int32_t)
 +        NUMBER_OF_INT_VECTORS); irq++)
 +    {
-+        // coverity[misra_c_2012_rule_10_5_violation:FALSE]
+        // coverity[misra_c_2012_rule_10_5_violation]
 +        NVIC_SetPriority((IRQn_Type) irq, IRQ_PRIO_NOPREEMPT_NORMAL);
 +    }
 +
@ -413,10 +431,22 @@ index 000000000000..d4a671f6d7f8
 +
 +    /* Configure and enable M33 SysTick */
 +    uint64_t rate = CCM_RootGetRate(BOARD_SYSTICK_CLK_ROOT);
-+    uint32_t reloadVal = (uint32_t) (rate & 0xFFFFFFFFU);
+    uint64_t reloadVal;
-+    reloadVal = ((reloadVal * BOARD_TICK_PERIOD_MSEC) + 999U) / 1000U;
+
-+    SYSTICK_Init(1U, BOARD_SYSTICK_CLKSRC, (uint32_t) (rate & 0xFFFFFFFFU),
+    /* If value wraps/exceeds, use max reload value */
-+        reloadVal);
+    if (rate <= (((1000ULL * SYSTICK_MAX_RELOAD) - 999ULL)
 +        / BOARD_TICK_PERIOD_MSEC))
 +    {
 +        reloadVal = ((rate * U64(BOARD_TICK_PERIOD_MSEC)) + 999ULL)
 +            / 1000ULL;
 +    }
 +    else
 +    {
 +        reloadVal = U64(SYSTICK_MAX_RELOAD);
 +        DEV_SM_ErrorLog(DEV_SM_ERR_INITTIMERS);
 +    }
 +
 +    SYSTICK_Init(1U, BOARD_SYSTICK_CLKSRC, U32(rate), U32(reloadVal));
 +    NVIC_EnableIRQ(SysTick_IRQn);
 +
 +    /* Configure and enable the WDOG */
@ -525,7 +555,7 @@ index 000000000000..d4a671f6d7f8
 +{
 +    static LPI2C_Type *const s_i2cBases[] = LPI2C_BASE_PTRS;
 +    LPI2C_Type *base = s_i2cBases[BOARD_I2C_INSTANCE];
-+    lpi2c_master_config_t lpi2cConfig = {0};
+    lpi2c_master_config_t lpi2cConfig = { 0 };
 +    static uint32_t const s_i2cClks[] =
 +    {
 +        0U,
@ -635,7 +665,7 @@ index 000000000000..d4a671f6d7f8
 +
 diff --git a/boards/ccimx95dvk/board.h b/boards/ccimx95dvk/board.h
 new file mode 100755
-index 000000000000..d6b450b92f10
+index 000000000000..bb4c664b16b8
 --- /dev/null
 +++ b/boards/ccimx95dvk/board.h
@@ -0,0 +1,164 @@
@ -671,7 +701,7 @@ index 000000000000..d6b450b92f10
 + */
 +/** @{ */
 +#define BOARD_TICK_PERIOD_MSEC  10U                       /*!< Tick period */
-+#define BOARD_SWI_IRQn          Reserved110_IRQn          /*!< SWI IRQ */
+#define BOARD_SWI_IRQn          SWI_0_IRQn                /*!< SWI IRQ */
 +#define BOARD_HAS_WDOG                                    /*!< Has a watchdog */
 +#define BOARD_HAS_PMIC                                    /*!< Has a PMIC */
 +#define BOARD_PMIC_RESUME_TICKS ((20U * 32768U) / 10000U) /*!< 2ms in 32K ticks */
@ -805,12 +835,12 @@ index 000000000000..d6b450b92f10
 +
 diff --git a/boards/ccimx95dvk/pin_mux.c b/boards/ccimx95dvk/pin_mux.c
 new file mode 100755
-index 000000000000..b40d897fbcdc
+index 000000000000..d98df874beca
 --- /dev/null
 +++ b/boards/ccimx95dvk/pin_mux.c
@@ -0,0 +1,58 @@
 +/*
-+ * Copyright 2023 NXP
+ * Copyright 2023, 2025 NXP
 + *
 + * SPDX-License-Identifier: BSD-3-Clause
 + */
@ -862,7 +892,7 @@ index 000000000000..b40d897fbcdc
 +        | IOMUXC_PAD_FSEL1(0x3U) | IOMUXC_PAD_PU(0x1U) | IOMUXC_PAD_OD(0x1U));
 +#endif
 +
-+    /* Configure GPIO1-10 (INT from the PCAL6408A */
+    /* Configure GPIO1-10 (INT from the PCAL6408A) */
 +    IOMUXC_SetPinMux(IOMUXC_PAD_PDM_BIT_STREAM1__GPIO1_IO_BIT10, 0U);
 +    IOMUXC_SetPinConfig(IOMUXC_PAD_PDM_BIT_STREAM1__GPIO1_IO_BIT10, 0U);
 +}
@ -995,10 +1025,10 @@ index 000000000000..d5b576737636
 +
 diff --git a/boards/ccimx95dvk/sm/brd_sm.c b/boards/ccimx95dvk/sm/brd_sm.c
 new file mode 100755
-index 000000000000..cd48b590cd26
+index 000000000000..36b4b52c6986
 --- /dev/null
 +++ b/boards/ccimx95dvk/sm/brd_sm.c
-@@ -0,0 +1,665 @@
+@@ -0,0 +1,664 @@
 +/*
 +** ###################################################################
 +**
@ -1050,7 +1080,7 @@ index 000000000000..cd48b590cd26
 +
 +/* Local defines */
 +
-+#define BRD_SM_RST_REC_FIRST  4U     /* First GPR for shutdown record */
+#define BRD_SM_RST_REC_FIRST  0U     /* First GPR for shutdown record */
 +#define BRD_SM_RST_REC_NUM    4U     /* Number of GPR for shutdown record */
 +
 +/* Defines to encode the reason */
@ -1125,7 +1155,7 @@ index 000000000000..cd48b590cd26
 +/*--------------------------------------------------------------------------*/
 +/* Init board                                                               */
 +/*--------------------------------------------------------------------------*/
-+// coverity[misra_c_2012_directive_4_6_violation:FALSE]
+// coverity[misra_c_2012_directive_4_6_violation]
 +int32_t BRD_SM_Init(int argc, const char * const argv[], uint32_t *mSel)
 +{
 +    int32_t status;
@ -1167,7 +1197,6 @@ index 000000000000..cd48b590cd26
 +        BOARD_WdogModeSet(BOARD_WDOG_MODE_FCCU);
 +    }
 +
 +    /* TODO: Remove when A0 support dropped */
 +    /* Configure ISO controls based on feature fuses */
 +    uint32_t ipIsoMask = 0U;
 +
@ -1205,12 +1234,12 @@ index 000000000000..cd48b590cd26
 +    BOARD_WdogModeSet(BOARD_WDOG_MODE_OFF);
 +#else
 +    SM_SYSTEMERROR(status, pc);
-+    // coverity[misra_c_2012_rule_2_2_violation:FALSE]
+    // coverity[misra_c_2012_rule_2_2_violation]
 +    SystemExit();
 +#endif
 +
 +    /* Hang */
-+    // coverity[infinite_loop:FALSE]
+    // coverity[infinite_loop]
 +    while (true)
 +    {
 +        ; /* Intentional empty while */
@ -1238,7 +1267,7 @@ index 000000000000..cd48b590cd26
 +/* Get fault reaction                                                       */
 +/*--------------------------------------------------------------------------*/
 +int32_t BRD_SM_FaultReactionGet(dev_sm_rst_rec_t resetRec,
-+    // coverity[misra_c_2012_rule_8_13_violation:FALSE]
+    // coverity[misra_c_2012_rule_8_13_violation]
 +    uint32_t *reaction, uint32_t *lm)
 +{
 +    int32_t status = SM_ERR_SUCCESS;
@ -1833,10 +1862,10 @@ index 000000000000..ce758e1e4c64
 +
 diff --git a/boards/ccimx95dvk/sm/brd_sm_bbm.c b/boards/ccimx95dvk/sm/brd_sm_bbm.c
 new file mode 100755
-index 000000000000..c2e5cd61dc9f
+index 000000000000..6103583ff69d
 --- /dev/null
 +++ b/boards/ccimx95dvk/sm/brd_sm_bbm.c
-@@ -0,0 +1,674 @@
+@@ -0,0 +1,721 @@
 +/*
 +** ###################################################################
 +**
@ -1895,7 +1924,7 @@ index 000000000000..c2e5cd61dc9f
 +
 +static bool days2date(uint32_t days, uint32_t *year, uint32_t *month,
 +    uint32_t *day, uint32_t *weekday);
-+static void date2days(uint32_t year, uint32_t month, uint32_t day,
+static bool date2days(uint32_t year, uint32_t month, uint32_t day,
 +    uint32_t *days);
 +
 +/*--------------------------------------------------------------------------*/
@ -1992,8 +2021,16 @@ index 000000000000..c2e5cd61dc9f
 +    }
 +    else
 +    {
-+        /* Return pointer to name */
+        if ((rtcId - DEV_SM_NUM_RTC) < BRD_SM_NUM_RTC)
-+        *rtcNameAddr = s_name[rtcId - DEV_SM_NUM_RTC];
+        {
 +            /* Return pointer to name */
 +            *rtcNameAddr = s_name[rtcId - DEV_SM_NUM_RTC];
 +        }
 +        else
 +        {
 +            /* Set the status */
 +            status = SM_ERR_INVALID_PARAMETERS;
 +        }
 +    }
 +
 +    /* Return status */
@ -2086,12 +2123,12 @@ index 000000000000..c2e5cd61dc9f
 +        {
 +            status = SM_ERR_INVALID_PARAMETERS;
 +        }
 +    }
 +
-+    if (status == SM_ERR_SUCCESS)
+        if (status == SM_ERR_SUCCESS)
-+    {
+        {
-+        /* Enable battery */
+            /* Enable battery */
-+        (void) PCA2131_PowerModeSet(&g_pca2131Dev, 0U);
+            (void) PCA2131_PowerModeSet(&g_pca2131Dev, 0U);
 +        }
 +    }
 +
 +    /* Return status */
@ -2117,7 +2154,7 @@ index 000000000000..c2e5cd61dc9f
 +        if (PCA2131_RtcGet(&g_pca2131Dev, &year, &month, &day, &hour, &min,
 +            &sec, &hun, &weekday))
 +        {
-+            uint32_t days, secs;
+            uint32_t days = 0U;
 +
 +            /* Convert year */
 +            if (year >= 70U)
@ -2130,26 +2167,38 @@ index 000000000000..c2e5cd61dc9f
 +            }
 +
 +            /* Convert to days */
-+            date2days(year, month, day, &days);
+            if (date2days(year, month, day, &days))
 +
 +            /* Calculate seconds */
 +            secs = sec + (min * 60U) + (hour * 3600U);
 +            secs += (days * 86400U);
 +
 +            /* Check time format */
 +            if (ticks)
 +            {
-+                *val = (((uint64_t) secs) * 100U) + hun;
+
 +                /* Calculate seconds */
 +                uint32_t secs = sec + (min * 60U) + (hour * 3600U);
 +                secs += (days * 86400U);
 +
 +                /* Check time format */
 +                if (ticks)
 +                {
 +                    *val = (((uint64_t) secs) * 100U) + hun;
 +                }
 +                else
 +                {
 +                    *val = ((uint64_t) secs);
 +                }
 +            }
 +            else
 +            {
-+                *val = ((uint64_t) secs);
+                status = SM_ERR_HARDWARE_ERROR;
 +            }
 +        }
 +        else
 +        {
 +            status = SM_ERR_HARDWARE_ERROR;
 +        }
 +
 +        if (status == SM_ERR_SUCCESS)
 +        {
 +            /* Enable battery */
 +            (void) PCA2131_PowerModeSet(&g_pca2131Dev, 0U);
 +        }
 +    }
 +
 +    /* Return status */
@ -2174,10 +2223,7 @@ index 000000000000..c2e5cd61dc9f
 +        /* Default state */
 +        *state = 0U;
 +
-+        /* Enable battery */
+        /* Get time status */
 +        (void) PCA2131_PowerModeSet(&g_pca2131Dev, 0U);
 +
 +        /* Get battery state */
 +        if (PCA2131_TimeStatusGet(&g_pca2131Dev, &st))
 +        {
 +            if (st)
@ -2463,7 +2509,7 @@ index 000000000000..c2e5cd61dc9f
 +    if (rc)
 +    {
 +        /* Calculate month */
-+        *month= (moy < 10U) ? (moy + 3U) : (moy - 9U);
+        *month = (moy < 10U) ? (moy + 3U) : (moy - 9U);
 +
 +        /* Calculate day of the week */
 +        *weekday = (days + 4U) % 7U;
@ -2479,36 +2525,66 @@ index 000000000000..c2e5cd61dc9f
 +/*--------------------------------------------------------------------------*/
 +/* Convert date/time to days since 1-1-1970                                 */
 +/*--------------------------------------------------------------------------*/
-+static void date2days(uint32_t year, uint32_t month, uint32_t day,
+static bool date2days(uint32_t year, uint32_t month, uint32_t day,
 +    uint32_t *days)
 +{
-+    uint32_t newYear;
+    bool rc = true;
-+    uint32_t era;
+    uint32_t newYear = 0U;
-+    uint32_t doe;
+    uint32_t era = 0U;
-+    uint32_t yoe;
+    uint32_t yoe = 0U;
 +    uint32_t doy;
 +    uint32_t moy;
 +
-+    /* Adjust year */
+    /*
 +     * False Positive: The value of variable year cann't be zero
 +     */
 +    // coverity[cert_int30_c_violation:FALSE]
 +    newYear = year - ((month <= 2U) ? 1U : 0U);
 +
 +    /* Calculate era */
 +    era = newYear / 400U;
 +
-+    /* Calculate the year of era */
+    /* Check the expression value doesn't wrap */
-+    yoe = newYear - (era * 400U);
+    if (newYear >= (era * 400U))
 +    {
 +        /* Calculate the year of era */
 +        yoe = newYear - (era * 400U);
 +    }
 +    else
 +    {
 +        /* Handling if value wraps */
 +        rc = false;
 +    }
 +
-+    /* Calculate month of year */
+    if (rc == true)
-+    moy = (month > 2U) ? (month - 3U) : (month + 9U);
+    {
 +        /* Calculate month of year */
 +        uint32_t moy = (month > 2U) ? (month - 3U) : (month + 9U);
 +
-+    /* Calculate day of the year */
+        /*
-+    doy = (((153U * moy) + 2U) / 5U) + (day - 1U);
+         * False Positive: moy value will range 1 <=moy <= 12.
 +         * Hence, the multiplication with 153 cann't overflow
 +         */
 +        // coverity[cert_int30_c_violation:FALSE]
 +        uint32_t doy = (((153U * moy) + 2U) / 5U) + (day - 1U);
 +
-+    /* Calculate the day in the era */
+        /*
-+    doe = (yoe * 365U) + (yoe / 4U) - (yoe / 100U) + doy;
+         * False Positive: yoe is remainder value which will be always
 +         * less than 400.
 +         * Hence, the multiplication with 365 cann't overflow
 +         */
 +        // coverity[cert_int30_c_violation:FALSE]
 +        uint32_t doe = (yoe * 365U) + (yoe / 4U) - (yoe / 100U) + doy;
 +
-+    /* Calculate days */
+        /*
-+    *days = (era * 146097U) + doe - 719468U;
+         * False Positive: era is quotient value dividing newYear with 400.
 +         * The newYear variable will range from 1970 <= newYear <= 2070.
 +         * Hence, the multiplication can't overflow.
 +         */
 +        // coverity[cert_int30_c_violation:FALSE]
 +        *days = (era * 146097U) + doe - 719468U;
 +    }
 +
 +    /* Return code */
 +    return rc;
 +}
 +
 diff --git a/boards/ccimx95dvk/sm/brd_sm_bbm.h b/boards/ccimx95dvk/sm/brd_sm_bbm.h
@ -2761,14 +2837,14 @@ index 000000000000..a96a8e1cc901
 +
 diff --git a/boards/ccimx95dvk/sm/brd_sm_control.c b/boards/ccimx95dvk/sm/brd_sm_control.c
 new file mode 100755
-index 000000000000..5b36c66c593c
+index 000000000000..fde28d939fca
 --- /dev/null
 +++ b/boards/ccimx95dvk/sm/brd_sm_control.c
-@@ -0,0 +1,317 @@
+@@ -0,0 +1,356 @@
 +/*
 +** ###################################################################
 +**
-+**     Copyright 2023-2024 NXP
+**     Copyright 2023-2025 NXP
 +**
 +**     Redistribution and use in source and binary forms, with or without modification,
 +**     are permitted provided that the following conditions are met:
@ -2838,15 +2914,6 @@ index 000000000000..5b36c66c593c
 +        {
 +            status = DEV_SM_ControlSet(ctrlId, numVal, val);
 +        }
 +        else if (ctrlId == BRD_SM_CTRL_PCA2131)
 +        {
 +            status = SM_ERR_NOT_SUPPORTED;
 +        }
 +        else if (ctrlId == BRD_SM_CTRL_TEST)
 +        {
 +            /* Test response to an reported SM error */
 +            SM_Error(SM_ERR_GENERIC_ERROR);
 +        }
 +        else
 +        {
 +            status = SM_ERR_NOT_SUPPORTED;
@ -2868,6 +2935,9 @@ index 000000000000..5b36c66c593c
 +{
 +    int32_t status = SM_ERR_SUCCESS;
 +
 +    /* Default to no return */
 +    *numRtn = 0U;
 +
 +    /* Check to see if ctrlId is within bounds*/
 +    if (ctrlId < SM_NUM_CTRL)
 +    {
@ -2876,13 +2946,7 @@ index 000000000000..5b36c66c593c
 +        {
 +            status = DEV_SM_ControlGet(ctrlId, numRtn, rtn);
 +        }
-+        else if ((ctrlId == BRD_SM_CTRL_PCA2131)
+        else if (ctrlId < BRD_SM_CTRL_TEST)
 +            || (ctrlId == BRD_SM_CTRL_TEST))
 +        {
 +            *numRtn = 0U;
 +            status = SM_ERR_NOT_SUPPORTED;
 +        }
 +        else
 +        {
 +            uint8_t data;
 +
@ -2905,10 +2969,13 @@ index 000000000000..5b36c66c593c
 +                status = SM_ERR_HARDWARE_ERROR;
 +            }
 +        }
 +        else
 +        {
 +            status = SM_ERR_NOT_SUPPORTED;
 +        }
 +    }
 +    else
 +    {
 +        *numRtn = 0U;
 +        status = SM_ERR_NOT_FOUND;
 +    }
 +
@ -2985,6 +3052,54 @@ index 000000000000..5b36c66c593c
 +}
 +
 +/*--------------------------------------------------------------------------*/
 +/* Do a control action                                                      */
 +/*--------------------------------------------------------------------------*/
 +int32_t BRD_SM_ControlAction(uint32_t ctrlId, uint32_t action,
 +    uint32_t numArg, const uint32_t *arg, uint32_t *numRtn, uint32_t *rtn)
 +{
 +    int32_t status = SM_ERR_SUCCESS;
 +
 +    /* Default to no return */
 +    *numRtn = 0U;
 +
 +    /* Check to see if ctrlId is within bounds*/
 +    if (ctrlId < SM_NUM_CTRL)
 +    {
 +        /* Check if device or board */
 +        if (ctrlId < DEV_SM_NUM_CTRL)
 +        {
 +            status = DEV_SM_ControlAction(ctrlId, action, numArg, arg,
 +                numRtn, rtn);
 +        }
 +        else if (ctrlId == BRD_SM_CTRL_TEST)
 +        {
 +            /* Test response to a reported SM error */
 +            SM_Error(SM_ERR_GENERIC_ERROR);
 +        }
 +        else if (ctrlId == BRD_SM_CTRL_TEST_A)
 +        {
 +            for (uint32_t idx = 0U; idx < numArg; idx++)
 +            {
 +                rtn[idx] = arg[idx];
 +            }
 +
 +            *numRtn = numArg;
 +        }
 +        else
 +        {
 +            status = SM_ERR_NOT_SUPPORTED;
 +        }
 +    }
 +    else
 +    {
 +        status = SM_ERR_NOT_FOUND;
 +    }
 +
 +    /* Return status */
 +    return status;
 +}
 +
 +/*--------------------------------------------------------------------------*/
 +/* Configure notification flags                                             */
 +/*--------------------------------------------------------------------------*/
 +int32_t BRD_SM_ControlFlagsSet(uint32_t ctrlId, uint32_t flags)
@ -3084,14 +3199,14 @@ index 000000000000..5b36c66c593c
 +
 diff --git a/boards/ccimx95dvk/sm/brd_sm_control.h b/boards/ccimx95dvk/sm/brd_sm_control.h
 new file mode 100755
-index 000000000000..bf893782e1d7
+index 000000000000..30ad8e67eb6f
 --- /dev/null
 +++ b/boards/ccimx95dvk/sm/brd_sm_control.h
-@@ -0,0 +1,202 @@
+@@ -0,0 +1,226 @@
 +/*
 +** ###################################################################
 +**
-+**     Copyright 2023-2024 NXP
+**     Copyright 2023-2025 NXP
 +**
 +**     Redistribution and use in source and binary forms, with or without modification,
 +**     are permitted provided that the following conditions are met:
@ -3152,11 +3267,12 @@ index 000000000000..bf893782e1d7
 +#define SM_CONTROLGET          BRD_SM_ControlGet          /*!< Control get */
 +#define SM_CONTROLEXTSET       BRD_SM_ControlExtSet       /*!< Extended control set */
 +#define SM_CONTROLEXTGET       BRD_SM_ControlExtGet       /*!< Extended control get */
 +#define SM_CONTROLACTION       BRD_SM_ControlAction       /*!< Control action */
 +#define SM_CONTROLFLAGSSET     BRD_SM_ControlFlagsSet     /*!< Control flags */
 +/** @} */
 +
 +/*! Number of board controls */
-+#define BRD_SM_NUM_CTRL  7UL
+#define BRD_SM_NUM_CTRL  8UL
 +
 +/*! Total number of controls */
 +#define SM_NUM_CTRL  (DEV_SM_NUM_CTRL + BRD_SM_NUM_CTRL)
@ -3172,6 +3288,7 @@ index 000000000000..bf893782e1d7
 +#define BRD_SM_CTRL_BUTTON      (DEV_SM_NUM_CTRL + 4U)  /*!< PCAL6408A-7 */
 +#define BRD_SM_CTRL_TEST        (DEV_SM_NUM_CTRL + 5U)  /*!< Test */
 +#define BRD_SM_CTRL_PCA2131     (DEV_SM_NUM_CTRL + 6U)  /*!< PCA2131 raw access */
 +#define BRD_SM_CTRL_TEST_A      (DEV_SM_NUM_CTRL + 7U)  /*!< Test action */
 +/** @} */
 +
 +/* Types */
@ -3261,6 +3378,28 @@ index 000000000000..bf893782e1d7
 +    uint32_t numRtn, uint32_t *rtn);
 +
 +/*!
 + * Perform action on a board control.
 + *
 + * @param[in]     ctrlId   Index of control to take action
 + * @param[in]     action   Action to take
 + * @param[in]     numArg   Number of argument array elements
 + * @param[in]     arg      Pointer to array of argument values
 + * @param[out]    numRtn   Return pointer to number of array elements
 + * @param[out]    rtn      Pointer to array to store return
 + *
 + * This function allows a caller to perform an action on a control. The
 + * actions are device and control specific.
 + *
 + * @return Returns the status (::SM_ERR_SUCCESS = success).
 + *
 + * Return errors (see @ref STATUS "SM error codes"):
 + * - ::SM_ERR_NOT_FOUND: if ctrlId is not valid.
 + * - ::SM_ERR_INVALID_PARAMETERS: if action or numArg are not valid.
 + */
 +int32_t BRD_SM_ControlAction(uint32_t ctrlId, uint32_t action,
 +    uint32_t numArg, const uint32_t *arg, uint32_t *numRtn, uint32_t *rtn);
 +
 +/*!
 + * Configure notification flags for a control.
 + *
 + * @param[in]     ctrlId   Index of control to take action
@ -3805,7 +3944,7 @@ index 000000000000..e34d52b50f7a
 +
 diff --git a/boards/ccimx95dvk/sm/brd_sm_sensor.c b/boards/ccimx95dvk/sm/brd_sm_sensor.c
 new file mode 100755
-index 000000000000..92e415459477
+index 000000000000..4d3ffe8e8502
 --- /dev/null
 +++ b/boards/ccimx95dvk/sm/brd_sm_sensor.c
@@ -0,0 +1,375 @@
@ -4151,8 +4290,6 @@ index 000000000000..92e415459477
 +    /* Check to see if sensorId is within bounds */
 +    if (sensorId < SM_NUM_SENSOR)
 +    {
 +        uint32_t brdSensorId = sensorId - DEV_SM_NUM_SENSOR;
 +
 +        /* Check if device or board */
 +        if (sensorId < DEV_SM_NUM_SENSOR)
 +        {
@ -4161,6 +4298,8 @@ index 000000000000..92e415459477
 +        }
 +        else
 +        {
 +            uint32_t brdSensorId = sensorId - DEV_SM_NUM_SENSOR;
 +
 +            /* Return sensor enable */
 +            *enabled = sensorEnb[brdSensorId];
 +            *timestampReporting = false;
@ -5192,10 +5331,10 @@ index 000000000000..6c9e01286e7e
 +
 diff --git a/configs/ccimx95dvk.cfg b/configs/ccimx95dvk.cfg
 new file mode 100755
-index 000000000000..d05e1214df8a
+index 000000000000..a0207dec3b67
 --- /dev/null
 +++ b/configs/ccimx95dvk.cfg
-@@ -0,0 +1,997 @@
+@@ -0,0 +1,1019 @@
 +## ###################################################################
 +##
 +## Copyright 2023-2025 NXP
@ -5306,7 +5445,7 @@ index 000000000000..d05e1214df8a
 +DFMT0:              sa=secure
 +DFMT1:              sa=secure, pa=privileged
 +OWNER:              perm=sec_rw, api=all
-+ACCESS:             perm=sec_rw, api=all, mdid=none
+ACCESS:             perm=sec_rw, api=none, mdid=none
 +TEST_MU:            perm=sec_rw
 +
 +EXEC:               perm=sec_rwx
@ -5317,39 +5456,9 @@ index 000000000000..d05e1214df8a
 +
 +# API
 +
-+# Modified via PERF protocol
+# SM CLocks
 +CLK_A55MTRBUS            ALL
 +CLK_ADC                  ALL
 +CLK_BUSAON               ALL
 +CLK_BUSM7                ALL
 +CLK_BUSNETCMIX           ALL
 +CLK_BUSWAKEUP            ALL
 +CLK_CAMAPB               ALL
 +CLK_CAMAXI               ALL
 +CLK_CAMCM0               ALL
 +CLK_CAMISI               ALL
 +CLK_DISPAPB              ALL
 +CLK_DISPAXI              ALL
 +CLK_ELE                  ALL
 +CLK_ENET                 ALL
 +CLK_ENETPHYTEST200M      ALL
 +CLK_ENETPHYTEST500M      ALL
 +CLK_ENETPHYTEST667M      ALL
 +CLK_FRO                  ALL
 +CLK_GPU                  ALL
 +CLK_GPUAPB               ALL
 +CLK_HSIO                 ALL
 +CLK_HSIOACSCAN480M       ALL
 +CLK_HSIOACSCAN80M        ALL
 +CLK_HSIOPCIETEST160M     ALL
 +CLK_HSIOPCIETEST400M     ALL
 +CLK_HSIOPCIETEST500M     ALL
 +CLK_HSIOUSBTEST50M       ALL
 +CLK_HSIOUSBTEST60M       ALL
 +CLK_NOC                  ALL
 +CLK_NOCAPB               ALL
 +CLK_NPU                  ALL
 +CLK_NPUAPB               ALL
 +CLK_OSC24M               ALL
 +CLK_OSC32K               ALL
 +CLK_SYSPLL1_PFD0         ALL
@ -5364,12 +5473,62 @@ index 000000000000..d05e1214df8a
 +CLK_SYSPLL1_VCO          ALL
 +CLK_TEMPSENSE_GPR_SEL    ALL
 +CLK_TMU                  ALL
 +
 +# Modified via PERF protocol
 +CLK_A55                  ALL
 +CLK_A55C0_GPR_SEL        ALL
 +CLK_A55C1_GPR_SEL        ALL
 +CLK_A55C2_GPR_SEL        ALL
 +CLK_A55C3_GPR_SEL        ALL
 +CLK_A55C4_GPR_SEL        ALL
 +CLK_A55C5_GPR_SEL        ALL
 +CLK_A55MTRBUS            ALL
 +CLK_A55P_GPR_SEL         ALL
 +CLK_A55PERIPH            ALL
 +CLK_BUSAON               ALL
 +CLK_BUSM7                ALL
 +CLK_BUSNETCMIX           ALL
 +CLK_BUSWAKEUP            ALL
 +CLK_CAMAPB               ALL
 +CLK_CAMAXI               ALL
 +CLK_CAMCM0               ALL
 +CLK_CAMISI               ALL
 +CLK_DISPAPB              ALL
 +CLK_DISPAXI              ALL
 +CLK_DISPOCRAM            ALL
 +CLK_DRAM_GPR_SEL         ALL
 +CLK_DRAMALT              ALL
 +CLK_DRAMAPB              ALL
 +CLK_ELE                  ALL
 +CLK_ENET                 ALL
 +CLK_GPU                  ALL
 +CLK_GPUAPB               ALL
 +CLK_HSIO                 ALL
 +CLK_M33                  ALL
 +CLK_M7                   ALL
 +CLK_NOC                  ALL
 +CLK_NOCAPB               ALL
 +CLK_NPU                  ALL
 +CLK_NPUAPB               ALL
 +CLK_V2XPK                ALL
 +CLK_V2XPK                ALL
 +CLK_VPU                  ALL
 +CLK_VPUAPB               ALL
 +CLK_VPUJPEG              ALL
 +CLK_WAKEUPAXI            ALL
 +
 +# Test CLocks
 +CLK_ENETPHYTEST200M      ALL
 +CLK_ENETPHYTEST500M      ALL
 +CLK_ENETPHYTEST667M      ALL
 +CLK_HSIOACSCAN480M       ALL
 +CLK_HSIOACSCAN80M        ALL
 +CLK_HSIOPCIETEST160M     ALL
 +CLK_HSIOPCIETEST400M     ALL
 +CLK_HSIOPCIETEST500M     ALL
 +CLK_HSIOUSBTEST50M       ALL
 +CLK_HSIOUSBTEST60M       ALL
 +
 +# Resources
 +
 +M33P                OWNER  # CPUs must be first
@ -5547,6 +5706,7 @@ index 000000000000..d05e1214df8a
 +BRD_SM_CTRL_BUTTON        NOTIFY
 +BRD_SM_CTRL_PCA2131       ALL
 +BRD_SM_CTRL_TEST          ALL
 +BRD_SM_CTRL_TEST_A        ALL
 +BRD_SM_RTC_PCA2131        ALL
 +BRD_SM_SENSOR_TEMP_PF09   SET
 +BRD_SM_SENSOR_TEMP_PF5301 SET
@ -5611,7 +5771,7 @@ index 000000000000..d05e1214df8a
 +OWNER:              perm=sec_rw, api=all
 +
 +EXEC:               perm=sec_rwx
-+DATA:               perm=rw
+DATA:               perm=sec_rw
 +
 +# Start/Stop (mSel=0)
 +
@ -5740,6 +5900,7 @@ index 000000000000..d05e1214df8a
 +BRD_SM_CTRL_PCIE1_WAKE    NOTIFY
 +BRD_SM_CTRL_PCIE2_WAKE    NOTIFY
 +BRD_SM_CTRL_SD3_WAKE      NOTIFY
 +BRD_SM_CTRL_TEST_A        ALL
 +BRD_SM_RTC_PCA2131        PRIV
 +BRD_SM_SENSOR_TEMP_PF09   ALL
 +BRD_SM_SENSOR_TEMP_PF5301 SET
@ -5921,7 +6082,7 @@ index 000000000000..d05e1214df8a
 +GPR5                OWNER
 +GPR6                OWNER
 +GPR7                OWNER
-+GPU_NPROT           OWNER
+GPU_NPROT           OWNER, test
 +GPU_PROT            OWNER, test
 +I3C1                OWNER
 +I3C2                OWNER
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0002-ccimx95dvk-configure-board-and-switch-debug-UART-to-.patch
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0002-ccimx95dvk-configure-board-and-switch-debug-UART-to-.patch
@ -22,12 +22,12 @@ Signed-off-by: Javier Viguera <javier.viguera@digi.com>
 configs/ccimx95dvk/config_dev.h   |   65 ++
 configs/ccimx95dvk/config_lmm.h   |  223 +++++
 configs/ccimx95dvk/config_mb_mu.h |  118 +++
- configs/ccimx95dvk/config_scmi.h  |  695 +++++++++++++++
+ configs/ccimx95dvk/config_scmi.h  |  686 ++++++++++++++
 configs/ccimx95dvk/config_smt.h   |  168 ++++
- configs/ccimx95dvk/config_test.h  |  197 +++++
+ configs/ccimx95dvk/config_test.h  |  199 +++++
 configs/ccimx95dvk/config_trdc.h  | 1373 +++++++++++++++++++++++++++++
 configs/ccimx95dvk/config_user.h  |  230 +++++
- 14 files changed, 3346 insertions(+), 10 deletions(-)
+ 14 files changed, 3339 insertions(+), 10 deletions(-)
 create mode 100644 configs/ccimx95dvk/config.dox
 create mode 100644 configs/ccimx95dvk/config.mak
 create mode 100644 configs/ccimx95dvk/config_bctrl.h
@ -42,7 +42,7 @@ Signed-off-by: Javier Viguera <javier.viguera@digi.com>
 create mode 100644 configs/ccimx95dvk/config_user.h
 diff --git a/boards/ccimx95dvk/pin_mux.c b/boards/ccimx95dvk/pin_mux.c
-index b40d897fbcdc..60f6d27c41c5 100755
+index d98df874beca..ff2b9540ea7a 100755
 --- a/boards/ccimx95dvk/pin_mux.c
 +++ b/boards/ccimx95dvk/pin_mux.c
@@ -29,6 +29,13 @@ void BOARD_InitPins(void)
@ -60,7 +60,7 @@ index b40d897fbcdc..60f6d27c41c5 100755
 #if (BOARD_I2C_INSTANCE == 1U)
 diff --git a/configs/ccimx95dvk.cfg b/configs/ccimx95dvk.cfg
-index d05e1214df8a..da383aab036c 100755
+index a0207dec3b67..557bba3cecf2 100755
 --- a/configs/ccimx95dvk.cfg
 +++ b/configs/ccimx95dvk.cfg
@@ -32,8 +32,8 @@
@ -83,7 +83,7 @@ index d05e1214df8a..da383aab036c 100755
 BOARD               DEBUG_UART_BAUDRATE=115200
 BOARD               I2C_INSTANCE=1
-@@ -213,7 +213,7 @@ IOMUXC              OWNER
+@@ -233,7 +233,7 @@ IOMUXC              OWNER
 IOMUX_GPR           OWNER
 JTAG                OWNER
 LPI2C1              OWNER
@ -92,7 +92,7 @@ index d05e1214df8a..da383aab036c 100755
 M33_CACHE_CTRL      OWNER
 M33_PCF             OWNER
 M33_PSF             OWNER
-@@ -287,8 +287,8 @@ PIN_FCCU_ERR0         OWNER
+@@ -307,8 +307,8 @@ PIN_FCCU_ERR0         OWNER
 PIN_I2C1_SCL          OWNER
 PIN_I2C1_SDA          OWNER
 PIN_PDM_BIT_STREAM1   OWNER
@ -103,7 +103,7 @@ index d05e1214df8a..da383aab036c 100755
 PIN_WDOG_ANY          OWNER
 # Memory
-@@ -477,10 +477,10 @@ PERLPI_GPIO3        ALL
+@@ -498,10 +498,10 @@ PERLPI_GPIO3        ALL
 PERLPI_GPIO4        ALL
 PERLPI_GPIO5        ALL
 PERLPI_LPUART1      ALL
@ -115,7 +115,7 @@ index d05e1214df8a..da383aab036c 100755
 PERLPI_LPUART8      ALL
 PERLPI_WDOG3        ALL
 PERLPI_WDOG4        ALL
-@@ -760,10 +760,10 @@ LPTPM4              OWNER
+@@ -782,10 +782,10 @@ LPTPM4              OWNER
 LPTPM5              OWNER
 LPTPM6              OWNER
 LPUART1             OWNER
@ -127,7 +127,7 @@ index d05e1214df8a..da383aab036c 100755
 LPUART8             OWNER, test
 LVDS                OWNER
 MIPI_CSI0           OWNER
-@@ -909,8 +909,6 @@ PIN_GPIO_IO04        OWNER
+@@ -931,8 +931,6 @@ PIN_GPIO_IO04        OWNER
 PIN_GPIO_IO05        OWNER
 PIN_GPIO_IO06        OWNER
 PIN_GPIO_IO07        OWNER
@ -495,7 +495,7 @@ index 000000000000..1768fa8b16ab
 +
 diff --git a/configs/ccimx95dvk/config_lmm.h b/configs/ccimx95dvk/config_lmm.h
 new file mode 100644
-index 000000000000..4c7693ee8b81
+index 000000000000..1affe62ce4c4
 --- /dev/null
 +++ b/configs/ccimx95dvk/config_lmm.h
@@ -0,0 +1,223 @@
@ -644,20 +644,20 @@ index 000000000000..4c7693ee8b81
 +    {.lmId = 1U, .mSel = 1U, .ss = LMM_SS_CPU, .rsrc = DEV_SM_CPU_M7P}, \
 +    {.lmId = 1U, .mSel = 2U, .ss = LMM_SS_CPU, .rsrc = DEV_SM_CPU_M7P}, \
 +    {.lmId = 2U, .mSel = 0U, .ss = LMM_SS_VOLT, .rsrc = DEV_SM_VOLT_ARM, \
-+     .numArg = 1, .arg[0] = 1U,}, \
+     .numArg = 1, .arg[0] = 1U, }, \
 +    {.lmId = 2U, .mSel = 1U, .ss = LMM_SS_VOLT, .rsrc = DEV_SM_VOLT_ARM, \
-+     .numArg = 1, .arg[0] = 1U,}, \
+     .numArg = 1, .arg[0] = 1U, }, \
 +    {.lmId = 2U, .mSel = 2U, .ss = LMM_SS_VOLT, .rsrc = DEV_SM_VOLT_ARM, \
-+     .numArg = 1, .arg[0] = 1U,}, \
+     .numArg = 1, .arg[0] = 1U, }, \
 +    {.lmId = 2U, .mSel = 0U, .ss = LMM_SS_PD, .rsrc = DEV_SM_PD_A55P}, \
 +    {.lmId = 2U, .mSel = 1U, .ss = LMM_SS_PD, .rsrc = DEV_SM_PD_A55P}, \
 +    {.lmId = 2U, .mSel = 2U, .ss = LMM_SS_PD, .rsrc = DEV_SM_PD_A55P}, \
 +    {.lmId = 2U, .mSel = 0U, .ss = LMM_SS_PERF, .rsrc = DEV_SM_PERF_A55, \
-+     .numArg = 1, .arg[0] = 3U,}, \
+     .numArg = 1, .arg[0] = 3U, }, \
 +    {.lmId = 2U, .mSel = 1U, .ss = LMM_SS_PERF, .rsrc = DEV_SM_PERF_A55, \
-+     .numArg = 1, .arg[0] = 3U,}, \
+     .numArg = 1, .arg[0] = 3U, }, \
 +    {.lmId = 2U, .mSel = 2U, .ss = LMM_SS_PERF, .rsrc = DEV_SM_PERF_A55, \
-+     .numArg = 1, .arg[0] = 3U,}, \
+     .numArg = 1, .arg[0] = 3U, }, \
 +    {.lmId = 2U, .mSel = 0U, .ss = LMM_SS_CPU, .rsrc = DEV_SM_CPU_A55C0}, \
 +    {.lmId = 2U, .mSel = 1U, .ss = LMM_SS_CPU, .rsrc = DEV_SM_CPU_A55C0}, \
 +    {.lmId = 2U, .mSel = 2U, .ss = LMM_SS_CPU, .rsrc = DEV_SM_CPU_A55C0},
@ -848,10 +848,10 @@ index 000000000000..e78f2dca1216
 +
 diff --git a/configs/ccimx95dvk/config_scmi.h b/configs/ccimx95dvk/config_scmi.h
 new file mode 100644
-index 000000000000..e1b81cc03f58
+index 000000000000..7032a0efc948
 --- /dev/null
 +++ b/configs/ccimx95dvk/config_scmi.h
-@@ -0,0 +1,695 @@
+@@ -0,0 +1,686 @@
 +/*
 +** ###################################################################
 +**
@ -925,12 +925,12 @@ index 000000000000..e1b81cc03f58
 +        .clkPerms[DEV_SM_CLK_LPTMR2] = SM_SCMI_PERM_ALL, \
 +        .clkPerms[DEV_SM_CLK_LPUART3] = SM_SCMI_PERM_ALL, \
 +        .clkPerms[DEV_SM_CLK_M7SYSTICK] = SM_SCMI_PERM_ALL, \
 +        .clkPerms[DEV_SM_CLK_M7] = SM_SCMI_PERM_ALL, \
 +        .clkPerms[DEV_SM_CLK_TSTMR2] = SM_SCMI_PERM_ALL, \
 +        .cpuPerms[DEV_SM_CPU_M7P] = SM_SCMI_PERM_ALL, \
 +        .ctrlPerms[BRD_SM_CTRL_BUTTON] = SM_SCMI_PERM_NOTIFY, \
 +        .ctrlPerms[BRD_SM_CTRL_PCA2131] = SM_SCMI_PERM_ALL, \
 +        .ctrlPerms[BRD_SM_CTRL_TEST] = SM_SCMI_PERM_ALL, \
 +        .ctrlPerms[BRD_SM_CTRL_TEST_A] = SM_SCMI_PERM_ALL, \
 +        .daisyPerms[DEV_SM_DAISY_CAN1_RX] = SM_SCMI_PERM_ALL, \
 +        .daisyPerms[DEV_SM_DAISY_LPTMR2_0] = SM_SCMI_PERM_ALL, \
 +        .daisyPerms[DEV_SM_DAISY_LPTMR2_1] = SM_SCMI_PERM_ALL, \
@ -1011,15 +1011,6 @@ index 000000000000..e1b81cc03f58
 +        .scmiInst = 1U, \
 +        .domId = 3U, \
 +        .secure = 1U, \
 +        .clkPerms[DEV_SM_CLK_A55C0_GPR_SEL] = SM_SCMI_PERM_ALL, \
 +        .clkPerms[DEV_SM_CLK_A55C1_GPR_SEL] = SM_SCMI_PERM_ALL, \
 +        .clkPerms[DEV_SM_CLK_A55C2_GPR_SEL] = SM_SCMI_PERM_ALL, \
 +        .clkPerms[DEV_SM_CLK_A55C3_GPR_SEL] = SM_SCMI_PERM_ALL, \
 +        .clkPerms[DEV_SM_CLK_A55C4_GPR_SEL] = SM_SCMI_PERM_ALL, \
 +        .clkPerms[DEV_SM_CLK_A55C5_GPR_SEL] = SM_SCMI_PERM_ALL, \
 +        .clkPerms[DEV_SM_CLK_A55PERIPH] = SM_SCMI_PERM_ALL, \
 +        .clkPerms[DEV_SM_CLK_A55P_GPR_SEL] = SM_SCMI_PERM_ALL, \
 +        .clkPerms[DEV_SM_CLK_A55] = SM_SCMI_PERM_ALL, \
 +        .clkPerms[DEV_SM_CLK_ARMPLL_PFD0] = SM_SCMI_PERM_ALL, \
 +        .clkPerms[DEV_SM_CLK_ARMPLL_PFD0_UNGATED] = SM_SCMI_PERM_ALL, \
 +        .clkPerms[DEV_SM_CLK_ARMPLL_PFD1] = SM_SCMI_PERM_ALL, \
@ -1107,7 +1098,6 @@ index 000000000000..e1b81cc03f58
 +        .clkPerms[DEV_SM_CLK_DISP1PIX] = SM_SCMI_PERM_ALL, \
 +        .clkPerms[DEV_SM_CLK_DISP2PIX] = SM_SCMI_PERM_ALL, \
 +        .clkPerms[DEV_SM_CLK_DISP3PIX] = SM_SCMI_PERM_ALL, \
 +        .clkPerms[DEV_SM_CLK_DISPOCRAM] = SM_SCMI_PERM_ALL, \
 +        .clkPerms[DEV_SM_CLK_ENETREF] = SM_SCMI_PERM_ALL, \
 +        .clkPerms[DEV_SM_CLK_ENETTIMER1] = SM_SCMI_PERM_ALL, \
 +        .clkPerms[DEV_SM_CLK_EXT1] = SM_SCMI_PERM_ALL, \
@ -1178,6 +1168,7 @@ index 000000000000..e1b81cc03f58
 +        .ctrlPerms[BRD_SM_CTRL_PCIE1_WAKE] = SM_SCMI_PERM_NOTIFY, \
 +        .ctrlPerms[BRD_SM_CTRL_PCIE2_WAKE] = SM_SCMI_PERM_NOTIFY, \
 +        .ctrlPerms[BRD_SM_CTRL_SD3_WAKE] = SM_SCMI_PERM_NOTIFY, \
 +        .ctrlPerms[BRD_SM_CTRL_TEST_A] = SM_SCMI_PERM_ALL, \
 +        .ctrlPerms[DEV_SM_CTRL_ADC_TEST] = SM_SCMI_PERM_ALL, \
 +        .ctrlPerms[DEV_SM_CTRL_MQS1_SETTINGS] = SM_SCMI_PERM_ALL, \
 +        .ctrlPerms[DEV_SM_CTRL_PDM_CLK_SEL] = SM_SCMI_PERM_ALL, \
@ -1723,10 +1714,10 @@ index 000000000000..7da4e43af886
 +
 diff --git a/configs/ccimx95dvk/config_test.h b/configs/ccimx95dvk/config_test.h
 new file mode 100644
-index 000000000000..cb737f33eede
+index 000000000000..e667d2d5bf36
 --- /dev/null
 +++ b/configs/ccimx95dvk/config_test.h
-@@ -0,0 +1,197 @@
+@@ -0,0 +1,199 @@
 +/*
 +** ###################################################################
 +**
@ -1872,15 +1863,15 @@ index 000000000000..cb737f33eede
 +/*--------------------------------------------------------------------------*/
 +
 +/*! Config for number of tests */
-+#define SM_SCMI_NUM_TEST  40U
+#define SM_SCMI_NUM_TEST  42U
 +
 +/*! Config data array for tests */
 +#define SM_SCMI_TEST_CONFIG_DATA \
 +    {.testId = TEST_BUTTON, .channel = 5U, .rsrc = DEV_SM_BUTTON_0}, \
 +    {.testId = TEST_CLK, .channel = 0U, .rsrc = DEV_SM_CLK_LPUART3}, \
 +    {.testId = TEST_CLK, .channel = 5U, .rsrc = DEV_SM_CLK_DISPOCRAM}, \
 +    {.testId = TEST_CLK, .channel = 5U, .rsrc = DEV_SM_CLK_ENETREF}, \
 +    {.testId = TEST_CLK, .channel = 5U, .rsrc = DEV_SM_CLK_ENETTIMER1}, \
 +    {.testId = TEST_CLK, .channel = 5U, .rsrc = DEV_SM_CLK_GPU_CGC}, \
 +    {.testId = TEST_CLK, .channel = 5U, .rsrc = DEV_SM_CLK_LPUART8}, \
 +    {.testId = TEST_CLK, .channel = 5U, .rsrc = DEV_SM_CLK_MQS1}, \
 +    {.testId = TEST_CLK, .channel = 5U, .rsrc = DEV_SM_CLK_SAI1}, \
@ -1903,12 +1894,14 @@ index 000000000000..cb737f33eede
 +    {.testId = TEST_PD, .channel = 5U, .rsrc = DEV_SM_PD_CAMERA}, \
 +    {.testId = TEST_PD, .channel = 5U, .rsrc = DEV_SM_PD_DISPLAY}, \
 +    {.testId = TEST_PD, .channel = 5U, .rsrc = DEV_SM_PD_GPU}, \
 +    {.testId = TEST_PD, .channel = 5U, .rsrc = DEV_SM_PD_GPU}, \
 +    {.testId = TEST_PD, .channel = 5U, .rsrc = DEV_SM_PD_HSIO_TOP}, \
 +    {.testId = TEST_PD, .channel = 5U, .rsrc = DEV_SM_PD_NPU}, \
 +    {.testId = TEST_PD, .channel = 5U, .rsrc = DEV_SM_PD_VPU}, \
 +    {.testId = TEST_PERF, .channel = 5U, .rsrc = DEV_SM_PERF_CAM}, \
 +    {.testId = TEST_PERF, .channel = 5U, .rsrc = DEV_SM_PERF_DISP}, \
 +    {.testId = TEST_PERF, .channel = 5U, .rsrc = DEV_SM_PERF_GPU}, \
 +    {.testId = TEST_PERF, .channel = 5U, .rsrc = DEV_SM_PERF_GPU}, \
 +    {.testId = TEST_PERF, .channel = 5U, .rsrc = DEV_SM_PERF_NPU}, \
 +    {.testId = TEST_PERF, .channel = 5U, .rsrc = DEV_SM_PERF_VPU}, \
 +    {.testId = TEST_PERLPI, .channel = 0U, .rsrc = DEV_SM_PERLPI_LPUART3}, \
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0003-ccimx95dvk-disable-PCAL6408A-expander-and-move-GPIO1.patch
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0003-ccimx95dvk-disable-PCAL6408A-expander-and-move-GPIO1.patch
@ -19,10 +19,10 @@ Signed-off-by: Javier Viguera <javier.viguera@digi.com>
 7 files changed, 5 insertions(+), 104 deletions(-)
 diff --git a/boards/ccimx95dvk/board.c b/boards/ccimx95dvk/board.c
-index d4a671f6d7f8..012a04540fd1 100755
+index c9b97b2a67d9..fe76d6e1a1a3 100755
 --- a/boards/ccimx95dvk/board.c
 +++ b/boards/ccimx95dvk/board.c
-@@ -337,9 +337,6 @@ void BOARD_InitHandlers(void)
+@@ -355,9 +355,6 @@ void BOARD_InitHandlers(void)
     /* Enable FCCU handler */
     NVIC_SetPriority(FCCU_INT0_IRQn, IRQ_PRIO_NOPREEMPT_CRITICAL);
     NVIC_EnableIRQ(FCCU_INT0_IRQn);
@ -32,7 +32,7 @@ index d4a671f6d7f8..012a04540fd1 100755
 }
 /*--------------------------------------------------------------------------*/
-@@ -509,10 +506,6 @@ void BOARD_SystemSleepPrepare(uint32_t sleepMode, uint32_t sleepFlags)
+@@ -539,10 +536,6 @@ void BOARD_SystemSleepPrepare(uint32_t sleepMode, uint32_t sleepFlags)
         (void) CPU_PerLpiConfigSet(CPU_IDX_M33P, s_uartConfig.perLpiId,
             CPU_PER_LPI_ON_RUN_WAIT_STOP);
     }
@ -44,7 +44,7 @@ index d4a671f6d7f8..012a04540fd1 100755
 /*--------------------------------------------------------------------------*/
 diff --git a/boards/ccimx95dvk/pin_mux.c b/boards/ccimx95dvk/pin_mux.c
-index 60f6d27c41c5..800126f3814b 100755
+index ff2b9540ea7a..6f5bb4a51c4c 100755
 --- a/boards/ccimx95dvk/pin_mux.c
 +++ b/boards/ccimx95dvk/pin_mux.c
@@ -57,9 +57,5 @@ void BOARD_InitPins(void)
@ -52,16 +52,16 @@ index 60f6d27c41c5..800126f3814b 100755
         | IOMUXC_PAD_FSEL1(0x3U) | IOMUXC_PAD_PU(0x1U) | IOMUXC_PAD_OD(0x1U));
 #endif
 -
-    /* Configure GPIO1-10 (INT from the PCAL6408A */
+-    /* Configure GPIO1-10 (INT from the PCAL6408A) */
 -    IOMUXC_SetPinMux(IOMUXC_PAD_PDM_BIT_STREAM1__GPIO1_IO_BIT10, 0U);
 -    IOMUXC_SetPinConfig(IOMUXC_PAD_PDM_BIT_STREAM1__GPIO1_IO_BIT10, 0U);
 }
 diff --git a/boards/ccimx95dvk/sm/brd_sm.c b/boards/ccimx95dvk/sm/brd_sm.c
-index cd48b590cd26..48a8486a2acd 100755
+index 36b4b52c6986..ae6c3195f0b2 100755
 --- a/boards/ccimx95dvk/sm/brd_sm.c
 +++ b/boards/ccimx95dvk/sm/brd_sm.c
-@@ -459,15 +459,6 @@ void BRD_SM_ShutdownRecordSave(dev_sm_rst_rec_t shutdownRec)
+@@ -458,15 +458,6 @@ void BRD_SM_ShutdownRecordSave(dev_sm_rst_rec_t shutdownRec)
 int32_t BRD_SM_SystemReset(void)
 {
     int32_t status = SM_ERR_SUCCESS;
@ -185,10 +185,10 @@ index a96f6ce0e2f4..19ee28e93134 100755
 /*--------------------------------------------------------------------------*/
 diff --git a/configs/ccimx95dvk.cfg b/configs/ccimx95dvk.cfg
-index da383aab036c..86d39e6e1fba 100755
+index 557bba3cecf2..cd6c5c4551c2 100755
 --- a/configs/ccimx95dvk.cfg
 +++ b/configs/ccimx95dvk.cfg
-@@ -197,7 +197,6 @@ ELE                 OWNER
+@@ -217,7 +217,6 @@ ELE                 OWNER
 FSB                 READONLY
 GIC                 ACCESS
 GPC                 OWNER
@ -196,7 +196,7 @@ index da383aab036c..86d39e6e1fba 100755
 GPR0                OWNER
 GPR1                OWNER
 GPR2                OWNER
-@@ -482,6 +481,7 @@ PERLPI_LPUART4      ALL
+@@ -503,6 +502,7 @@ PERLPI_LPUART4      ALL
 PERLPI_LPUART5      ALL
 PERLPI_LPUART6      ALL
 PERLPI_LPUART8      ALL
@ -204,7 +204,7 @@ index da383aab036c..86d39e6e1fba 100755
 PERLPI_WDOG3        ALL
 PERLPI_WDOG4        ALL
 SYS                 ALL
-@@ -715,6 +715,7 @@ FLEXIO2             OWNER
+@@ -737,6 +737,7 @@ FLEXIO2             OWNER
 FLEXSPI1            OWNER
 FSB                 READONLY
 GIC                 OWNER
@ -213,10 +213,10 @@ index da383aab036c..86d39e6e1fba 100755
 GPIO3               OWNER
 GPIO4               OWNER
 diff --git a/configs/ccimx95dvk/config_scmi.h b/configs/ccimx95dvk/config_scmi.h
-index e1b81cc03f58..c1cc90313174 100644
+index 7032a0efc948..edb2a17eaca1 100644
 --- a/configs/ccimx95dvk/config_scmi.h
 +++ b/configs/ccimx95dvk/config_scmi.h
-@@ -192,6 +192,7 @@
+@@ -183,6 +183,7 @@
         .perlpiPerms[DEV_SM_PERLPI_CAN3] = SM_SCMI_PERM_ALL, \
         .perlpiPerms[DEV_SM_PERLPI_CAN4] = SM_SCMI_PERM_ALL, \
         .perlpiPerms[DEV_SM_PERLPI_CAN5] = SM_SCMI_PERM_ALL, \
@ -224,7 +224,7 @@ index e1b81cc03f58..c1cc90313174 100644
         .perlpiPerms[DEV_SM_PERLPI_GPIO2] = SM_SCMI_PERM_ALL, \
         .perlpiPerms[DEV_SM_PERLPI_GPIO3] = SM_SCMI_PERM_ALL, \
         .perlpiPerms[DEV_SM_PERLPI_GPIO4] = SM_SCMI_PERM_ALL, \
-@@ -474,6 +475,7 @@
+@@ -465,6 +466,7 @@
         .perlpiPerms[DEV_SM_PERLPI_CAN3] = SM_SCMI_PERM_ALL, \
         .perlpiPerms[DEV_SM_PERLPI_CAN4] = SM_SCMI_PERM_ALL, \
         .perlpiPerms[DEV_SM_PERLPI_CAN5] = SM_SCMI_PERM_ALL, \
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0004-ccimx95dvk-move-resources-from-M7-to-A55.patch
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0004-ccimx95dvk-move-resources-from-M7-to-A55.patch
@ -18,10 +18,10 @@ Signed-off-by: Javier Viguera <javier.viguera@digi.com>
 4 files changed, 14 insertions(+), 22 deletions(-)
 diff --git a/configs/ccimx95dvk.cfg b/configs/ccimx95dvk.cfg
-index 86d39e6e1fba..393c29436894 100755
+index cd6c5c4551c2..49861f4545ae 100755
 --- a/configs/ccimx95dvk.cfg
 +++ b/configs/ccimx95dvk.cfg
-@@ -369,7 +369,6 @@ LPIT1               OWNER
+@@ -390,7 +390,6 @@ LPIT1               OWNER
 LPTMR1              OWNER
 LPTMR2              OWNER
 LPTPM1              OWNER
@ -29,7 +29,7 @@ index 86d39e6e1fba..393c29436894 100755
 MSGINTR1            OWNER
 MSGINTR2            OWNER
 MU5_A               OWNER
-@@ -382,11 +381,6 @@ TSTMR2              OWNER
+@@ -403,11 +402,6 @@ TSTMR2              OWNER
 V2X_SHE1            OWNER
 WDOG5               OWNER
@ -41,7 +41,7 @@ index 86d39e6e1fba..393c29436894 100755
 # Memory
 M7MIX               DATA, begin=0x020380000, end=0x02047FFFF
-@@ -477,6 +471,7 @@ PERLPI_GPIO4        ALL
+@@ -498,6 +492,7 @@ PERLPI_GPIO4        ALL
 PERLPI_GPIO5        ALL
 PERLPI_LPUART1      ALL
 PERLPI_LPUART2      ALL
@ -49,7 +49,7 @@ index 86d39e6e1fba..393c29436894 100755
 PERLPI_LPUART4      ALL
 PERLPI_LPUART5      ALL
 PERLPI_LPUART6      ALL
-@@ -762,6 +757,7 @@ LPTPM5              OWNER
+@@ -784,6 +779,7 @@ LPTPM5              OWNER
 LPTPM6              OWNER
 LPUART1             OWNER
 LPUART2             OWNER
@ -57,7 +57,7 @@ index 86d39e6e1fba..393c29436894 100755
 LPUART4             OWNER
 LPUART5             OWNER
 LPUART6             OWNER
-@@ -914,6 +910,8 @@ PIN_GPIO_IO10        OWNER
+@@ -936,6 +932,8 @@ PIN_GPIO_IO10        OWNER
 PIN_GPIO_IO11        OWNER
 PIN_GPIO_IO12        OWNER
 PIN_GPIO_IO13        OWNER
@ -66,13 +66,13 @@ index 86d39e6e1fba..393c29436894 100755
 PIN_GPIO_IO16        OWNER
 PIN_GPIO_IO17        OWNER
 PIN_GPIO_IO18        OWNER
-@@ -993,4 +991,3 @@ OCRAM               EXEC, begin=0x0204C0000, size=96K
+@@ -1015,4 +1013,3 @@ OCRAM               EXEC, begin=0x0204C0000, size=96K
 GPU                 DATA, begin=0x04D900000, end=0x04DD7FFFF
 DDR                 EXEC, begin=0x088000000, end=0x089FFFFFF
 DDR                 EXEC, begin=0x08E000000, end=0x87FFFFFFF
 -
 diff --git a/configs/ccimx95dvk/config_scmi.h b/configs/ccimx95dvk/config_scmi.h
-index c1cc90313174..0913c1339af0 100644
+index edb2a17eaca1..297806453ee1 100644
 --- a/configs/ccimx95dvk/config_scmi.h
 +++ b/configs/ccimx95dvk/config_scmi.h
@@ -69,7 +69,6 @@
@ -81,8 +81,8 @@ index c1cc90313174..0913c1339af0 100644
         .clkPerms[DEV_SM_CLK_LPTMR2] = SM_SCMI_PERM_ALL, \
 -        .clkPerms[DEV_SM_CLK_LPUART3] = SM_SCMI_PERM_ALL, \
         .clkPerms[DEV_SM_CLK_M7SYSTICK] = SM_SCMI_PERM_ALL, \
         .clkPerms[DEV_SM_CLK_M7] = SM_SCMI_PERM_ALL, \
         .clkPerms[DEV_SM_CLK_TSTMR2] = SM_SCMI_PERM_ALL, \
         .cpuPerms[DEV_SM_CPU_M7P] = SM_SCMI_PERM_ALL, \
@@ -81,9 +80,6 @@
         .daisyPerms[DEV_SM_DAISY_LPTMR2_0] = SM_SCMI_PERM_ALL, \
         .daisyPerms[DEV_SM_DAISY_LPTMR2_1] = SM_SCMI_PERM_ALL, \
@ -104,7 +104,7 @@ index c1cc90313174..0913c1339af0 100644
         .rtcPerms[BRD_SM_RTC_PCA2131] = SM_SCMI_PERM_ALL, \
         .rtcPerms[DEV_SM_RTC_BBNSM] = SM_SCMI_PERM_PRIV, \
         .sensorPerms[BRD_SM_SENSOR_TEMP_PF09] = SM_SCMI_PERM_SET, \
-@@ -199,6 +192,7 @@
+@@ -190,6 +183,7 @@
         .perlpiPerms[DEV_SM_PERLPI_GPIO5] = SM_SCMI_PERM_ALL, \
         .perlpiPerms[DEV_SM_PERLPI_LPUART1] = SM_SCMI_PERM_ALL, \
         .perlpiPerms[DEV_SM_PERLPI_LPUART2] = SM_SCMI_PERM_ALL, \
@ -112,7 +112,7 @@ index c1cc90313174..0913c1339af0 100644
         .perlpiPerms[DEV_SM_PERLPI_LPUART4] = SM_SCMI_PERM_ALL, \
         .perlpiPerms[DEV_SM_PERLPI_LPUART5] = SM_SCMI_PERM_ALL, \
         .perlpiPerms[DEV_SM_PERLPI_LPUART6] = SM_SCMI_PERM_ALL, \
-@@ -291,6 +285,7 @@
+@@ -281,6 +275,7 @@
         .clkPerms[DEV_SM_CLK_LPSPI8] = SM_SCMI_PERM_ALL, \
         .clkPerms[DEV_SM_CLK_LPUART1] = SM_SCMI_PERM_ALL, \
         .clkPerms[DEV_SM_CLK_LPUART2] = SM_SCMI_PERM_ALL, \
@ -120,7 +120,7 @@ index c1cc90313174..0913c1339af0 100644
         .clkPerms[DEV_SM_CLK_LPUART4] = SM_SCMI_PERM_ALL, \
         .clkPerms[DEV_SM_CLK_LPUART5] = SM_SCMI_PERM_ALL, \
         .clkPerms[DEV_SM_CLK_LPUART6] = SM_SCMI_PERM_ALL, \
-@@ -398,6 +393,9 @@
+@@ -389,6 +384,9 @@
         .daisyPerms[DEV_SM_DAISY_LPSPI4_SCK] = SM_SCMI_PERM_ALL, \
         .daisyPerms[DEV_SM_DAISY_LPSPI4_SDI] = SM_SCMI_PERM_ALL, \
         .daisyPerms[DEV_SM_DAISY_LPSPI4_SDO] = SM_SCMI_PERM_ALL, \
@ -130,7 +130,7 @@ index c1cc90313174..0913c1339af0 100644
         .daisyPerms[DEV_SM_DAISY_LPUART4_CTS] = SM_SCMI_PERM_ALL, \
         .daisyPerms[DEV_SM_DAISY_LPUART4_RXD] = SM_SCMI_PERM_ALL, \
         .daisyPerms[DEV_SM_DAISY_LPUART4_TXD] = SM_SCMI_PERM_ALL, \
-@@ -482,6 +480,7 @@
+@@ -473,6 +471,7 @@
         .perlpiPerms[DEV_SM_PERLPI_GPIO5] = SM_SCMI_PERM_ALL, \
         .perlpiPerms[DEV_SM_PERLPI_LPUART1] = SM_SCMI_PERM_ALL, \
         .perlpiPerms[DEV_SM_PERLPI_LPUART2] = SM_SCMI_PERM_ALL, \
@ -138,7 +138,7 @@ index c1cc90313174..0913c1339af0 100644
         .perlpiPerms[DEV_SM_PERLPI_LPUART4] = SM_SCMI_PERM_ALL, \
         .perlpiPerms[DEV_SM_PERLPI_LPUART5] = SM_SCMI_PERM_ALL, \
         .perlpiPerms[DEV_SM_PERLPI_LPUART6] = SM_SCMI_PERM_ALL, \
-@@ -536,6 +535,8 @@
+@@ -527,6 +526,8 @@
         .pinPerms[DEV_SM_PIN_GPIO_IO11] = SM_SCMI_PERM_ALL, \
         .pinPerms[DEV_SM_PIN_GPIO_IO12] = SM_SCMI_PERM_ALL, \
         .pinPerms[DEV_SM_PIN_GPIO_IO13] = SM_SCMI_PERM_ALL, \
@ -148,23 +148,23 @@ index c1cc90313174..0913c1339af0 100644
         .pinPerms[DEV_SM_PIN_GPIO_IO17] = SM_SCMI_PERM_ALL, \
         .pinPerms[DEV_SM_PIN_GPIO_IO18] = SM_SCMI_PERM_ALL, \
 diff --git a/configs/ccimx95dvk/config_test.h b/configs/ccimx95dvk/config_test.h
-index cb737f33eede..efc15c56ffe9 100644
+index e667d2d5bf36..eed7c5a3d9b8 100644
 --- a/configs/ccimx95dvk/config_test.h
 +++ b/configs/ccimx95dvk/config_test.h
@@ -143,12 +143,11 @@
 /*--------------------------------------------------------------------------*/
 /*! Config for number of tests */
-#define SM_SCMI_NUM_TEST  40U
+-#define SM_SCMI_NUM_TEST  42U
-+#define SM_SCMI_NUM_TEST  35U
+#define SM_SCMI_NUM_TEST  37U
 /*! Config data array for tests */
 #define SM_SCMI_TEST_CONFIG_DATA \
     {.testId = TEST_BUTTON, .channel = 5U, .rsrc = DEV_SM_BUTTON_0}, \
 -    {.testId = TEST_CLK, .channel = 0U, .rsrc = DEV_SM_CLK_LPUART3}, \
     {.testId = TEST_CLK, .channel = 5U, .rsrc = DEV_SM_CLK_DISPOCRAM}, \
     {.testId = TEST_CLK, .channel = 5U, .rsrc = DEV_SM_CLK_ENETREF}, \
     {.testId = TEST_CLK, .channel = 5U, .rsrc = DEV_SM_CLK_ENETTIMER1}, \
     {.testId = TEST_CLK, .channel = 5U, .rsrc = DEV_SM_CLK_GPU_CGC}, \
@@ -157,9 +156,6 @@
     {.testId = TEST_CLK, .channel = 5U, .rsrc = DEV_SM_CLK_SAI1}, \
     {.testId = TEST_CTRL, .channel = 5U, .rsrc = DEV_SM_CTRL_MQS1_SETTINGS}, \
@ -175,7 +175,7 @@ index cb737f33eede..efc15c56ffe9 100644
     {.testId = TEST_DAISY, .channel = 5U, .rsrc = DEV_SM_DAISY_NETC_EMDC}, \
     {.testId = TEST_DAISY, .channel = 5U, .rsrc = DEV_SM_DAISY_NETC_EMDIO}, \
     {.testId = TEST_DAISY, .channel = 5U, .rsrc = DEV_SM_DAISY_NETC_ETH0_RMII_RX_ER}, \
-@@ -182,7 +178,6 @@
+@@ -184,7 +180,6 @@
     {.testId = TEST_PERF, .channel = 5U, .rsrc = DEV_SM_PERF_GPU}, \
     {.testId = TEST_PERF, .channel = 5U, .rsrc = DEV_SM_PERF_NPU}, \
     {.testId = TEST_PERF, .channel = 5U, .rsrc = DEV_SM_PERF_VPU}, \
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0005-ccimx95dvk-move-pads-to-non-secure-A55.patch
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0005-ccimx95dvk-move-pads-to-non-secure-A55.patch
@ -16,7 +16,7 @@ Signed-off-by: Hector Palacios <hector.palacios@digi.com>
 2 files changed, 7 insertions(+), 1 deletion(-)
 diff --git a/configs/ccimx95dvk.cfg b/configs/ccimx95dvk.cfg
-index 393c29436894..bf5f0739f526 100755
+index 49861f4545ae..78fad32b4513 100755
 --- a/configs/ccimx95dvk.cfg
 +++ b/configs/ccimx95dvk.cfg
@@ -1,6 +1,7 @@
@ -27,7 +27,7 @@ index 393c29436894..bf5f0739f526 100755
 ##
 ## Redistribution and use in source and binary forms, with or without modification,
 ## are permitted provided that the following conditions are met:
-@@ -285,7 +286,6 @@ L_STCU_NPUMIX       OWNER
+@@ -305,7 +306,6 @@ L_STCU_NPUMIX       OWNER
 PIN_FCCU_ERR0         OWNER
 PIN_I2C1_SCL          OWNER
 PIN_I2C1_SDA          OWNER
@ -35,7 +35,7 @@ index 393c29436894..bf5f0739f526 100755
 PIN_GPIO_IO08         OWNER  # LPUART7_TX
 PIN_GPIO_IO09         OWNER  # LPUART7_RX
 PIN_WDOG_ANY          OWNER
-@@ -937,6 +937,7 @@ PIN_GPIO_IO37        OWNER
+@@ -959,6 +959,7 @@ PIN_GPIO_IO37        OWNER
 PIN_I2C2_SCL         OWNER
 PIN_I2C2_SDA         OWNER
 PIN_PDM_BIT_STREAM0  OWNER
@ -43,7 +43,7 @@ index 393c29436894..bf5f0739f526 100755
 PIN_PDM_CLK          OWNER
 PIN_SAI1_RXD0        OWNER
 PIN_SAI1_TXC         OWNER
-@@ -970,6 +971,8 @@ PIN_SD3_DATA2        OWNER
+@@ -992,6 +993,8 @@ PIN_SD3_DATA2        OWNER
 PIN_SD3_DATA3        OWNER
 PIN_UART1_RXD        OWNER, test
 PIN_UART1_TXD        OWNER
@ -53,10 +53,10 @@ index 393c29436894..bf5f0739f526 100755
 PIN_XSPI1_DATA1      OWNER
 PIN_XSPI1_DATA2      OWNER
 diff --git a/configs/ccimx95dvk/config_scmi.h b/configs/ccimx95dvk/config_scmi.h
-index 0913c1339af0..510de3d252a2 100644
+index 297806453ee1..3d4b9cad69ad 100644
 --- a/configs/ccimx95dvk/config_scmi.h
 +++ b/configs/ccimx95dvk/config_scmi.h
-@@ -562,6 +562,7 @@
+@@ -553,6 +553,7 @@
         .pinPerms[DEV_SM_PIN_I2C2_SCL] = SM_SCMI_PERM_ALL, \
         .pinPerms[DEV_SM_PIN_I2C2_SDA] = SM_SCMI_PERM_ALL, \
         .pinPerms[DEV_SM_PIN_PDM_BIT_STREAM0] = SM_SCMI_PERM_ALL, \
@ -64,7 +64,7 @@ index 0913c1339af0..510de3d252a2 100644
         .pinPerms[DEV_SM_PIN_PDM_CLK] = SM_SCMI_PERM_ALL, \
         .pinPerms[DEV_SM_PIN_SAI1_RXD0] = SM_SCMI_PERM_ALL, \
         .pinPerms[DEV_SM_PIN_SAI1_TXC] = SM_SCMI_PERM_ALL, \
-@@ -595,6 +596,8 @@
+@@ -586,6 +587,8 @@
         .pinPerms[DEV_SM_PIN_SD3_DATA3] = SM_SCMI_PERM_ALL, \
         .pinPerms[DEV_SM_PIN_UART1_RXD] = SM_SCMI_PERM_ALL, \
         .pinPerms[DEV_SM_PIN_UART1_TXD] = SM_SCMI_PERM_ALL, \
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0006-ccimx95dvk-move-CAN1-to-be-used-by-A55.patch
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0006-ccimx95dvk-move-CAN1-to-be-used-by-A55.patch
@ -16,10 +16,10 @@ Signed-off-by: Hector Palacios <hector.palacios@digi.com>
 4 files changed, 14 insertions(+), 13 deletions(-)
 diff --git a/configs/ccimx95dvk.cfg b/configs/ccimx95dvk.cfg
-index bf5f0739f526..afec8eb5b738 100755
+index 78fad32b4513..c1374d4684a9 100755
 --- a/configs/ccimx95dvk.cfg
 +++ b/configs/ccimx95dvk.cfg
-@@ -362,7 +362,6 @@ SYS                       ALL
+@@ -383,7 +383,6 @@ SYS                       ALL
 # Resources
 M7P                 OWNER  # CPUs must be first
@ -27,7 +27,7 @@ index bf5f0739f526..afec8eb5b738 100755
 FSB                 READONLY
 IRQSTEER_M7         OWNER
 LPIT1               OWNER
-@@ -461,6 +460,7 @@ CHANNEL             db=1, xport=smt, rpc=scmi, type=p2a_notify
+@@ -482,6 +481,7 @@ CHANNEL             db=1, xport=smt, rpc=scmi, type=p2a_notify
 PERF_A55            ALL
 PERF_DRAM           ALL
@ -35,7 +35,7 @@ index bf5f0739f526..afec8eb5b738 100755
 PERLPI_CAN2         ALL
 PERLPI_CAN3         ALL
 PERLPI_CAN4         ALL
-@@ -582,6 +582,7 @@ CAMERA5             OWNER
+@@ -604,6 +604,7 @@ CAMERA5             OWNER
 CAMERA6             OWNER
 CAMERA7             OWNER
 CAMERA8             OWNER
@ -69,7 +69,7 @@ index a757834c32ab..a55abe03ec02 100644
     }
 diff --git a/configs/ccimx95dvk/config_scmi.h b/configs/ccimx95dvk/config_scmi.h
-index 510de3d252a2..36cbb06126fe 100644
+index 3d4b9cad69ad..45114d0002f4 100644
 --- a/configs/ccimx95dvk/config_scmi.h
 +++ b/configs/ccimx95dvk/config_scmi.h
@@ -66,7 +66,6 @@
@ -81,9 +81,9 @@ index 510de3d252a2..36cbb06126fe 100644
         .clkPerms[DEV_SM_CLK_LPTMR2] = SM_SCMI_PERM_ALL, \
         .clkPerms[DEV_SM_CLK_M7SYSTICK] = SM_SCMI_PERM_ALL, \
@@ -76,7 +75,6 @@
         .ctrlPerms[BRD_SM_CTRL_BUTTON] = SM_SCMI_PERM_NOTIFY, \
         .ctrlPerms[BRD_SM_CTRL_PCA2131] = SM_SCMI_PERM_ALL, \
         .ctrlPerms[BRD_SM_CTRL_TEST] = SM_SCMI_PERM_ALL, \
         .ctrlPerms[BRD_SM_CTRL_TEST_A] = SM_SCMI_PERM_ALL, \
 -        .daisyPerms[DEV_SM_DAISY_CAN1_RX] = SM_SCMI_PERM_ALL, \
         .daisyPerms[DEV_SM_DAISY_LPTMR2_0] = SM_SCMI_PERM_ALL, \
         .daisyPerms[DEV_SM_DAISY_LPTMR2_1] = SM_SCMI_PERM_ALL, \
@ -96,7 +96,7 @@ index 510de3d252a2..36cbb06126fe 100644
         .perlpiPerms[DEV_SM_PERLPI_WDOG5] = SM_SCMI_PERM_ALL, \
         .rtcPerms[BRD_SM_RTC_PCA2131] = SM_SCMI_PERM_ALL, \
         .rtcPerms[DEV_SM_RTC_BBNSM] = SM_SCMI_PERM_PRIV, \
-@@ -181,6 +178,7 @@
+@@ -172,6 +169,7 @@
         .pdPerms[DEV_SM_PD_A55P] = SM_SCMI_PERM_ALL, \
         .perfPerms[DEV_SM_PERF_A55] = SM_SCMI_PERM_ALL, \
         .perfPerms[DEV_SM_PERF_DRAM] = SM_SCMI_PERM_ALL, \
@ -104,7 +104,7 @@ index 510de3d252a2..36cbb06126fe 100644
         .perlpiPerms[DEV_SM_PERLPI_CAN2] = SM_SCMI_PERM_ALL, \
         .perlpiPerms[DEV_SM_PERLPI_CAN3] = SM_SCMI_PERM_ALL, \
         .perlpiPerms[DEV_SM_PERLPI_CAN4] = SM_SCMI_PERM_ALL, \
-@@ -237,6 +235,7 @@
+@@ -228,6 +226,7 @@
         .clkPerms[DEV_SM_CLK_AUDIOPLL2] = SM_SCMI_PERM_ALL, \
         .clkPerms[DEV_SM_CLK_AUDIOPLL2_VCO] = SM_SCMI_PERM_ALL, \
         .clkPerms[DEV_SM_CLK_AUDIOXCVR] = SM_SCMI_PERM_ALL, \
@ -112,7 +112,7 @@ index 510de3d252a2..36cbb06126fe 100644
         .clkPerms[DEV_SM_CLK_CAN2] = SM_SCMI_PERM_ALL, \
         .clkPerms[DEV_SM_CLK_CAN3] = SM_SCMI_PERM_ALL, \
         .clkPerms[DEV_SM_CLK_CAN4] = SM_SCMI_PERM_ALL, \
-@@ -327,6 +326,7 @@
+@@ -318,6 +317,7 @@
         .ctrlPerms[DEV_SM_CTRL_SAI3_MCLK] = SM_SCMI_PERM_ALL, \
         .ctrlPerms[DEV_SM_CTRL_SAI4_MCLK] = SM_SCMI_PERM_ALL, \
         .ctrlPerms[DEV_SM_CTRL_SAI5_MCLK] = SM_SCMI_PERM_ALL, \
@ -120,7 +120,7 @@ index 510de3d252a2..36cbb06126fe 100644
         .daisyPerms[DEV_SM_DAISY_CAN2_RX] = SM_SCMI_PERM_ALL, \
         .daisyPerms[DEV_SM_DAISY_CAN3_RX] = SM_SCMI_PERM_ALL, \
         .daisyPerms[DEV_SM_DAISY_CAN4_RX] = SM_SCMI_PERM_ALL, \
-@@ -469,6 +469,7 @@
+@@ -460,6 +460,7 @@
         .perfPerms[DEV_SM_PERF_GPU] = SM_SCMI_PERM_ALL, \
         .perfPerms[DEV_SM_PERF_NPU] = SM_SCMI_PERM_ALL, \
         .perfPerms[DEV_SM_PERF_VPU] = SM_SCMI_PERM_ALL, \
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0007-ccimx95dvk-remove-PCAL6408A-IO-expander-from-EVK.patch
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0007-ccimx95dvk-remove-PCAL6408A-IO-expander-from-EVK.patch
@ -1,26 +1,28 @@
 From: Hector Palacios <hector.palacios@digi.com>
 Date: Thu, 25 Sep 2025 11:11:20 +0200
-Subject: [PATCH 7/8] ccimx95dvk: remove PCAL6408A IO expander from EVK
+Subject: [PATCH] ccimx95dvk: remove PCAL6408A IO expander from EVK
 NXP used this I2C IO expander on their EVK to process
 wakeup interrupt lines.
 This chip is not available on the DVK.
 Upstream-Status: Inappropriate [DEY specific]
 Signed-off-by: Hector Palacios <hector.palacios@digi.com>
 ---
 boards/ccimx95dvk/board.c              |  1 +
 boards/ccimx95dvk/sm/Makefile          |  4 +-
 boards/ccimx95dvk/sm/brd_sm_bbm.c      |  5 +-
 boards/ccimx95dvk/sm/brd_sm_control.c  | 96 +-------------------------
- boards/ccimx95dvk/sm/brd_sm_control.h  | 12 ++--
+ boards/ccimx95dvk/sm/brd_sm_control.h  | 14 ++--
 boards/ccimx95dvk/sm/brd_sm_handlers.c | 36 +---------
 boards/ccimx95dvk/sm/brd_sm_handlers.h | 21 +-----
 configs/ccimx95dvk.cfg                 |  6 --
 configs/ccimx95dvk/config_scmi.h       |  6 --
- 9 files changed, 12 insertions(+), 175 deletions(-)
+ 9 files changed, 13 insertions(+), 176 deletions(-)
 diff --git a/boards/ccimx95dvk/board.c b/boards/ccimx95dvk/board.c
-index 012a04540fd1..1f3c8cd3fdb9 100755
+index fe76d6e1a1a3..2cc8f826b781 100755
 --- a/boards/ccimx95dvk/board.c
 +++ b/boards/ccimx95dvk/board.c
@@ -1,5 +1,6 @@
@ -67,7 +69,7 @@ index d5b576737636..db27ea922733 100755
 	$(OUT)/fsl_pf53.o  \
 	$(OUT)/fsl_pca2131.o
 diff --git a/boards/ccimx95dvk/sm/brd_sm_bbm.c b/boards/ccimx95dvk/sm/brd_sm_bbm.c
-index c2e5cd61dc9f..2b13931c7749 100755
+index 6103583ff69d..2c5cc953b1e2 100755
 --- a/boards/ccimx95dvk/sm/brd_sm_bbm.c
 +++ b/boards/ccimx95dvk/sm/brd_sm_bbm.c
@@ -2,6 +2,7 @@
@ -78,7 +80,7 @@ index c2e5cd61dc9f..2b13931c7749 100755
 **
 ** Redistribution and use in source and binary forms, with or without modification,
 ** are permitted provided that the following conditions are met:
-@@ -415,8 +416,6 @@ int32_t BRD_SM_BbmRtcAlarmSet(uint32_t rtcId, bool enable, uint64_t val)
+@@ -432,8 +433,6 @@ int32_t BRD_SM_BbmRtcAlarmSet(uint32_t rtcId, bool enable, uint64_t val)
                     /* Enable interrupt */
                     if (PCA2131_IntEnable(&g_pca2131Dev, true))
                     {
@ -87,7 +89,7 @@ index c2e5cd61dc9f..2b13931c7749 100755
                     }
                     else
                     {
-@@ -440,8 +439,6 @@ int32_t BRD_SM_BbmRtcAlarmSet(uint32_t rtcId, bool enable, uint64_t val)
+@@ -457,8 +456,6 @@ int32_t BRD_SM_BbmRtcAlarmSet(uint32_t rtcId, bool enable, uint64_t val)
             /* Disable interrupt */
             if (PCA2131_IntEnable(&g_pca2131Dev, false))
             {
@ -97,13 +99,13 @@ index c2e5cd61dc9f..2b13931c7749 100755
             else
             {
 diff --git a/boards/ccimx95dvk/sm/brd_sm_control.c b/boards/ccimx95dvk/sm/brd_sm_control.c
-index 5b36c66c593c..8484a6895a3d 100755
+index fde28d939fca..76de9fad9e86 100755
 --- a/boards/ccimx95dvk/sm/brd_sm_control.c
 +++ b/boards/ccimx95dvk/sm/brd_sm_control.c
@@ -2,6 +2,7 @@
 ** ###################################################################
 **
- **     Copyright 2023-2024 NXP
+ **     Copyright 2023-2025 NXP
 +**     Copyright 2025 Digi International Inc.
 **
 **     Redistribution and use in source and binary forms, with or without modification,
@ -122,9 +124,9 @@ index 5b36c66c593c..8484a6895a3d 100755
 /* Local types */
 /* Local variables */
-@@ -117,26 +111,7 @@ int32_t BRD_SM_ControlGet(uint32_t ctrlId, uint32_t *numRtn, uint32_t *rtn)
+@@ -105,26 +99,7 @@ int32_t BRD_SM_ControlGet(uint32_t ctrlId, uint32_t *numRtn, uint32_t *rtn)
         }
-         else
+         else if (ctrlId < BRD_SM_CTRL_TEST)
         {
 -            uint8_t data;
 -
@ -148,9 +150,9 @@ index 5b36c66c593c..8484a6895a3d 100755
 -            }
 +            status = SM_ERR_HARDWARE_ERROR;
         }
-     }
+         else
-     else
+         {
-@@ -231,41 +206,12 @@ int32_t BRD_SM_ControlFlagsSet(uint32_t ctrlId, uint32_t flags)
+@@ -270,41 +245,12 @@ int32_t BRD_SM_ControlFlagsSet(uint32_t ctrlId, uint32_t flags)
     }
     else
     {
@ -192,7 +194,7 @@ index 5b36c66c593c..8484a6895a3d 100755
     }
     return status;
-@@ -276,42 +222,6 @@ int32_t BRD_SM_ControlFlagsSet(uint32_t ctrlId, uint32_t flags)
+@@ -315,42 +261,6 @@ int32_t BRD_SM_ControlFlagsSet(uint32_t ctrlId, uint32_t flags)
 /*--------------------------------------------------------------------------*/
 void BRD_SM_ControlHandler(uint8_t status, uint8_t val)
 {
@ -237,27 +239,27 @@ index 5b36c66c593c..8484a6895a3d 100755
 }
 diff --git a/boards/ccimx95dvk/sm/brd_sm_control.h b/boards/ccimx95dvk/sm/brd_sm_control.h
-index bf893782e1d7..12365e56d7e4 100755
+index 30ad8e67eb6f..9c61bce72f8e 100755
 --- a/boards/ccimx95dvk/sm/brd_sm_control.h
 +++ b/boards/ccimx95dvk/sm/brd_sm_control.h
@@ -2,6 +2,7 @@
 ** ###################################################################
 **
- **     Copyright 2023-2024 NXP
+ **     Copyright 2023-2025 NXP
 +**     Copyright 2025 Digi International Inc.
 **
 **     Redistribution and use in source and binary forms, with or without modification,
 **     are permitted provided that the following conditions are met:
-@@ -66,7 +67,7 @@
+@@ -67,7 +68,7 @@
 /** @} */
 /*! Number of board controls */
-#define BRD_SM_NUM_CTRL  7UL
+-#define BRD_SM_NUM_CTRL  8UL
-+#define BRD_SM_NUM_CTRL  2UL
+#define BRD_SM_NUM_CTRL  3UL
 /*! Total number of controls */
 #define SM_NUM_CTRL  (DEV_SM_NUM_CTRL + BRD_SM_NUM_CTRL)
-@@ -75,13 +76,8 @@
+@@ -76,14 +77,9 @@
  * @name BRD_SM control domain indexes
  */
 /** @{ */
@ -268,8 +270,10 @@ index bf893782e1d7..12365e56d7e4 100755
 -#define BRD_SM_CTRL_BUTTON      (DEV_SM_NUM_CTRL + 4U)  /*!< PCAL6408A-7 */
 -#define BRD_SM_CTRL_TEST        (DEV_SM_NUM_CTRL + 5U)  /*!< Test */
 -#define BRD_SM_CTRL_PCA2131     (DEV_SM_NUM_CTRL + 6U)  /*!< PCA2131 raw access */
 -#define BRD_SM_CTRL_TEST_A      (DEV_SM_NUM_CTRL + 7U)  /*!< Test action */
 +#define BRD_SM_CTRL_TEST        (DEV_SM_NUM_CTRL + 0U)  /*!< Test */
 +#define BRD_SM_CTRL_PCA2131     (DEV_SM_NUM_CTRL + 1U)  /*!< PCA2131 raw access */
 +#define BRD_SM_CTRL_TEST_A      (DEV_SM_NUM_CTRL + 2U)  /*!< Test action */
 /** @} */
 /* Types */
@ -404,18 +408,18 @@ index e34d52b50f7a..781a443e8444 100755
  * GPIO 1 interrupt 0 handler.
  */
 diff --git a/configs/ccimx95dvk.cfg b/configs/ccimx95dvk.cfg
-index afec8eb5b738..4af5cea789d9 100755
+index c1374d4684a9..c3c280d275b0 100755
 --- a/configs/ccimx95dvk.cfg
 +++ b/configs/ccimx95dvk.cfg
-@@ -345,7 +345,6 @@ CHANNEL             db=2, xport=smt, check=crc32, rpc=scmi, \
+@@ -365,7 +365,6 @@ CHANNEL             db=2, xport=smt, check=crc32, rpc=scmi, \
 # API
 -BRD_SM_CTRL_BUTTON        NOTIFY
 BRD_SM_CTRL_PCA2131       ALL
 BRD_SM_CTRL_TEST          ALL
- BRD_SM_RTC_PCA2131        ALL
+ BRD_SM_CTRL_TEST_A        ALL
-@@ -532,11 +531,6 @@ CHANNEL             db=1, xport=smt, rpc=scmi, type=p2a_notify
+@@ -553,11 +552,6 @@ CHANNEL             db=1, xport=smt, rpc=scmi, type=p2a_notify
 AUDIO_PLL1                ALL
 AUDIO_PLL2                ALL
@ -424,22 +428,22 @@ index afec8eb5b738..4af5cea789d9 100755
 -BRD_SM_CTRL_PCIE1_WAKE    NOTIFY
 -BRD_SM_CTRL_PCIE2_WAKE    NOTIFY
 -BRD_SM_CTRL_SD3_WAKE      NOTIFY
 BRD_SM_CTRL_TEST_A        ALL
 BRD_SM_RTC_PCA2131        PRIV
 BRD_SM_SENSOR_TEMP_PF09   ALL
 BRD_SM_SENSOR_TEMP_PF5301 SET
 diff --git a/configs/ccimx95dvk/config_scmi.h b/configs/ccimx95dvk/config_scmi.h
-index 36cbb06126fe..d251f7910b39 100644
+index 45114d0002f4..83d7bd94bcd1 100644
 --- a/configs/ccimx95dvk/config_scmi.h
 +++ b/configs/ccimx95dvk/config_scmi.h
-@@ -72,7 +72,6 @@
+@@ -71,7 +71,6 @@
-         .clkPerms[DEV_SM_CLK_M7] = SM_SCMI_PERM_ALL, \
+         .clkPerms[DEV_SM_CLK_M7SYSTICK] = SM_SCMI_PERM_ALL, \
         .clkPerms[DEV_SM_CLK_TSTMR2] = SM_SCMI_PERM_ALL, \
         .cpuPerms[DEV_SM_CPU_M7P] = SM_SCMI_PERM_ALL, \
 -        .ctrlPerms[BRD_SM_CTRL_BUTTON] = SM_SCMI_PERM_NOTIFY, \
         .ctrlPerms[BRD_SM_CTRL_PCA2131] = SM_SCMI_PERM_ALL, \
         .ctrlPerms[BRD_SM_CTRL_TEST] = SM_SCMI_PERM_ALL, \
-         .daisyPerms[DEV_SM_DAISY_LPTMR2_0] = SM_SCMI_PERM_ALL, \
+         .ctrlPerms[BRD_SM_CTRL_TEST_A] = SM_SCMI_PERM_ALL, \
-@@ -314,11 +313,6 @@
+@@ -304,11 +303,6 @@
         .clkPerms[DEV_SM_CLK_VIDEOPLL1_VCO] = SM_SCMI_PERM_ALL, \
         .clkPerms[DEV_SM_CLK_VPUDSP] = SM_SCMI_PERM_ALL, \
         .clkPerms[DEV_SM_CLK_XSPISLVROOT] = SM_SCMI_PERM_ALL, \
@ -448,6 +452,6 @@ index 36cbb06126fe..d251f7910b39 100644
 -        .ctrlPerms[BRD_SM_CTRL_PCIE1_WAKE] = SM_SCMI_PERM_NOTIFY, \
 -        .ctrlPerms[BRD_SM_CTRL_PCIE2_WAKE] = SM_SCMI_PERM_NOTIFY, \
 -        .ctrlPerms[BRD_SM_CTRL_SD3_WAKE] = SM_SCMI_PERM_NOTIFY, \
         .ctrlPerms[BRD_SM_CTRL_TEST_A] = SM_SCMI_PERM_ALL, \
         .ctrlPerms[DEV_SM_CTRL_ADC_TEST] = SM_SCMI_PERM_ALL, \
         .ctrlPerms[DEV_SM_CTRL_MQS1_SETTINGS] = SM_SCMI_PERM_ALL, \
         .ctrlPerms[DEV_SM_CTRL_PDM_CLK_SEL] = SM_SCMI_PERM_ALL, \
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0008-ccimx95dvk-remove-PCA2123-RTC-from-EVK.patch
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0008-ccimx95dvk-remove-PCA2123-RTC-from-EVK.patch
@ -1,23 +1,25 @@
 From: Hector Palacios <hector.palacios@digi.com>
 Date: Thu, 25 Sep 2025 11:41:51 +0200
-Subject: [PATCH 8/8] ccimx95dvk: remove PCA2123 RTC from EVK
+Subject: [PATCH] ccimx95dvk: remove PCA2123 RTC from EVK
 NXP used this external RTC on its 15x15 EVK.
 This chip is not present on the DVK.
 Upstream-Status: Inappropriate [DEY specific]
 Signed-off-by: Hector Palacios <hector.palacios@digi.com>
 ---
 boards/ccimx95dvk/sm/Makefile          |  11 +-
 boards/ccimx95dvk/sm/brd_sm.h          |   2 +-
- boards/ccimx95dvk/sm/brd_sm_bbm.c      | 671 -------------------------
+ boards/ccimx95dvk/sm/brd_sm_bbm.c      | 718 -------------------------
 boards/ccimx95dvk/sm/brd_sm_bbm.h      | 242 ---------
- boards/ccimx95dvk/sm/brd_sm_control.c  |  15 +-
+ boards/ccimx95dvk/sm/brd_sm_control.c  |   8 -
- boards/ccimx95dvk/sm/brd_sm_control.h  |   3 +-
+ boards/ccimx95dvk/sm/brd_sm_control.h  |   5 +-
 boards/ccimx95dvk/sm/brd_sm_handlers.c |  17 -
 boards/ccimx95dvk/sm/brd_sm_handlers.h |   7 -
 configs/ccimx95dvk.cfg                 |   3 -
 configs/ccimx95dvk/config_scmi.h       |   3 -
- 10 files changed, 6 insertions(+), 968 deletions(-)
+ 10 files changed, 6 insertions(+), 1010 deletions(-)
 delete mode 100755 boards/ccimx95dvk/sm/brd_sm_bbm.c
 delete mode 100755 boards/ccimx95dvk/sm/brd_sm_bbm.h
@ -77,10 +79,10 @@ index ce758e1e4c64..0c8050646fba 100755
 diff --git a/boards/ccimx95dvk/sm/brd_sm_bbm.c b/boards/ccimx95dvk/sm/brd_sm_bbm.c
 deleted file mode 100755
-index 2b13931c7749..000000000000
+index 2c5cc953b1e2..000000000000
 --- a/boards/ccimx95dvk/sm/brd_sm_bbm.c
 +++ /dev/null
-@@ -1,671 +0,0 @@
+@@ -1,718 +0,0 @@
 -/*
 -** ###################################################################
 -**
@ -140,7 +142,7 @@ index 2b13931c7749..000000000000
 -
 -static bool days2date(uint32_t days, uint32_t *year, uint32_t *month,
 -    uint32_t *day, uint32_t *weekday);
-static void date2days(uint32_t year, uint32_t month, uint32_t day,
+-static bool date2days(uint32_t year, uint32_t month, uint32_t day,
 -    uint32_t *days);
 -
 -/*--------------------------------------------------------------------------*/
@ -237,8 +239,16 @@ index 2b13931c7749..000000000000
 -    }
 -    else
 -    {
-        /* Return pointer to name */
+-        if ((rtcId - DEV_SM_NUM_RTC) < BRD_SM_NUM_RTC)
-        *rtcNameAddr = s_name[rtcId - DEV_SM_NUM_RTC];
+-        {
 -            /* Return pointer to name */
 -            *rtcNameAddr = s_name[rtcId - DEV_SM_NUM_RTC];
 -        }
 -        else
 -        {
 -            /* Set the status */
 -            status = SM_ERR_INVALID_PARAMETERS;
 -        }
 -    }
 -
 -    /* Return status */
@ -331,12 +341,12 @@ index 2b13931c7749..000000000000
 -        {
 -            status = SM_ERR_INVALID_PARAMETERS;
 -        }
 -    }
 -
-    if (status == SM_ERR_SUCCESS)
+-        if (status == SM_ERR_SUCCESS)
-    {
+-        {
-        /* Enable battery */
+-            /* Enable battery */
-        (void) PCA2131_PowerModeSet(&g_pca2131Dev, 0U);
+-            (void) PCA2131_PowerModeSet(&g_pca2131Dev, 0U);
 -        }
 -    }
 -
 -    /* Return status */
@ -362,7 +372,7 @@ index 2b13931c7749..000000000000
 -        if (PCA2131_RtcGet(&g_pca2131Dev, &year, &month, &day, &hour, &min,
 -            &sec, &hun, &weekday))
 -        {
-            uint32_t days, secs;
+-            uint32_t days = 0U;
 -
 -            /* Convert year */
 -            if (year >= 70U)
@ -375,26 +385,38 @@ index 2b13931c7749..000000000000
 -            }
 -
 -            /* Convert to days */
-            date2days(year, month, day, &days);
+-            if (date2days(year, month, day, &days))
 -
 -            /* Calculate seconds */
 -            secs = sec + (min * 60U) + (hour * 3600U);
 -            secs += (days * 86400U);
 -
 -            /* Check time format */
 -            if (ticks)
 -            {
-                *val = (((uint64_t) secs) * 100U) + hun;
+-
 -                /* Calculate seconds */
 -                uint32_t secs = sec + (min * 60U) + (hour * 3600U);
 -                secs += (days * 86400U);
 -
 -                /* Check time format */
 -                if (ticks)
 -                {
 -                    *val = (((uint64_t) secs) * 100U) + hun;
 -                }
 -                else
 -                {
 -                    *val = ((uint64_t) secs);
 -                }
 -            }
 -            else
 -            {
-                *val = ((uint64_t) secs);
+-                status = SM_ERR_HARDWARE_ERROR;
 -            }
 -        }
 -        else
 -        {
 -            status = SM_ERR_HARDWARE_ERROR;
 -        }
 -
 -        if (status == SM_ERR_SUCCESS)
 -        {
 -            /* Enable battery */
 -            (void) PCA2131_PowerModeSet(&g_pca2131Dev, 0U);
 -        }
 -    }
 -
 -    /* Return status */
@ -419,10 +441,7 @@ index 2b13931c7749..000000000000
 -        /* Default state */
 -        *state = 0U;
 -
-        /* Enable battery */
+-        /* Get time status */
 -        (void) PCA2131_PowerModeSet(&g_pca2131Dev, 0U);
 -
 -        /* Get battery state */
 -        if (PCA2131_TimeStatusGet(&g_pca2131Dev, &st))
 -        {
 -            if (st)
@ -704,7 +723,7 @@ index 2b13931c7749..000000000000
 -    if (rc)
 -    {
 -        /* Calculate month */
-        *month= (moy < 10U) ? (moy + 3U) : (moy - 9U);
+-        *month = (moy < 10U) ? (moy + 3U) : (moy - 9U);
 -
 -        /* Calculate day of the week */
 -        *weekday = (days + 4U) % 7U;
@ -720,36 +739,66 @@ index 2b13931c7749..000000000000
 -/*--------------------------------------------------------------------------*/
 -/* Convert date/time to days since 1-1-1970                                 */
 -/*--------------------------------------------------------------------------*/
-static void date2days(uint32_t year, uint32_t month, uint32_t day,
+-static bool date2days(uint32_t year, uint32_t month, uint32_t day,
 -    uint32_t *days)
 -{
-    uint32_t newYear;
+-    bool rc = true;
-    uint32_t era;
+-    uint32_t newYear = 0U;
-    uint32_t doe;
+-    uint32_t era = 0U;
-    uint32_t yoe;
+-    uint32_t yoe = 0U;
 -    uint32_t doy;
 -    uint32_t moy;
 -
-    /* Adjust year */
+-    /*
 -     * False Positive: The value of variable year cann't be zero
 -     */
 -    // coverity[cert_int30_c_violation:FALSE]
 -    newYear = year - ((month <= 2U) ? 1U : 0U);
 -
 -    /* Calculate era */
 -    era = newYear / 400U;
 -
-    /* Calculate the year of era */
+-    /* Check the expression value doesn't wrap */
-    yoe = newYear - (era * 400U);
+-    if (newYear >= (era * 400U))
 -    {
 -        /* Calculate the year of era */
 -        yoe = newYear - (era * 400U);
 -    }
 -    else
 -    {
 -        /* Handling if value wraps */
 -        rc = false;
 -    }
 -
-    /* Calculate month of year */
+-    if (rc == true)
-    moy = (month > 2U) ? (month - 3U) : (month + 9U);
+-    {
 -        /* Calculate month of year */
 -        uint32_t moy = (month > 2U) ? (month - 3U) : (month + 9U);
 -
-    /* Calculate day of the year */
+-        /*
-    doy = (((153U * moy) + 2U) / 5U) + (day - 1U);
+-         * False Positive: moy value will range 1 <=moy <= 12.
 -         * Hence, the multiplication with 153 cann't overflow
 -         */
 -        // coverity[cert_int30_c_violation:FALSE]
 -        uint32_t doy = (((153U * moy) + 2U) / 5U) + (day - 1U);
 -
-    /* Calculate the day in the era */
+-        /*
-    doe = (yoe * 365U) + (yoe / 4U) - (yoe / 100U) + doy;
+-         * False Positive: yoe is remainder value which will be always
 -         * less than 400.
 -         * Hence, the multiplication with 365 cann't overflow
 -         */
 -        // coverity[cert_int30_c_violation:FALSE]
 -        uint32_t doe = (yoe * 365U) + (yoe / 4U) - (yoe / 100U) + doy;
 -
-    /* Calculate days */
+-        /*
-    *days = (era * 146097U) + doe - 719468U;
+-         * False Positive: era is quotient value dividing newYear with 400.
 -         * The newYear variable will range from 1970 <= newYear <= 2070.
 -         * Hence, the multiplication can't overflow.
 -         */
 -        // coverity[cert_int30_c_violation:FALSE]
 -        *days = (era * 146097U) + doe - 719468U;
 -    }
 -
 -    /* Return code */
 -    return rc;
 -}
 -
 diff --git a/boards/ccimx95dvk/sm/brd_sm_bbm.h b/boards/ccimx95dvk/sm/brd_sm_bbm.h
@ -1001,31 +1050,10 @@ index a96a8e1cc901..000000000000
 -/** @} */
 -
 diff --git a/boards/ccimx95dvk/sm/brd_sm_control.c b/boards/ccimx95dvk/sm/brd_sm_control.c
-index 8484a6895a3d..564159c1ad7b 100755
+index 76de9fad9e86..500a8a8f9a8d 100755
 --- a/boards/ccimx95dvk/sm/brd_sm_control.c
 +++ b/boards/ccimx95dvk/sm/brd_sm_control.c
-@@ -65,10 +65,6 @@ int32_t BRD_SM_ControlSet(uint32_t ctrlId, uint32_t numVal,
+@@ -131,10 +131,6 @@ int32_t BRD_SM_ControlExtSet(uint32_t ctrlId, uint32_t addr,
         {
             status = DEV_SM_ControlSet(ctrlId, numVal, val);
         }
 -        else if (ctrlId == BRD_SM_CTRL_PCA2131)
 -        {
 -            status = SM_ERR_NOT_SUPPORTED;
 -        }
         else if (ctrlId == BRD_SM_CTRL_TEST)
         {
             /* Test response to an reported SM error */
@@ -103,8 +99,7 @@ int32_t BRD_SM_ControlGet(uint32_t ctrlId, uint32_t *numRtn, uint32_t *rtn)
         {
             status = DEV_SM_ControlGet(ctrlId, numRtn, rtn);
         }
 -        else if ((ctrlId == BRD_SM_CTRL_PCA2131)
 -            || (ctrlId == BRD_SM_CTRL_TEST))
 +        else if (ctrlId == BRD_SM_CTRL_TEST)
         {
             *numRtn = 0U;
             status = SM_ERR_NOT_SUPPORTED;
@@ -140,10 +135,6 @@ int32_t BRD_SM_ControlExtSet(uint32_t ctrlId, uint32_t addr,
         {
             status = DEV_SM_ControlExtSet(ctrlId, addr, numVal, val);
         }
@ -1036,7 +1064,7 @@ index 8484a6895a3d..564159c1ad7b 100755
         else
         {
             status = SM_ERR_NOT_SUPPORTED;
-@@ -174,10 +165,6 @@ int32_t BRD_SM_ControlExtGet(uint32_t ctrlId, uint32_t addr,
+@@ -165,10 +161,6 @@ int32_t BRD_SM_ControlExtGet(uint32_t ctrlId, uint32_t addr,
         {
             status = DEV_SM_ControlExtGet(ctrlId, addr, numRtn, rtn);
         }
@ -1048,23 +1076,25 @@ index 8484a6895a3d..564159c1ad7b 100755
         {
             status = SM_ERR_NOT_SUPPORTED;
 diff --git a/boards/ccimx95dvk/sm/brd_sm_control.h b/boards/ccimx95dvk/sm/brd_sm_control.h
-index 12365e56d7e4..be764f4cb1e7 100755
+index 9c61bce72f8e..e19c8975a0b4 100755
 --- a/boards/ccimx95dvk/sm/brd_sm_control.h
 +++ b/boards/ccimx95dvk/sm/brd_sm_control.h
-@@ -67,7 +67,7 @@
+@@ -68,7 +68,7 @@
 /** @} */
 /*! Number of board controls */
-#define BRD_SM_NUM_CTRL  2UL
+-#define BRD_SM_NUM_CTRL  3UL
-+#define BRD_SM_NUM_CTRL  1UL
+#define BRD_SM_NUM_CTRL  2UL
 /*! Total number of controls */
 #define SM_NUM_CTRL  (DEV_SM_NUM_CTRL + BRD_SM_NUM_CTRL)
-@@ -77,7 +77,6 @@
+@@ -78,8 +78,7 @@
  */
 /** @{ */
 #define BRD_SM_CTRL_TEST        (DEV_SM_NUM_CTRL + 0U)  /*!< Test */
 -#define BRD_SM_CTRL_PCA2131     (DEV_SM_NUM_CTRL + 1U)  /*!< PCA2131 raw access */
 -#define BRD_SM_CTRL_TEST_A      (DEV_SM_NUM_CTRL + 2U)  /*!< Test action */
 +#define BRD_SM_CTRL_TEST_A      (DEV_SM_NUM_CTRL + 1U)  /*!< Test action */
 /** @} */
 /* Types */
@ -1146,39 +1176,40 @@ index 781a443e8444..967d41d61b53 100755
 extern uint32_t g_pmicFaultFlags;
 diff --git a/configs/ccimx95dvk.cfg b/configs/ccimx95dvk.cfg
-index 4af5cea789d9..b324e0fb0e45 100755
+index c3c280d275b0..c160dbce0b85 100755
 --- a/configs/ccimx95dvk.cfg
 +++ b/configs/ccimx95dvk.cfg
-@@ -345,9 +345,7 @@ CHANNEL             db=2, xport=smt, check=crc32, rpc=scmi, \
+@@ -365,10 +365,8 @@ CHANNEL             db=2, xport=smt, check=crc32, rpc=scmi, \
 # API
 -BRD_SM_CTRL_PCA2131       ALL
 BRD_SM_CTRL_TEST          ALL
 BRD_SM_CTRL_TEST_A        ALL
 -BRD_SM_RTC_PCA2131        ALL
 BRD_SM_SENSOR_TEMP_PF09   SET
 BRD_SM_SENSOR_TEMP_PF5301 SET
 BRD_SM_SENSOR_TEMP_PF5302 SET
-@@ -531,7 +529,6 @@ CHANNEL             db=1, xport=smt, rpc=scmi, type=p2a_notify
+@@ -553,7 +551,6 @@ CHANNEL             db=1, xport=smt, rpc=scmi, type=p2a_notify
 AUDIO_PLL1                ALL
 AUDIO_PLL2                ALL
 BRD_SM_CTRL_TEST_A        ALL
 -BRD_SM_RTC_PCA2131        PRIV
 BRD_SM_SENSOR_TEMP_PF09   ALL
 BRD_SM_SENSOR_TEMP_PF5301 SET
 BRD_SM_SENSOR_TEMP_PF5302 SET
 diff --git a/configs/ccimx95dvk/config_scmi.h b/configs/ccimx95dvk/config_scmi.h
-index d251f7910b39..b23958f33138 100644
+index 83d7bd94bcd1..87de1fd591ca 100644
 --- a/configs/ccimx95dvk/config_scmi.h
 +++ b/configs/ccimx95dvk/config_scmi.h
-@@ -72,7 +72,6 @@
+@@ -71,7 +71,6 @@
-         .clkPerms[DEV_SM_CLK_M7] = SM_SCMI_PERM_ALL, \
+         .clkPerms[DEV_SM_CLK_M7SYSTICK] = SM_SCMI_PERM_ALL, \
         .clkPerms[DEV_SM_CLK_TSTMR2] = SM_SCMI_PERM_ALL, \
         .cpuPerms[DEV_SM_CPU_M7P] = SM_SCMI_PERM_ALL, \
 -        .ctrlPerms[BRD_SM_CTRL_PCA2131] = SM_SCMI_PERM_ALL, \
         .ctrlPerms[BRD_SM_CTRL_TEST] = SM_SCMI_PERM_ALL, \
         .ctrlPerms[BRD_SM_CTRL_TEST_A] = SM_SCMI_PERM_ALL, \
         .daisyPerms[DEV_SM_DAISY_LPTMR2_0] = SM_SCMI_PERM_ALL, \
         .daisyPerms[DEV_SM_DAISY_LPTMR2_1] = SM_SCMI_PERM_ALL, \
@@ -87,7 +86,6 @@
         .pdPerms[DEV_SM_PD_M7] = SM_SCMI_PERM_ALL, \
         .perfPerms[DEV_SM_PERF_M7] = SM_SCMI_PERM_ALL, \
@ -1187,7 +1218,7 @@ index d251f7910b39..b23958f33138 100644
         .rtcPerms[DEV_SM_RTC_BBNSM] = SM_SCMI_PERM_PRIV, \
         .sensorPerms[BRD_SM_SENSOR_TEMP_PF09] = SM_SCMI_PERM_SET, \
         .sensorPerms[BRD_SM_SENSOR_TEMP_PF5301] = SM_SCMI_PERM_SET, \
-@@ -605,7 +603,6 @@
+@@ -596,7 +594,6 @@
         .pinPerms[DEV_SM_PIN_XSPI1_SCLK] = SM_SCMI_PERM_ALL, \
         .pinPerms[DEV_SM_PIN_XSPI1_SS0_B] = SM_SCMI_PERM_ALL, \
         .pinPerms[DEV_SM_PIN_XSPI1_SS1_B] = SM_SCMI_PERM_ALL, \
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0009-ccimx95-change-names-of-voltage-regulators.patch
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0009-ccimx95-change-names-of-voltage-regulators.patch
@ -1,11 +1,13 @@
 From: Hector Palacios <hector.palacios@digi.com>
 Date: Mon, 29 Sep 2025 13:02:02 +0200
-Subject: [PATCH 09/11] ccimx95: change names of voltage regulators
+Subject: [PATCH] ccimx95: change names of voltage regulators
 Change the names of voltage regulators for easier identification.
 Use the PMIC regulator (SW1, SW2, LDO1...) and then the name of the power
 rail used in the SOM.
 Upstream-Status: Inappropriate [DEY specific]
 Signed-off-by: Hector Palacios <hector.palacios@digi.com>
 ---
 boards/ccimx95dvk/sm/brd_sm_voltage.c | 85 ++++++++++++++-------------
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0010-ccimx95dvk-enable-full-access-to-certain-regulators-.patch
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0010-ccimx95dvk-enable-full-access-to-certain-regulators-.patch
@ -1,7 +1,7 @@
 From: Hector Palacios <hector.palacios@digi.com>
 Date: Thu, 9 Oct 2025 13:16:00 +0200
-Subject: [PATCH 10/11] ccimx95dvk: enable full access to certain regulators
+Subject: [PATCH] ccimx95dvk: enable full access to certain regulators from
- from non-secure LVM
+ non-secure LVM
 The following PMIC regulators are used by the DVK:
 - VDD_3V3 (SW1)
@ -9,6 +9,8 @@ The following PMIC regulators are used by the DVK:
 - VDD_LDO1 (LDO1)
 - VDD_SDIO2 (LDO2)
 Upstream-Status: Inappropriate [DEY specific]
 Signed-off-by: Hector Palacios <hector.palacios@digi.com>
 ---
 configs/ccimx95dvk.cfg           | 4 ++++
@ -16,10 +18,10 @@ Signed-off-by: Hector Palacios <hector.palacios@digi.com>
 2 files changed, 8 insertions(+)
 diff --git a/configs/ccimx95dvk.cfg b/configs/ccimx95dvk.cfg
-index b324e0fb0e45..b7c33f8d7e9a 100755
+index c160dbce0b85..d7ee4d0115fa 100755
 --- a/configs/ccimx95dvk.cfg
 +++ b/configs/ccimx95dvk.cfg
-@@ -532,6 +532,10 @@ AUDIO_PLL2                ALL
+@@ -554,6 +554,10 @@ BRD_SM_CTRL_TEST_A        ALL
 BRD_SM_SENSOR_TEMP_PF09   ALL
 BRD_SM_SENSOR_TEMP_PF5301 SET
 BRD_SM_SENSOR_TEMP_PF5302 SET
@ -31,10 +33,10 @@ index b324e0fb0e45..b7c33f8d7e9a 100755
 CLOCK_DISP1PIX            ALL
 CLOCK_DISP2PIX            ALL
 diff --git a/configs/ccimx95dvk/config_scmi.h b/configs/ccimx95dvk/config_scmi.h
-index b23958f33138..18a4e5ef6360 100644
+index 87de1fd591ca..83084a9d1fbd 100644
 --- a/configs/ccimx95dvk/config_scmi.h
 +++ b/configs/ccimx95dvk/config_scmi.h
-@@ -610,6 +610,10 @@
+@@ -601,6 +601,10 @@
         .sensorPerms[DEV_SM_SENSOR_TEMP_A55] = SM_SCMI_PERM_ALL, \
         .sensorPerms[DEV_SM_SENSOR_TEMP_ANA] = SM_SCMI_PERM_SET, \
         .sysPerms = SM_SCMI_PERM_NOTIFY, \
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0011-components-pf09-reduce-LDOs-step-to-50mV.patch
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0011-components-pf09-reduce-LDOs-step-to-50mV.patch
@ -1,6 +1,6 @@
 From: Hector Palacios <hector.palacios@digi.com>
 Date: Mon, 13 Oct 2025 08:49:57 +0200
-Subject: [PATCH 11/11] components: pf09: reduce LDOs step to 50mV
+Subject: [PATCH] components: pf09: reduce LDOs step to 50mV
 The voltage values that can be programmed to the LDOs are not linear.
 For low voltages, the step is 50mV, but for higher voltages it is 100mV.
@ -8,13 +8,15 @@ Setting the step as 100mV fools the Linux kernel regulator framework
 which does not properly calculate the selector it must call when using
 the SCMI regulator framework, resulting in -EINVAL errors.
 Upstream-Status: Inappropriate [DEY specific]
 Signed-off-by: Hector Palacios <hector.palacios@digi.com>
 ---
 components/pf09/fsl_pf09.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
 diff --git a/components/pf09/fsl_pf09.c b/components/pf09/fsl_pf09.c
-index 21a0b5557244..3e1887158d7d 100755
+index fc0638cbdba5..5d842c9a3062 100755
 --- a/components/pf09/fsl_pf09.c
 +++ b/components/pf09/fsl_pf09.c
@@ -528,7 +528,7 @@ bool PF09_RegulatorInfoGet(uint8_t regulator, PF09_RegInfo *regInfo)
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0012-ccimx95dvk-remove-access-to-VDD_3V3-and-VDD_1V8-from.patch
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0012-ccimx95dvk-remove-access-to-VDD_3V3-and-VDD_1V8-from.patch
@ -22,6 +22,8 @@ though apparently support is incomplete (for instance they are not powered
 off on the poweroff path from Linux), so this may need to be revisited in
 future BSP upgrades.
 Upstream-Status: Inappropriate [DEY specific]
 Signed-off-by: Hector Palacios <hector.palacios@digi.com>
 https://onedigi.atlassian.net/browse/DEL-9804
@ -31,10 +33,10 @@ https://onedigi.atlassian.net/browse/DEL-9804
 2 files changed, 4 deletions(-)
 diff --git a/configs/ccimx95dvk.cfg b/configs/ccimx95dvk.cfg
-index b7c33f8d7e9a..19d3b0ab27b4 100755
+index d7ee4d0115fa..b73401792592 100755
 --- a/configs/ccimx95dvk.cfg
 +++ b/configs/ccimx95dvk.cfg
-@@ -532,8 +532,6 @@ AUDIO_PLL2                ALL
+@@ -554,8 +554,6 @@ BRD_SM_CTRL_TEST_A        ALL
 BRD_SM_SENSOR_TEMP_PF09   ALL
 BRD_SM_SENSOR_TEMP_PF5301 SET
 BRD_SM_SENSOR_TEMP_PF5302 SET
@ -44,10 +46,10 @@ index b7c33f8d7e9a..19d3b0ab27b4 100755
 BRD_SM_VOLT_LDO2_VDD_SDIO2   ALL
 BUTTON                    ALL, test
 diff --git a/configs/ccimx95dvk/config_scmi.h b/configs/ccimx95dvk/config_scmi.h
-index 18a4e5ef6360..8094e9a9ef77 100644
+index 83084a9d1fbd..506cb750af65 100644
 --- a/configs/ccimx95dvk/config_scmi.h
 +++ b/configs/ccimx95dvk/config_scmi.h
-@@ -612,8 +612,6 @@
+@@ -603,8 +603,6 @@
         .sysPerms = SM_SCMI_PERM_NOTIFY, \
         .voltPerms[BRD_SM_VOLT_LDO1_VDD_LDO1] = SM_SCMI_PERM_ALL, \
         .voltPerms[BRD_SM_VOLT_LDO2_VDD_SDIO2] = SM_SCMI_PERM_ALL, \
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager_2025q3.bb
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager_2025q3.bb
@ -0,0 +1,23 @@
 SUMMARY = "i.MX System Manager Firmware"
 DESCRIPTION = "\
 The System Manager (SM) is a firmware that runs on a Cortex-M processor on \
 many NXP i.MX processors. The Cortex-M is the boot core, runs the boot ROM \
 which loads the SM (and other boot code), and then branches to the SM. The \
 SM then configures some aspects of the hardware such as isolation mechanisms \
 and then starts other cores in the system. After starting these cores, it \
 enters a service mode where it provides access to clocking, power, sensor, \
 and pin control via a client RPC API based on ARM's System Control and \
 Management Interface (SCMI)."
 LICENSE = "BSD-3-Clause"
 LIC_FILES_CHKSUM = "file://LICENSE.txt;md5=f2a70813bc08547f509361c08b718861"
 SRC_URI = "${IMX_SYSTEM_MANAGER_SRC};branch=${SRCBRANCH}"
 IMX_SYSTEM_MANAGER_SRC ?= "git://github.com/nxp-imx/imx-sm.git;protocol=https"
 SRCBRANCH = "master"
 SRCREV = "af1e37026c6ba19cdca98fd6e91494efd3e7b5ec"
 S = "${WORKDIR}/git"
 require imx-system-manager.inc
 PACKAGECONFIG ??= "m2"
--- a/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager_2025q3.bbappend
+++ b/meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager_2025q3.bbappend
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/firmware-imx/firmware-ele-imx_2.0.3.1.bb
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/firmware-imx/firmware-ele-imx_2.0.3.1.bb
@ -0,0 +1,36 @@
 # Copyright 2021-2025 NXP
 SUMMARY = "NXP i.MX ELE firmware"
 DESCRIPTION = "EdgeLock Secure Enclave firmware for i.MX series SoCs"
 SECTION = "base"
 LICENSE = "Proprietary"
 LIC_FILES_CHKSUM = "file://COPYING;md5=bc649096ad3928ec06a8713b8d787eac"
 inherit fsl-eula-unpack use-imx-security-controller-firmware deploy
 SRC_URI = "${FSL_MIRROR}/${BP}-${IMX_SRCREV_ABBREV}.bin;fsl-eula=true"
 IMX_SRCREV_ABBREV = "52f7740"
 SRC_URI[sha256sum] = "93ae9b84ca2b718730f4d7e60b6099624a02c54630c8c9719beceaa0a5987cd1"
 S = "${WORKDIR}/${BP}-${IMX_SRCREV_ABBREV}"
 do_compile[noexec] = "1"
 do_install() {
    install -d ${D}${nonarch_base_libdir}/firmware/imx/ele
    for fw in ${SECO_FIRMWARE_NAME} ${SECOEXT_FIRMWARE_NAME}; do
        install -m 0644 ${S}/$fw ${D}${nonarch_base_libdir}/firmware/imx/ele
    done
 }
 do_deploy () {
    # Deploy the related firmware to be packaged by imx-boot
    install -m 0644 ${S}/${SECO_FIRMWARE_NAME}  ${DEPLOYDIR}
 }
 addtask deploy after do_install before do_build
 FILES:${PN} = "${nonarch_base_libdir}/firmware"
 RREPLACES:${PN} = "firmware-sentinel"
 RPROVIDES:${PN} = "firmware-sentinel"
 COMPATIBLE_MACHINE = "(mx8ulp-generic-bsp|mx9-generic-bsp)"
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf/0007-imx93-bring-back-ELE-clock-workaround-for-soc-revisi.patch
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf/0007-imx93-bring-back-ELE-clock-workaround-for-soc-revisi.patch
@ -14,10 +14,10 @@ Signed-off-by: Javier Viguera <javier.viguera@digi.com>
 2 files changed, 14 insertions(+)
 diff --git a/plat/imx/imx93/imx93_psci.c b/plat/imx/imx93/imx93_psci.c
-index ccd82d1d2bdc..325fcf75911a 100644
+index 526c876e7333..33d9cb6daf07 100644
 --- a/plat/imx/imx93/imx93_psci.c
 +++ b/plat/imx/imx93/imx93_psci.c
-@@ -747,6 +747,11 @@ void imx_pwr_domain_suspend(const psci_power_state_t *target_state)
+@@ -755,6 +755,11 @@ void imx_pwr_domain_suspend(const psci_power_state_t *target_state)
 		if (is_local_state_retn(CLUSTER_PWR_STATE(target_state))) {
 			write_clusterpwrdn(DSU_CLUSTER_PWR_OFF | BIT(1));
 		}
@ -29,7 +29,7 @@ index ccd82d1d2bdc..325fcf75911a 100644
 	}
 	if (is_local_state_retn(SYSTEM_PWR_STATE(target_state))) {
-@@ -878,6 +883,11 @@ void imx_pwr_domain_suspend_finish(const psci_power_state_t *target_state)
+@@ -888,6 +893,11 @@ void imx_pwr_domain_suspend_finish(const psci_power_state_t *target_state)
 	if (!is_local_state_run(CLUSTER_PWR_STATE(target_state))) {
 		/* set the cluster's target mode to RUN */
 		gpc_set_cpu_mode(CPU_A55_PLAT, CM_MODE_RUN);
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf/0010-ccimx95-enable-non-secure-non-privilege-access-to-GP.patch
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf/0010-ccimx95-enable-non-secure-non-privilege-access-to-GP.patch
@ -5,6 +5,8 @@ Subject: [PATCH] ccimx95: enable non-secure, non-privilege access to GPIO1
 GPIO1 port is reserved on NXP EVK but we want to enable
 full access to the port from the non-secure world.
 Upstream-Status: Inappropriate [DEY specific]
 Signed-off-by: Hector Palacios <hector.palacios@digi.com>
 https://onedigi.atlassian.net/browse/DEL-9839
--- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf_%.bbappend
+++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf_%.bbappend
@ -15,6 +15,8 @@ SRC_URI:append:dey = " \
    file://0010-ccimx95-enable-non-secure-non-privilege-access-to-GP.patch \
 "
 SRCREV = "8ec7e38031f8c022a9760a8da77bdc6e1938db8c"
 BOOT_TOOLS = "imx-boot-tools"
 EXTRA_OEMAKE += "${@oe.utils.conditional('TRUSTFENCE_CONSOLE_DISABLE', '1', 'LOG_LEVEL=0', '', d)}"
--- a/meta-digi-dey/dynamic-layers/freescale-layer/recipes-fsl/mcore-demos/imx-m7-demos_25.09.00.bb
+++ b/meta-digi-dey/dynamic-layers/freescale-layer/recipes-fsl/mcore-demos/imx-m7-demos_25.09.00.bb
@ -0,0 +1,11 @@
 # Copyright 2023-2025 NXP
 # Released under the MIT license (see COPYING.MIT for the terms)
 require imx-mcore-demos.inc
 LIC_FILES_CHKSUM:mx95-nxp-bsp = "file://COPYING;md5=bc649096ad3928ec06a8713b8d787eac"
 SRC_URI[imx95.sha256sum] = "de703aba46ba58fb571f969985a68a1ca44cd2d274a711d074f12ea4d89cd4ab"
 COMPATIBLE_MACHINE = "(mx95-nxp-bsp)"
--- a/meta-digi-dey/dynamic-layers/freescale-layer/recipes-fsl/mcore-demos/imx-mcore-demos.inc
+++ b/meta-digi-dey/dynamic-layers/freescale-layer/recipes-fsl/mcore-demos/imx-mcore-demos.inc
@ -0,0 +1,57 @@
 # Copyright 2017-2021 NXP
 # Released under the MIT license (see COPYING.MIT for the terms)
 SUMMARY = "i.MX M4/M7/M33 core Demo images"
 SECTION = "app"
 LICENSE = "Proprietary"
 inherit deploy fsl-eula2-unpack2
 SOC                ?= "INVALID"
 SOC:mx7ulp-nxp-bsp  = "imx7ulp"
 SOC:mx8dxl-nxp-bsp  = "imx8dxl"
 SOC:mx8mm-nxp-bsp   = "imx8mm"
 SOC:mx8mn-nxp-bsp   = "imx8mn"
 SOC:mx8mnul-nxp-bsp = "imx8mnddr3l"
 SOC:mx8mp-nxp-bsp   = "imx8mp"
 SOC:mx8mpul-nxp-bsp = "imx8mp"
 SOC:mx8mq-nxp-bsp   = "imx8mq"
 SOC:mx8qm-nxp-bsp   = "imx8qm"
 SOC:mx8qxp-nxp-bsp  = "imx8qx"
 SOC:mx8dx-nxp-bsp   = "imx8qx"
 SOC:mx8ulp-nxp-bsp  = "imx8ulp"
 SOC:mx93-nxp-bsp    = "imx93"
 SOC:mx95-nxp-bsp    = "imx95"
 MCORE_TYPE  ?= "m4"
 MCORE_TYPE:mx8mn-nxp-bsp  = "m7"
 MCORE_TYPE:mx8mnul-nxp-bsp = "m7"
 MCORE_TYPE:mx8mp-nxp-bsp  = "m7"
 MCORE_TYPE:mx8mpul-nxp-bsp  = "m7"
 MCORE_TYPE:mx8ulp-nxp-bsp  = "m33"
 MCORE_TYPE:mx93-nxp-bsp  = "m33"
 MCORE_TYPE:mx95-nxp-bsp  = "m7"
 IMX_PACKAGE_NAME = "${SOC}-${MCORE_TYPE}-demo-${PV}"
 SRC_URI:append = ";name=${SOC}"
 SCR = "SCR-${SOC}-${MCORE_TYPE}-demo.txt"
 do_install () {
    # install elf format binary to /lib/firmware
    install -d ${D}${nonarch_base_libdir}/firmware
    install -m 0644 ${S}/*.elf ${D}${nonarch_base_libdir}/firmware
 }
 DEPLOY_FILE_EXT       ?= "bin"
 DEPLOY_FILE_EXT:mx7ulp-nxp-bsp = "img"
 do_deploy () {
    # Install the demo binaries
    install -d ${DEPLOYDIR}/mcore-demos
    install -m 0644 ${S}/*.${DEPLOY_FILE_EXT} ${DEPLOYDIR}/mcore-demos/
 }
 addtask deploy after do_install
 PACKAGE_ARCH = "${MACHINE_SOCARCH}"