Revert "imx-atf: add patch to fix the ccimx8mn hanging on suspend/resume"

The patch is no longer needed as it was merged upstream.

This reverts commit b7b7d0110b.

https://jira.digi.com/browse/DEL-6932

Signed-off-by: Gabriel Valcazar <gabriel.valcazar@digi.com>

meta-digi-arm/recipes-bsp/imx-atf/imx-atf/0002-plat-imx8m-update-the-lpddr4-retention-flow-for-imx8.patch

@@ -1,26 +0,0 @@
-From: Jacky Bai <ping.bai@nxp.com>
-Date: Wed, 23 Oct 2019 13:44:28 +0800
-Subject: [PATCH] plat: imx8m: update the lpddr4 retention flow for imx8mn
-
-for i.MX8MN, it can only support 16bit DDR, so
-it is not necessary to config the DDR_SS_GPR register.
-
-Signed-off-by: Jacky Bai <ping.bai@nxp.com>
----
- plat/imx/common/imx8m/lpddr4_retention.c | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/plat/imx/common/imx8m/lpddr4_retention.c b/plat/imx/common/imx8m/lpddr4_retention.c
-index 8cc44c8..dbec3d5 100644
---- a/plat/imx/common/imx8m/lpddr4_retention.c
-+++ b/plat/imx/common/imx8m/lpddr4_retention.c
-@@ -184,7 +184,9 @@ void lpddr4_exit_retention(void)
- 
- 	/* before write Dynamic reg, sw_done should be 0 */
- 	mmio_write_32(DDRC_SWCTL(0), 0x00000000);
-+#if !defined(PLAT_imx8mn)
- 	mmio_write_32(DDRC_DDR_SS_GPR0, 0x01); /*LPDDR4 mode */
-+#endif
- 	mmio_write_32(DDRC_DFIMISC(0), 0x00000000);
- 
- 	/* dram phy re-init */

meta-digi-arm/recipes-bsp/imx-atf/imx-atf_2.0.bb

@@ -15,10 +15,7 @@ SRCBRANCH = "imx_4.14.98_2.3.0"
 SRC_URI = "${ATF_SRC};branch=${SRCBRANCH}"
 SRCREV = "09c5cc994634060ad7dfef4620866838d19694a4"
 
-SRC_URI_append_ccimx8mn = " \
-    file://0001-imx8mn-Disable-M7-debug-console.patch \
-    file://0002-plat-imx8m-update-the-lpddr4-retention-flow-for-imx8.patch \
-"
+SRC_URI_append_ccimx8mn = " file://0001-imx8mn-Disable-M7-debug-console.patch"
 
 S = "${WORKDIR}/git"