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imx-system-manager: add ccimx95-dvk support 

Update machine config and add bbappend with ccimx95-dvk patches.

Signed-off-by: Javier Viguera <javier.viguera@digi.com>
This commit is contained in:
Javier Viguera 2025-09-26 15:15:28 +02:00
parent 4cdc7020b6
commit 69a512aef1
10 changed files with 12087 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
meta-digi-arm/conf/machine/ccimx95-dvk.conf
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@ -22,7 +22,7 @@ IMX_SOC_REV:${MACHINE} = "A0"
ATF_PLATFORM = "imx95"
IMX_BOOT_SOC_TARGET = "iMX95"
IMXBOOT_TARGETS = "flash_all flash_a55"
SYSTEM_MANAGER_CONFIG ?= "mx95evk"
SYSTEM_MANAGER_CONFIG ?= "ccimx95dvk"
SYSTEM_MANAGER_FIRMWARE_BASENAME ?= "m33_image"
SYSTEM_MANAGER_FIRMWARE_NAME ?= "${SYSTEM_MANAGER_FIRMWARE_BASENAME}-${SYSTEM_MANAGER_CONFIG}"

6195
meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0001-ccimx95dvk-add-new-platform-config-and-board.patch Normal file
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3541
meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0002-ccimx95dvk-configure-board-and-switch-debug-UART-to-.patch Normal file
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254
meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0003-ccimx95dvk-disable-PCAL6408A-expander-and-move-GPIO1.patch Normal file
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@ -0,0 +1,254 @@
From: Javier Viguera <javier.viguera@digi.com>
Date: Mon, 15 Sep 2025 12:37:05 +0200
Subject: [PATCH] ccimx95dvk: disable PCAL6408A expander and move GPIO1 to A55
Our board does not populate that expander, so disable the initialization
and assign GPIO1 to be used by the A55 cpu.
Upstream-Status: Inappropriate [DEY specific]
Signed-off-by: Javier Viguera <javier.viguera@digi.com>
---
boards/ccimx95dvk/board.c | 7 ---
boards/ccimx95dvk/pin_mux.c | 4 --
boards/ccimx95dvk/sm/brd_sm.c | 9 ---
boards/ccimx95dvk/sm/brd_sm_handlers.c | 82 --------------------------
configs/ccimx95dvk.cfg | 3 +-
configs/ccimx95dvk/config_scmi.h | 2 +
configs/ccimx95dvk/config_trdc.h | 2 +-
7 files changed, 5 insertions(+), 104 deletions(-)
diff --git a/boards/ccimx95dvk/board.c b/boards/ccimx95dvk/board.c
index d4a671f6d7f8..012a04540fd1 100755
--- a/boards/ccimx95dvk/board.c
+++ b/boards/ccimx95dvk/board.c
@@ -337,9 +337,6 @@ void BOARD_InitHandlers(void)
/* Enable FCCU handler */
NVIC_SetPriority(FCCU_INT0_IRQn, IRQ_PRIO_NOPREEMPT_CRITICAL);
NVIC_EnableIRQ(FCCU_INT0_IRQn);
-
- /* Enable GPIO1 handler */
- NVIC_EnableIRQ(GPIO1_0_IRQn);
}
/*--------------------------------------------------------------------------*/
@@ -509,10 +506,6 @@ void BOARD_SystemSleepPrepare(uint32_t sleepMode, uint32_t sleepFlags)
(void) CPU_PerLpiConfigSet(CPU_IDX_M33P, s_uartConfig.perLpiId,
CPU_PER_LPI_ON_RUN_WAIT_STOP);
}
-
- /* Configure LPI for GPIO1 */
- (void) CPU_PerLpiConfigSet(CPU_IDX_M33P, CPU_PER_LPI_IDX_GPIO1,
- CPU_PER_LPI_ON_RUN_WAIT_STOP);
}
/*--------------------------------------------------------------------------*/
diff --git a/boards/ccimx95dvk/pin_mux.c b/boards/ccimx95dvk/pin_mux.c
index 60f6d27c41c5..800126f3814b 100755
--- a/boards/ccimx95dvk/pin_mux.c
+++ b/boards/ccimx95dvk/pin_mux.c
@@ -57,9 +57,5 @@ void BOARD_InitPins(void)
IOMUXC_SetPinConfig(IOMUXC_PAD_I2C2_SDA__LPI2C2_SDA, IOMUXC_PAD_DSE(0xFU)
| IOMUXC_PAD_FSEL1(0x3U) | IOMUXC_PAD_PU(0x1U) | IOMUXC_PAD_OD(0x1U));
#endif
-
- /* Configure GPIO1-10 (INT from the PCAL6408A */
- IOMUXC_SetPinMux(IOMUXC_PAD_PDM_BIT_STREAM1__GPIO1_IO_BIT10, 0U);
- IOMUXC_SetPinConfig(IOMUXC_PAD_PDM_BIT_STREAM1__GPIO1_IO_BIT10, 0U);
}
diff --git a/boards/ccimx95dvk/sm/brd_sm.c b/boards/ccimx95dvk/sm/brd_sm.c
index cd48b590cd26..48a8486a2acd 100755
--- a/boards/ccimx95dvk/sm/brd_sm.c
+++ b/boards/ccimx95dvk/sm/brd_sm.c
@@ -459,15 +459,6 @@ void BRD_SM_ShutdownRecordSave(dev_sm_rst_rec_t shutdownRec)
int32_t BRD_SM_SystemReset(void)
{
int32_t status = SM_ERR_SUCCESS;
- rgpio_pin_config_t gpioConfig =
- {
- kRGPIO_DigitalOutput,
- 0U
- };
-
- /* Drive WDOG_ANY to reset PMIC */
- RGPIO_PinInit(GPIO1, 15U, &gpioConfig);
- IOMUXC_SetPinMux(IOMUXC_PAD_WDOG_ANY__GPIO1_IO_BIT15, 0U);
/* Wait for PMIC to react */
SystemTimeDelay(1000U);
diff --git a/boards/ccimx95dvk/sm/brd_sm_handlers.c b/boards/ccimx95dvk/sm/brd_sm_handlers.c
index a96f6ce0e2f4..19ee28e93134 100755
--- a/boards/ccimx95dvk/sm/brd_sm_handlers.c
+++ b/boards/ccimx95dvk/sm/brd_sm_handlers.c
@@ -96,26 +96,6 @@ int32_t BRD_SM_SerialDevicesInit(void)
{
int32_t status = SM_ERR_SUCCESS;
LPI2C_Type *const s_i2cBases[] = LPI2C_BASE_PTRS;
- pcal6408a_config_t pcal6408Config;
-
- /* Fill in PCAL6408A dev */
- g_pcal6408aDev.i2cBase = s_i2cBases[BOARD_I2C_INSTANCE];
- g_pcal6408aDev.devAddr = BOARD_PCAL6408A_DEV_ADDR;
-
- /* Init the bus expander */
- PCAL6408A_GetDefaultConfig(&pcal6408Config);
- pcal6408Config.inputLatch = 0xFFU;
- if (!PCAL6408A_Init(&g_pcal6408aDev, &pcal6408Config))
- {
- status = SM_ERR_HARDWARE_ERROR;
- }
- else
- {
- if (!PCAL6408A_IntMaskSet(&g_pcal6408aDev, PCAL6408A_INITIAL_MASK))
- {
- status = SM_ERR_HARDWARE_ERROR;
- }
- }
if (status == SM_ERR_SUCCESS)
{
@@ -254,20 +234,6 @@ int32_t BRD_SM_SerialDevicesInit(void)
}
}
- if (status == SM_ERR_SUCCESS)
- {
- rgpio_pin_config_t gpioConfig =
- {
- kRGPIO_DigitalInput,
- 0U
- };
-
- /* Init GPIO1-10 */
- RGPIO_PinInit(GPIO1, 10U, &gpioConfig);
- RGPIO_SetPinInterruptConfig(GPIO1, 10U, kRGPIO_InterruptOutput0,
- kRGPIO_InterruptLogicZero);
- }
-
/* Return status */
return status;
}
@@ -300,54 +266,6 @@ int32_t BRD_SM_BusExpMaskSet(uint8_t val, uint8_t mask)
return status;
}
-/*--------------------------------------------------------------------------*/
-/* GPIO1 handler */
-/*--------------------------------------------------------------------------*/
-void GPIO1_0_IRQHandler(void)
-{
- uint32_t flags;
- uint8_t status, val;
-
- /* Get GPIO status */
- flags = RGPIO_GetPinsInterruptFlags(GPIO1, kRGPIO_InterruptOutput0);
-
- /* Get PCAL6408A status */
- (void) PCAL6408A_IntStatusGet(&g_pcal6408aDev, &status);
-
- /* Get value and Clear PCAL6408A interrupts */
- (void) PCAL6408A_InputGet(&g_pcal6408aDev, &val);
-
- /* Clear GPIO interrupts */
- RGPIO_ClearPinsInterruptFlags(GPIO1, kRGPIO_InterruptOutput0, flags);
-
- /* Handle PF09 interrupt */
- if ((status & BIT8(PCAL6408A_INPUT_PF09_INT)) != 0U)
- {
- /* Asserts low */
- if ((val & BIT8(PCAL6408A_INPUT_PF09_INT)) == 0U)
- {
- BRD_SM_Pf09Handler();
- }
- }
-
- /* Handle PCA2131 interrupt */
- if (g_pca2131Used && ((status & BIT8(PCAL6408A_INPUT_PCA2131_INT))
- != 0U))
- {
- /* Asserts low */
- if ((val & BIT8(PCAL6408A_INPUT_PCA2131_INT)) == 0U)
- {
- BRD_SM_BbmHandler();
- }
- }
-
- /* Handle controls interrupts */
- BRD_SM_ControlHandler(status, val);
-
- /* Adjust dynamic IRQ priority */
- (void) DEV_SM_IrqPrioUpdate();
-}
-
/*==========================================================================*/
/*--------------------------------------------------------------------------*/
diff --git a/configs/ccimx95dvk.cfg b/configs/ccimx95dvk.cfg
index da383aab036c..86d39e6e1fba 100755
--- a/configs/ccimx95dvk.cfg
+++ b/configs/ccimx95dvk.cfg
@@ -197,7 +197,6 @@ ELE OWNER
FSB READONLY
GIC ACCESS
GPC OWNER
-GPIO1 OWNER
GPR0 OWNER
GPR1 OWNER
GPR2 OWNER
@@ -482,6 +481,7 @@ PERLPI_LPUART4 ALL
PERLPI_LPUART5 ALL
PERLPI_LPUART6 ALL
PERLPI_LPUART8 ALL
+PERLPI_GPIO1 ALL
PERLPI_WDOG3 ALL
PERLPI_WDOG4 ALL
SYS ALL
@@ -715,6 +715,7 @@ FLEXIO2 OWNER
FLEXSPI1 OWNER
FSB READONLY
GIC OWNER
+GPIO1 OWNER
GPIO2 OWNER
GPIO3 OWNER
GPIO4 OWNER
diff --git a/configs/ccimx95dvk/config_scmi.h b/configs/ccimx95dvk/config_scmi.h
index e1b81cc03f58..c1cc90313174 100644
--- a/configs/ccimx95dvk/config_scmi.h
+++ b/configs/ccimx95dvk/config_scmi.h
@@ -192,6 +192,7 @@
.perlpiPerms[DEV_SM_PERLPI_CAN3] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_CAN4] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_CAN5] = SM_SCMI_PERM_ALL, \
+ .perlpiPerms[DEV_SM_PERLPI_GPIO1] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_GPIO2] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_GPIO3] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_GPIO4] = SM_SCMI_PERM_ALL, \
@@ -474,6 +475,7 @@
.perlpiPerms[DEV_SM_PERLPI_CAN3] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_CAN4] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_CAN5] = SM_SCMI_PERM_ALL, \
+ .perlpiPerms[DEV_SM_PERLPI_GPIO1] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_GPIO2] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_GPIO3] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_GPIO4] = SM_SCMI_PERM_ALL, \
diff --git a/configs/ccimx95dvk/config_trdc.h b/configs/ccimx95dvk/config_trdc.h
index 1d8ed0b6fc95..47df6a7577d5 100644
--- a/configs/ccimx95dvk/config_trdc.h
+++ b/configs/ccimx95dvk/config_trdc.h
@@ -116,7 +116,6 @@
SM_CFG_W1(0x00010470U), 0x33333333U, \
SM_CFG_W1(0x00010474U), 0x00003000U, \
SM_CFG_W1(0x00010580U), 0x000003C0U, \
- SM_CFG_W1(0x000105a8U), 0x00000003U, \
SM_CFG_W1(0x00010640U), 0x99999999U, \
SM_CFG_W1(0x00010644U), 0x99999999U, \
SM_CFG_W1(0x00010648U), 0x99999999U, \
@@ -129,6 +128,7 @@
SM_CFG_W1(0x0001066cU), 0x90909000U, \
SM_CFG_W1(0x00010670U), 0x00009000U, \
SM_CFG_W1(0x00010780U), 0x099330C0U, \
+ SM_CFG_W1(0x000107a8U), 0x00000009U, \
SM_CFG_Z1(0x00010850U), \
SM_CFG_W1(0x00010854U), 0x9000C000U, \
SM_CFG_W1(0x00010858U), 0x00000099U, \

206
meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0004-ccimx95dvk-move-resources-from-M7-to-A55.patch Normal file
View File

@ -0,0 +1,206 @@
From: Javier Viguera <javier.viguera@digi.com>
Date: Tue, 16 Sep 2025 17:51:14 +0200
Subject: [PATCH] ccimx95dvk: move resources from M7 to A55
Moved from M7 to A55 domain:
* LPUART7
* PIN_GPIO_IO14
* PIN_GPIO_IO15
Upstream-Status: Inappropriate [DEY specific]
Signed-off-by: Javier Viguera <javier.viguera@digi.com>
---
configs/ccimx95dvk.cfg | 11 ++++-------
configs/ccimx95dvk/config_scmi.h | 15 ++++++++-------
configs/ccimx95dvk/config_test.h | 7 +------
configs/ccimx95dvk/config_trdc.h | 3 +--
4 files changed, 14 insertions(+), 22 deletions(-)
diff --git a/configs/ccimx95dvk.cfg b/configs/ccimx95dvk.cfg
index 86d39e6e1fba..393c29436894 100755
--- a/configs/ccimx95dvk.cfg
+++ b/configs/ccimx95dvk.cfg
@@ -369,7 +369,6 @@ LPIT1 OWNER
LPTMR1 OWNER
LPTMR2 OWNER
LPTPM1 OWNER
-LPUART3 OWNER, test
MSGINTR1 OWNER
MSGINTR2 OWNER
MU5_A OWNER
@@ -382,11 +381,6 @@ TSTMR2 OWNER
V2X_SHE1 OWNER
WDOG5 OWNER
-# Pins
-
-PIN_GPIO_IO14 OWNER
-PIN_GPIO_IO15 OWNER
-
# Memory
M7MIX DATA, begin=0x020380000, end=0x02047FFFF
@@ -477,6 +471,7 @@ PERLPI_GPIO4 ALL
PERLPI_GPIO5 ALL
PERLPI_LPUART1 ALL
PERLPI_LPUART2 ALL
+PERLPI_LPUART3 ALL
PERLPI_LPUART4 ALL
PERLPI_LPUART5 ALL
PERLPI_LPUART6 ALL
@@ -762,6 +757,7 @@ LPTPM5 OWNER
LPTPM6 OWNER
LPUART1 OWNER
LPUART2 OWNER
+LPUART3 OWNER
LPUART4 OWNER
LPUART5 OWNER
LPUART6 OWNER
@@ -914,6 +910,8 @@ PIN_GPIO_IO10 OWNER
PIN_GPIO_IO11 OWNER
PIN_GPIO_IO12 OWNER
PIN_GPIO_IO13 OWNER
+PIN_GPIO_IO14 OWNER
+PIN_GPIO_IO15 OWNER
PIN_GPIO_IO16 OWNER
PIN_GPIO_IO17 OWNER
PIN_GPIO_IO18 OWNER
@@ -993,4 +991,3 @@ OCRAM EXEC, begin=0x0204C0000, size=96K
GPU DATA, begin=0x04D900000, end=0x04DD7FFFF
DDR EXEC, begin=0x088000000, end=0x089FFFFFF
DDR EXEC, begin=0x08E000000, end=0x87FFFFFFF
-
diff --git a/configs/ccimx95dvk/config_scmi.h b/configs/ccimx95dvk/config_scmi.h
index c1cc90313174..0913c1339af0 100644
--- a/configs/ccimx95dvk/config_scmi.h
+++ b/configs/ccimx95dvk/config_scmi.h
@@ -69,7 +69,6 @@
.clkPerms[DEV_SM_CLK_CAN1] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_LPTMR1] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_LPTMR2] = SM_SCMI_PERM_ALL, \
- .clkPerms[DEV_SM_CLK_LPUART3] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_M7SYSTICK] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_M7] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_TSTMR2] = SM_SCMI_PERM_ALL, \
@@ -81,9 +80,6 @@
.daisyPerms[DEV_SM_DAISY_LPTMR2_0] = SM_SCMI_PERM_ALL, \
.daisyPerms[DEV_SM_DAISY_LPTMR2_1] = SM_SCMI_PERM_ALL, \
.daisyPerms[DEV_SM_DAISY_LPTMR2_2] = SM_SCMI_PERM_ALL, \
- .daisyPerms[DEV_SM_DAISY_LPUART3_CTS] = SM_SCMI_PERM_ALL, \
- .daisyPerms[DEV_SM_DAISY_LPUART3_RXD] = SM_SCMI_PERM_ALL, \
- .daisyPerms[DEV_SM_DAISY_LPUART3_TXD] = SM_SCMI_PERM_ALL, \
.faultPerms[DEV_SM_FAULT_M7_LOCKUP] = SM_SCMI_PERM_ALL, \
.faultPerms[DEV_SM_FAULT_M7_RESET] = SM_SCMI_PERM_ALL, \
.faultPerms[DEV_SM_FAULT_SW0] = SM_SCMI_PERM_ALL, \
@@ -94,10 +90,7 @@
.pdPerms[DEV_SM_PD_M7] = SM_SCMI_PERM_ALL, \
.perfPerms[DEV_SM_PERF_M7] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_CAN1] = SM_SCMI_PERM_ALL, \
- .perlpiPerms[DEV_SM_PERLPI_LPUART3] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_WDOG5] = SM_SCMI_PERM_ALL, \
- .pinPerms[DEV_SM_PIN_GPIO_IO14] = SM_SCMI_PERM_ALL, \
- .pinPerms[DEV_SM_PIN_GPIO_IO15] = SM_SCMI_PERM_ALL, \
.rtcPerms[BRD_SM_RTC_PCA2131] = SM_SCMI_PERM_ALL, \
.rtcPerms[DEV_SM_RTC_BBNSM] = SM_SCMI_PERM_PRIV, \
.sensorPerms[BRD_SM_SENSOR_TEMP_PF09] = SM_SCMI_PERM_SET, \
@@ -199,6 +192,7 @@
.perlpiPerms[DEV_SM_PERLPI_GPIO5] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_LPUART1] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_LPUART2] = SM_SCMI_PERM_ALL, \
+ .perlpiPerms[DEV_SM_PERLPI_LPUART3] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_LPUART4] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_LPUART5] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_LPUART6] = SM_SCMI_PERM_ALL, \
@@ -291,6 +285,7 @@
.clkPerms[DEV_SM_CLK_LPSPI8] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_LPUART1] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_LPUART2] = SM_SCMI_PERM_ALL, \
+ .clkPerms[DEV_SM_CLK_LPUART3] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_LPUART4] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_LPUART5] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_LPUART6] = SM_SCMI_PERM_ALL, \
@@ -398,6 +393,9 @@
.daisyPerms[DEV_SM_DAISY_LPSPI4_SCK] = SM_SCMI_PERM_ALL, \
.daisyPerms[DEV_SM_DAISY_LPSPI4_SDI] = SM_SCMI_PERM_ALL, \
.daisyPerms[DEV_SM_DAISY_LPSPI4_SDO] = SM_SCMI_PERM_ALL, \
+ .daisyPerms[DEV_SM_DAISY_LPUART3_CTS] = SM_SCMI_PERM_ALL, \
+ .daisyPerms[DEV_SM_DAISY_LPUART3_RXD] = SM_SCMI_PERM_ALL, \
+ .daisyPerms[DEV_SM_DAISY_LPUART3_TXD] = SM_SCMI_PERM_ALL, \
.daisyPerms[DEV_SM_DAISY_LPUART4_CTS] = SM_SCMI_PERM_ALL, \
.daisyPerms[DEV_SM_DAISY_LPUART4_RXD] = SM_SCMI_PERM_ALL, \
.daisyPerms[DEV_SM_DAISY_LPUART4_TXD] = SM_SCMI_PERM_ALL, \
@@ -482,6 +480,7 @@
.perlpiPerms[DEV_SM_PERLPI_GPIO5] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_LPUART1] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_LPUART2] = SM_SCMI_PERM_ALL, \
+ .perlpiPerms[DEV_SM_PERLPI_LPUART3] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_LPUART4] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_LPUART5] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_LPUART6] = SM_SCMI_PERM_ALL, \
@@ -536,6 +535,8 @@
.pinPerms[DEV_SM_PIN_GPIO_IO11] = SM_SCMI_PERM_ALL, \
.pinPerms[DEV_SM_PIN_GPIO_IO12] = SM_SCMI_PERM_ALL, \
.pinPerms[DEV_SM_PIN_GPIO_IO13] = SM_SCMI_PERM_ALL, \
+ .pinPerms[DEV_SM_PIN_GPIO_IO14] = SM_SCMI_PERM_ALL, \
+ .pinPerms[DEV_SM_PIN_GPIO_IO15] = SM_SCMI_PERM_ALL, \
.pinPerms[DEV_SM_PIN_GPIO_IO16] = SM_SCMI_PERM_ALL, \
.pinPerms[DEV_SM_PIN_GPIO_IO17] = SM_SCMI_PERM_ALL, \
.pinPerms[DEV_SM_PIN_GPIO_IO18] = SM_SCMI_PERM_ALL, \
diff --git a/configs/ccimx95dvk/config_test.h b/configs/ccimx95dvk/config_test.h
index cb737f33eede..efc15c56ffe9 100644
--- a/configs/ccimx95dvk/config_test.h
+++ b/configs/ccimx95dvk/config_test.h
@@ -143,12 +143,11 @@
/*--------------------------------------------------------------------------*/
/*! Config for number of tests */
-#define SM_SCMI_NUM_TEST 40U
+#define SM_SCMI_NUM_TEST 35U
/*! Config data array for tests */
#define SM_SCMI_TEST_CONFIG_DATA \
{.testId = TEST_BUTTON, .channel = 5U, .rsrc = DEV_SM_BUTTON_0}, \
- {.testId = TEST_CLK, .channel = 0U, .rsrc = DEV_SM_CLK_LPUART3}, \
{.testId = TEST_CLK, .channel = 5U, .rsrc = DEV_SM_CLK_DISPOCRAM}, \
{.testId = TEST_CLK, .channel = 5U, .rsrc = DEV_SM_CLK_ENETREF}, \
{.testId = TEST_CLK, .channel = 5U, .rsrc = DEV_SM_CLK_ENETTIMER1}, \
@@ -157,9 +156,6 @@
{.testId = TEST_CLK, .channel = 5U, .rsrc = DEV_SM_CLK_SAI1}, \
{.testId = TEST_CTRL, .channel = 5U, .rsrc = DEV_SM_CTRL_MQS1_SETTINGS}, \
{.testId = TEST_CTRL, .channel = 5U, .rsrc = DEV_SM_CTRL_SAI1_MCLK}, \
- {.testId = TEST_DAISY, .channel = 0U, .rsrc = DEV_SM_DAISY_LPUART3_CTS}, \
- {.testId = TEST_DAISY, .channel = 0U, .rsrc = DEV_SM_DAISY_LPUART3_RXD}, \
- {.testId = TEST_DAISY, .channel = 0U, .rsrc = DEV_SM_DAISY_LPUART3_TXD}, \
{.testId = TEST_DAISY, .channel = 5U, .rsrc = DEV_SM_DAISY_NETC_EMDC}, \
{.testId = TEST_DAISY, .channel = 5U, .rsrc = DEV_SM_DAISY_NETC_EMDIO}, \
{.testId = TEST_DAISY, .channel = 5U, .rsrc = DEV_SM_DAISY_NETC_ETH0_RMII_RX_ER}, \
@@ -182,7 +178,6 @@
{.testId = TEST_PERF, .channel = 5U, .rsrc = DEV_SM_PERF_GPU}, \
{.testId = TEST_PERF, .channel = 5U, .rsrc = DEV_SM_PERF_NPU}, \
{.testId = TEST_PERF, .channel = 5U, .rsrc = DEV_SM_PERF_VPU}, \
- {.testId = TEST_PERLPI, .channel = 0U, .rsrc = DEV_SM_PERLPI_LPUART3}, \
{.testId = TEST_PERLPI, .channel = 5U, .rsrc = DEV_SM_PERLPI_LPUART8}, \
{.testId = TEST_PIN, .channel = 5U, .rsrc = DEV_SM_PIN_UART1_RXD}, \
{.testId = TEST_RTC, .channel = 5U, .rsrc = DEV_SM_RTC_BBNSM}, \
diff --git a/configs/ccimx95dvk/config_trdc.h b/configs/ccimx95dvk/config_trdc.h
index 47df6a7577d5..dc6245097316 100644
--- a/configs/ccimx95dvk/config_trdc.h
+++ b/configs/ccimx95dvk/config_trdc.h
@@ -1168,7 +1168,7 @@
SM_CFG_W1(0x0001065cU), 0x99999999U, \
SM_CFG_W1(0x00010660U), 0x00909099U, \
SM_CFG_W1(0x00010664U), 0x99090990U, \
- SM_CFG_W1(0x00010668U), 0x09999999U, \
+ SM_CFG_W1(0x00010668U), 0x99999999U, \
SM_CFG_W1(0x0001066cU), 0x09999999U, \
SM_CFG_W1(0x00010670U), 0x99900009U, \
SM_CFG_W1(0x00010674U), 0x99999909U, \
@@ -1178,7 +1178,6 @@
SM_CFG_W1(0x000107a8U), 0x00000009U, \
SM_CFG_W1(0x00010860U), 0x00090000U, \
SM_CFG_W1(0x00010864U), 0x00909009U, \
- SM_CFG_W1(0x00010868U), 0x90000000U, \
SM_CFG_W1(0x00010878U), 0x00090000U, \
SM_CFG_Z1(0x00010a60U), \
SM_CFG_Z1(0x00010c60U), \

75
meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0005-ccimx95dvk-move-pads-to-non-secure-A55.patch Normal file
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@ -0,0 +1,75 @@
From: Hector Palacios <hector.palacios@digi.com>
Date: Wed, 24 Sep 2025 12:26:07 +0200
Subject: [PATCH] ccimx95dvk: move pads to non-secure A55
The following pads are multiplexed and used by A55 in Linux:
- PIN_UART2_RXD is used as LPUART1 CTS
- PIN_UART2_TXD is used as LPUART1 RTS
- PIN_PDM_BIT_STREAM1 is used as MIKROBUS_RST
Upstream-Status: Inappropriate [DEY specific]
Signed-off-by: Hector Palacios <hector.palacios@digi.com>
---
configs/ccimx95dvk.cfg | 5 ++++-
configs/ccimx95dvk/config_scmi.h | 3 +++
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/configs/ccimx95dvk.cfg b/configs/ccimx95dvk.cfg
index 393c29436894..bf5f0739f526 100755
--- a/configs/ccimx95dvk.cfg
+++ b/configs/ccimx95dvk.cfg
@@ -1,6 +1,7 @@
## ###################################################################
##
## Copyright 2023-2025 NXP
+## Copyright 2025 Digi International Inc.
##
## Redistribution and use in source and binary forms, with or without modification,
## are permitted provided that the following conditions are met:
@@ -285,7 +286,6 @@ L_STCU_NPUMIX OWNER
PIN_FCCU_ERR0 OWNER
PIN_I2C1_SCL OWNER
PIN_I2C1_SDA OWNER
-PIN_PDM_BIT_STREAM1 OWNER
PIN_GPIO_IO08 OWNER # LPUART7_TX
PIN_GPIO_IO09 OWNER # LPUART7_RX
PIN_WDOG_ANY OWNER
@@ -937,6 +937,7 @@ PIN_GPIO_IO37 OWNER
PIN_I2C2_SCL OWNER
PIN_I2C2_SDA OWNER
PIN_PDM_BIT_STREAM0 OWNER
+PIN_PDM_BIT_STREAM1 OWNER
PIN_PDM_CLK OWNER
PIN_SAI1_RXD0 OWNER
PIN_SAI1_TXC OWNER
@@ -970,6 +971,8 @@ PIN_SD3_DATA2 OWNER
PIN_SD3_DATA3 OWNER
PIN_UART1_RXD OWNER, test
PIN_UART1_TXD OWNER
+PIN_UART2_RXD OWNER
+PIN_UART2_TXD OWNER
PIN_XSPI1_DATA0 OWNER
PIN_XSPI1_DATA1 OWNER
PIN_XSPI1_DATA2 OWNER
diff --git a/configs/ccimx95dvk/config_scmi.h b/configs/ccimx95dvk/config_scmi.h
index 0913c1339af0..510de3d252a2 100644
--- a/configs/ccimx95dvk/config_scmi.h
+++ b/configs/ccimx95dvk/config_scmi.h
@@ -562,6 +562,7 @@
.pinPerms[DEV_SM_PIN_I2C2_SCL] = SM_SCMI_PERM_ALL, \
.pinPerms[DEV_SM_PIN_I2C2_SDA] = SM_SCMI_PERM_ALL, \
.pinPerms[DEV_SM_PIN_PDM_BIT_STREAM0] = SM_SCMI_PERM_ALL, \
+ .pinPerms[DEV_SM_PIN_PDM_BIT_STREAM1] = SM_SCMI_PERM_ALL, \
.pinPerms[DEV_SM_PIN_PDM_CLK] = SM_SCMI_PERM_ALL, \
.pinPerms[DEV_SM_PIN_SAI1_RXD0] = SM_SCMI_PERM_ALL, \
.pinPerms[DEV_SM_PIN_SAI1_TXC] = SM_SCMI_PERM_ALL, \
@@ -595,6 +596,8 @@
.pinPerms[DEV_SM_PIN_SD3_DATA3] = SM_SCMI_PERM_ALL, \
.pinPerms[DEV_SM_PIN_UART1_RXD] = SM_SCMI_PERM_ALL, \
.pinPerms[DEV_SM_PIN_UART1_TXD] = SM_SCMI_PERM_ALL, \
+ .pinPerms[DEV_SM_PIN_UART2_RXD] = SM_SCMI_PERM_ALL, \
+ .pinPerms[DEV_SM_PIN_UART2_TXD] = SM_SCMI_PERM_ALL, \
.pinPerms[DEV_SM_PIN_XSPI1_DATA0] = SM_SCMI_PERM_ALL, \
.pinPerms[DEV_SM_PIN_XSPI1_DATA1] = SM_SCMI_PERM_ALL, \
.pinPerms[DEV_SM_PIN_XSPI1_DATA2] = SM_SCMI_PERM_ALL, \

151
meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0006-ccimx95dvk-move-CAN1-to-be-used-by-A55.patch Normal file
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@ -0,0 +1,151 @@
From: Hector Palacios <hector.palacios@digi.com>
Date: Wed, 24 Sep 2025 13:01:57 +0200
Subject: [PATCH] ccimx95dvk: move CAN1 to be used by A55
CAN1 is no longer reserved by M7 but instead moved to
non-secure A55 so that it can be used by Linux.
Upstream-Status: Inappropriate [DEY specific]
Signed-off-by: Hector Palacios <hector.palacios@digi.com>
---
configs/ccimx95dvk.cfg | 3 ++-
configs/ccimx95dvk/config_bctrl.h | 14 +++++++-------
configs/ccimx95dvk/config_scmi.h | 7 ++++---
configs/ccimx95dvk/config_trdc.h | 3 +--
4 files changed, 14 insertions(+), 13 deletions(-)
diff --git a/configs/ccimx95dvk.cfg b/configs/ccimx95dvk.cfg
index bf5f0739f526..afec8eb5b738 100755
--- a/configs/ccimx95dvk.cfg
+++ b/configs/ccimx95dvk.cfg
@@ -362,7 +362,6 @@ SYS ALL
# Resources
M7P OWNER # CPUs must be first
-CAN_FD1 OWNER
FSB READONLY
IRQSTEER_M7 OWNER
LPIT1 OWNER
@@ -461,6 +460,7 @@ CHANNEL db=1, xport=smt, rpc=scmi, type=p2a_notify
PERF_A55 ALL
PERF_DRAM ALL
+PERLPI_CAN1 ALL
PERLPI_CAN2 ALL
PERLPI_CAN3 ALL
PERLPI_CAN4 ALL
@@ -582,6 +582,7 @@ CAMERA5 OWNER
CAMERA6 OWNER
CAMERA7 OWNER
CAMERA8 OWNER
+CAN_FD1 OWNER
CAN_FD2 OWNER
CAN_FD3 OWNER
CAN_FD4 OWNER
diff --git a/configs/ccimx95dvk/config_bctrl.h b/configs/ccimx95dvk/config_bctrl.h
index a757834c32ab..a55abe03ec02 100644
--- a/configs/ccimx95dvk/config_bctrl.h
+++ b/configs/ccimx95dvk/config_bctrl.h
@@ -61,13 +61,13 @@
#define SM_BCTRL_A_CONFIG \
{ \
SM_CFG_W1(0x00000008U), 0x00001804U, \
- SM_CFG_W1(0x0000000CU), 0x0000E56AU, \
- SM_CFG_W1(0x00000010U), 0x0000E56AU, \
- SM_CFG_W1(0x00000014U), 0x0000E56AU, \
- SM_CFG_W1(0x00000018U), 0x0000E56AU, \
- SM_CFG_W1(0x0000001CU), 0x0000E56AU, \
- SM_CFG_W1(0x00000020U), 0x0000E56AU, \
- SM_CFG_W1(0x00000024U), 0x00000291U, \
+ SM_CFG_W1(0x0000000CU), 0x0000E56BU, \
+ SM_CFG_W1(0x00000010U), 0x0000E56BU, \
+ SM_CFG_W1(0x00000014U), 0x0000E56BU, \
+ SM_CFG_W1(0x00000018U), 0x0000E56BU, \
+ SM_CFG_W1(0x0000001CU), 0x0000E56BU, \
+ SM_CFG_W1(0x00000020U), 0x0000E56BU, \
+ SM_CFG_W1(0x00000024U), 0x00000290U, \
SM_CFG_END \
}
diff --git a/configs/ccimx95dvk/config_scmi.h b/configs/ccimx95dvk/config_scmi.h
index 510de3d252a2..36cbb06126fe 100644
--- a/configs/ccimx95dvk/config_scmi.h
+++ b/configs/ccimx95dvk/config_scmi.h
@@ -66,7 +66,6 @@
.secure = 0U, \
.seenvId = 1U, \
.buttonPerms[DEV_SM_BUTTON_0] = SM_SCMI_PERM_NOTIFY, \
- .clkPerms[DEV_SM_CLK_CAN1] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_LPTMR1] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_LPTMR2] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_M7SYSTICK] = SM_SCMI_PERM_ALL, \
@@ -76,7 +75,6 @@
.ctrlPerms[BRD_SM_CTRL_BUTTON] = SM_SCMI_PERM_NOTIFY, \
.ctrlPerms[BRD_SM_CTRL_PCA2131] = SM_SCMI_PERM_ALL, \
.ctrlPerms[BRD_SM_CTRL_TEST] = SM_SCMI_PERM_ALL, \
- .daisyPerms[DEV_SM_DAISY_CAN1_RX] = SM_SCMI_PERM_ALL, \
.daisyPerms[DEV_SM_DAISY_LPTMR2_0] = SM_SCMI_PERM_ALL, \
.daisyPerms[DEV_SM_DAISY_LPTMR2_1] = SM_SCMI_PERM_ALL, \
.daisyPerms[DEV_SM_DAISY_LPTMR2_2] = SM_SCMI_PERM_ALL, \
@@ -89,7 +87,6 @@
.lmmPerms[2] = SM_SCMI_PERM_ALL, \
.pdPerms[DEV_SM_PD_M7] = SM_SCMI_PERM_ALL, \
.perfPerms[DEV_SM_PERF_M7] = SM_SCMI_PERM_ALL, \
- .perlpiPerms[DEV_SM_PERLPI_CAN1] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_WDOG5] = SM_SCMI_PERM_ALL, \
.rtcPerms[BRD_SM_RTC_PCA2131] = SM_SCMI_PERM_ALL, \
.rtcPerms[DEV_SM_RTC_BBNSM] = SM_SCMI_PERM_PRIV, \
@@ -181,6 +178,7 @@
.pdPerms[DEV_SM_PD_A55P] = SM_SCMI_PERM_ALL, \
.perfPerms[DEV_SM_PERF_A55] = SM_SCMI_PERM_ALL, \
.perfPerms[DEV_SM_PERF_DRAM] = SM_SCMI_PERM_ALL, \
+ .perlpiPerms[DEV_SM_PERLPI_CAN1] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_CAN2] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_CAN3] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_CAN4] = SM_SCMI_PERM_ALL, \
@@ -237,6 +235,7 @@
.clkPerms[DEV_SM_CLK_AUDIOPLL2] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_AUDIOPLL2_VCO] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_AUDIOXCVR] = SM_SCMI_PERM_ALL, \
+ .clkPerms[DEV_SM_CLK_CAN1] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_CAN2] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_CAN3] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_CAN4] = SM_SCMI_PERM_ALL, \
@@ -327,6 +326,7 @@
.ctrlPerms[DEV_SM_CTRL_SAI3_MCLK] = SM_SCMI_PERM_ALL, \
.ctrlPerms[DEV_SM_CTRL_SAI4_MCLK] = SM_SCMI_PERM_ALL, \
.ctrlPerms[DEV_SM_CTRL_SAI5_MCLK] = SM_SCMI_PERM_ALL, \
+ .daisyPerms[DEV_SM_DAISY_CAN1_RX] = SM_SCMI_PERM_ALL, \
.daisyPerms[DEV_SM_DAISY_CAN2_RX] = SM_SCMI_PERM_ALL, \
.daisyPerms[DEV_SM_DAISY_CAN3_RX] = SM_SCMI_PERM_ALL, \
.daisyPerms[DEV_SM_DAISY_CAN4_RX] = SM_SCMI_PERM_ALL, \
@@ -469,6 +469,7 @@
.perfPerms[DEV_SM_PERF_GPU] = SM_SCMI_PERM_ALL, \
.perfPerms[DEV_SM_PERF_NPU] = SM_SCMI_PERM_ALL, \
.perfPerms[DEV_SM_PERF_VPU] = SM_SCMI_PERM_ALL, \
+ .perlpiPerms[DEV_SM_PERLPI_CAN1] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_CAN2] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_CAN3] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_CAN4] = SM_SCMI_PERM_ALL, \
diff --git a/configs/ccimx95dvk/config_trdc.h b/configs/ccimx95dvk/config_trdc.h
index dc6245097316..12ebbc61ca64 100644
--- a/configs/ccimx95dvk/config_trdc.h
+++ b/configs/ccimx95dvk/config_trdc.h
@@ -123,7 +123,7 @@
SM_CFG_W1(0x00010650U), 0x09000309U, \
SM_CFG_W1(0x00010654U), 0x0000C900U, \
SM_CFG_W1(0x00010658U), 0x99909900U, \
- SM_CFG_W1(0x0001065cU), 0x00009099U, \
+ SM_CFG_W1(0x0001065cU), 0x00009999U, \
SM_CFG_W1(0x00010668U), 0x00009900U, \
SM_CFG_W1(0x0001066cU), 0x90909000U, \
SM_CFG_W1(0x00010670U), 0x00009000U, \
@@ -132,7 +132,6 @@
SM_CFG_Z1(0x00010850U), \
SM_CFG_W1(0x00010854U), 0x9000C000U, \
SM_CFG_W1(0x00010858U), 0x00000099U, \
- SM_CFG_W1(0x0001085cU), 0x00000900U, \
SM_CFG_W1(0x00010870U), 0x00000090U, \
SM_CFG_W1(0x00010874U), 0x00000999U, \
SM_CFG_W1(0x00010980U), 0x900000C0U, \

453
meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0007-ccimx95dvk-remove-PCAL6408A-IO-expander-from-EVK.patch Normal file
View File

@ -0,0 +1,453 @@
From: Hector Palacios <hector.palacios@digi.com>
Date: Thu, 25 Sep 2025 11:11:20 +0200
Subject: [PATCH 7/8] ccimx95dvk: remove PCAL6408A IO expander from EVK
NXP used this I2C IO expander on their EVK to process
wakeup interrupt lines.
This chip is not available on the DVK.
Signed-off-by: Hector Palacios <hector.palacios@digi.com>
---
boards/ccimx95dvk/board.c | 1 +
boards/ccimx95dvk/sm/Makefile | 4 +-
boards/ccimx95dvk/sm/brd_sm_bbm.c | 5 +-
boards/ccimx95dvk/sm/brd_sm_control.c | 96 +-------------------------
boards/ccimx95dvk/sm/brd_sm_control.h | 12 ++--
boards/ccimx95dvk/sm/brd_sm_handlers.c | 36 +---------
boards/ccimx95dvk/sm/brd_sm_handlers.h | 21 +-----
configs/ccimx95dvk.cfg | 6 --
configs/ccimx95dvk/config_scmi.h | 6 --
9 files changed, 12 insertions(+), 175 deletions(-)
diff --git a/boards/ccimx95dvk/board.c b/boards/ccimx95dvk/board.c
index 012a04540fd1..1f3c8cd3fdb9 100755
--- a/boards/ccimx95dvk/board.c
+++ b/boards/ccimx95dvk/board.c
@@ -1,5 +1,6 @@
/*
* Copyright 2023-2025 NXP
+ * Copyright 2025 Digi International Inc.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
diff --git a/boards/ccimx95dvk/sm/Makefile b/boards/ccimx95dvk/sm/Makefile
index d5b576737636..db27ea922733 100755
--- a/boards/ccimx95dvk/sm/Makefile
+++ b/boards/ccimx95dvk/sm/Makefile
@@ -1,6 +1,7 @@
## ###################################################################
##
## Copyright 2023 NXP
+## Copyright 2025 Digi International Inc.
##
## Redistribution and use in source and binary forms, with or without modification,
## are permitted provided that the following conditions are met:
@@ -40,7 +41,6 @@ INCLUDE += \
-I$(BOARDS_DIR) \
-I$(BOARD_DIR) \
-I$(BOARD_DIR)/sm \
- -I$(COMPONENTS_DIR)/pcal6408a \
-I$(COMPONENTS_DIR)/pf09 \
-I$(COMPONENTS_DIR)/pf53 \
-I$(COMPONENTS_DIR)/pca2131
@@ -50,7 +50,6 @@ VPATH += \
$(BOARDS_DIR) \
$(BOARD_DIR) \
$(BOARD_DIR)/sm \
- $(COMPONENTS_DIR)/pcal6408a \
$(COMPONENTS_DIR)/pf09 \
$(COMPONENTS_DIR)/pf53 \
$(COMPONENTS_DIR)/pca2131
@@ -63,7 +62,6 @@ OBJS += \
$(OUT)/brd_sm_sensor.o \
$(OUT)/brd_sm_voltage.o \
$(OUT)/brd_sm_bbm.o \
- $(OUT)/fsl_pcal6408a.o \
$(OUT)/fsl_pf09.o \
$(OUT)/fsl_pf53.o \
$(OUT)/fsl_pca2131.o
diff --git a/boards/ccimx95dvk/sm/brd_sm_bbm.c b/boards/ccimx95dvk/sm/brd_sm_bbm.c
index c2e5cd61dc9f..2b13931c7749 100755
--- a/boards/ccimx95dvk/sm/brd_sm_bbm.c
+++ b/boards/ccimx95dvk/sm/brd_sm_bbm.c
@@ -2,6 +2,7 @@
** ###################################################################
**
** Copyright 2025 NXP
+** Copyright 2025 Digi International Inc.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
@@ -415,8 +416,6 @@ int32_t BRD_SM_BbmRtcAlarmSet(uint32_t rtcId, bool enable, uint64_t val)
/* Enable interrupt */
if (PCA2131_IntEnable(&g_pca2131Dev, true))
{
- /* Enable bus expander interrupt */
- status = BRD_SM_BusExpMaskSet(0U, BIT8(6));
}
else
{
@@ -440,8 +439,6 @@ int32_t BRD_SM_BbmRtcAlarmSet(uint32_t rtcId, bool enable, uint64_t val)
/* Disable interrupt */
if (PCA2131_IntEnable(&g_pca2131Dev, false))
{
- /* Disable bus expander interrupt */
- status = BRD_SM_BusExpMaskSet(BIT8(6), BIT8(6));
}
else
{
diff --git a/boards/ccimx95dvk/sm/brd_sm_control.c b/boards/ccimx95dvk/sm/brd_sm_control.c
index 5b36c66c593c..8484a6895a3d 100755
--- a/boards/ccimx95dvk/sm/brd_sm_control.c
+++ b/boards/ccimx95dvk/sm/brd_sm_control.c
@@ -2,6 +2,7 @@
** ###################################################################
**
** Copyright 2023-2024 NXP
+** Copyright 2025 Digi International Inc.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
@@ -44,13 +45,6 @@
/* Local defines */
-/* PCAL6408A input signals */
-#define PCAL6408A_INPUT_SD3_WAKE 0U
-#define PCAL6408A_INPUT_PCIE1_WAKE 4U
-#define PCAL6408A_INPUT_BT_WAKE 5U
-#define PCAL6408A_INPUT_PCIE2_WAKE 6U
-#define PCAL6408A_INPUT_BUTTON 7U
-
/* Local types */
/* Local variables */
@@ -117,26 +111,7 @@ int32_t BRD_SM_ControlGet(uint32_t ctrlId, uint32_t *numRtn, uint32_t *rtn)
}
else
{
- uint8_t data;
-
- /* Read expander data input */
- if (PCAL6408A_InputGet(&g_pcal6408aDev, &data))
- {
- uint32_t shift = ctrlId - DEV_SM_NUM_CTRL;
-
- /* Adjust bit position */
- if (shift > 0U)
- {
- shift += 3U;
- }
-
- *numRtn = 1U;
- rtn[0] = (((uint32_t) data) >> shift) & 0x1UL;
- }
- else
- {
- status = SM_ERR_HARDWARE_ERROR;
- }
+ status = SM_ERR_HARDWARE_ERROR;
}
}
else
@@ -231,41 +206,12 @@ int32_t BRD_SM_ControlFlagsSet(uint32_t ctrlId, uint32_t flags)
}
else
{
- uint8_t mask;
- uint32_t val;
- uint32_t enb = (flags != 0U) ? 0U : 1U;
-
switch (ctrlId)
{
- case BRD_SM_CTRL_SD3_WAKE:
- mask = BIT8(PCAL6408A_INPUT_SD3_WAKE);
- val = (enb & 0x1U) << PCAL6408A_INPUT_SD3_WAKE;
- break;
- case BRD_SM_CTRL_PCIE1_WAKE:
- mask = BIT8(PCAL6408A_INPUT_PCIE1_WAKE);
- val = (enb & 0x1U) << PCAL6408A_INPUT_PCIE1_WAKE;
- break;
- case BRD_SM_CTRL_BT_WAKE:
- mask = BIT8(PCAL6408A_INPUT_BT_WAKE);
- val = (enb & 0x1U) << PCAL6408A_INPUT_BT_WAKE;
- break;
- case BRD_SM_CTRL_PCIE2_WAKE:
- mask = BIT8(PCAL6408A_INPUT_PCIE2_WAKE);
- val = (enb & 0x1U) << PCAL6408A_INPUT_PCIE2_WAKE;
- break;
- case BRD_SM_CTRL_BUTTON:
- mask = BIT8(PCAL6408A_INPUT_BUTTON);
- val = (enb & 0x1U) << PCAL6408A_INPUT_BUTTON;
- break;
default:
status = SM_ERR_NOT_FOUND;
break;
}
-
- if (status == SM_ERR_SUCCESS)
- {
- status = BRD_SM_BusExpMaskSet((uint8_t) val, mask);
- }
}
return status;
@@ -276,42 +222,6 @@ int32_t BRD_SM_ControlFlagsSet(uint32_t ctrlId, uint32_t flags)
/*--------------------------------------------------------------------------*/
void BRD_SM_ControlHandler(uint8_t status, uint8_t val)
{
- uint32_t data = (uint32_t) val;
-
- /* Handle SD3 wake */
- if ((status & BIT8(PCAL6408A_INPUT_SD3_WAKE)) != 0U)
- {
- LMM_MiscControlEvent(BRD_SM_CTRL_SD3_WAKE,
- ((data >> PCAL6408A_INPUT_SD3_WAKE) & 0x1U) + 1U);
- }
-
- /* Handle PCIe1 wake */
- if ((status & BIT8(PCAL6408A_INPUT_PCIE1_WAKE)) != 0U)
- {
- LMM_MiscControlEvent(BRD_SM_CTRL_PCIE1_WAKE,
- ((data >> PCAL6408A_INPUT_PCIE1_WAKE) & 0x1U) + 1U);
- }
-
- /* Handle BT wake */
- if ((status & BIT8(PCAL6408A_INPUT_BT_WAKE)) != 0U)
- {
- LMM_MiscControlEvent(BRD_SM_CTRL_BT_WAKE,
- ((data >> PCAL6408A_INPUT_BT_WAKE) & 0x1U) + 1U);
- }
-
- /* Handle PCIe2 wake */
- if (((status & BIT8(PCAL6408A_INPUT_PCIE2_WAKE)) != 0U)
- && !g_pca2131Used)
- {
- LMM_MiscControlEvent(BRD_SM_CTRL_PCIE2_WAKE,
- ((data >> PCAL6408A_INPUT_PCIE2_WAKE) & 0x1U) + 1U);
- }
-
- /* Handle button */
- if ((status & BIT8(PCAL6408A_INPUT_BUTTON)) != 0U)
- {
- LMM_MiscControlEvent(BRD_SM_CTRL_BUTTON,
- ((data >> PCAL6408A_INPUT_BUTTON) & 0x1U) + 1U);
- }
+ // Call pertinent LMM_MiscControlEvent()
}
diff --git a/boards/ccimx95dvk/sm/brd_sm_control.h b/boards/ccimx95dvk/sm/brd_sm_control.h
index bf893782e1d7..12365e56d7e4 100755
--- a/boards/ccimx95dvk/sm/brd_sm_control.h
+++ b/boards/ccimx95dvk/sm/brd_sm_control.h
@@ -2,6 +2,7 @@
** ###################################################################
**
** Copyright 2023-2024 NXP
+** Copyright 2025 Digi International Inc.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
@@ -66,7 +67,7 @@
/** @} */
/*! Number of board controls */
-#define BRD_SM_NUM_CTRL 7UL
+#define BRD_SM_NUM_CTRL 2UL
/*! Total number of controls */
#define SM_NUM_CTRL (DEV_SM_NUM_CTRL + BRD_SM_NUM_CTRL)
@@ -75,13 +76,8 @@
* @name BRD_SM control domain indexes
*/
/** @{ */
-#define BRD_SM_CTRL_SD3_WAKE (DEV_SM_NUM_CTRL + 0U) /*!< PCAL6408A-0 */
-#define BRD_SM_CTRL_PCIE1_WAKE (DEV_SM_NUM_CTRL + 1U) /*!< PCAL6408A-4 */
-#define BRD_SM_CTRL_BT_WAKE (DEV_SM_NUM_CTRL + 2U) /*!< PCAL6408A-5 */
-#define BRD_SM_CTRL_PCIE2_WAKE (DEV_SM_NUM_CTRL + 3U) /*!< PCAL6408A-6 */
-#define BRD_SM_CTRL_BUTTON (DEV_SM_NUM_CTRL + 4U) /*!< PCAL6408A-7 */
-#define BRD_SM_CTRL_TEST (DEV_SM_NUM_CTRL + 5U) /*!< Test */
-#define BRD_SM_CTRL_PCA2131 (DEV_SM_NUM_CTRL + 6U) /*!< PCA2131 raw access */
+#define BRD_SM_CTRL_TEST (DEV_SM_NUM_CTRL + 0U) /*!< Test */
+#define BRD_SM_CTRL_PCA2131 (DEV_SM_NUM_CTRL + 1U) /*!< PCA2131 raw access */
/** @} */
/* Types */
diff --git a/boards/ccimx95dvk/sm/brd_sm_handlers.c b/boards/ccimx95dvk/sm/brd_sm_handlers.c
index 19ee28e93134..a42359f15e8b 100755
--- a/boards/ccimx95dvk/sm/brd_sm_handlers.c
+++ b/boards/ccimx95dvk/sm/brd_sm_handlers.c
@@ -2,6 +2,7 @@
** ###################################################################
**
** Copyright 2023-2025 NXP
+** Copyright 2025 Digi International Inc.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
@@ -48,23 +49,16 @@
/* I2C device addresses */
#define BOARD_PF09_DEV_ADDR 0x08U
-#define BOARD_PCAL6408A_DEV_ADDR 0x20U
#define BOARD_PF5301_DEV_ADDR 0x2AU
#define BOARD_PF5302_DEV_ADDR 0x29U
#define BOARD_PCA2131_DEV_ADDR 0x53U
-#define PCAL6408A_INPUT_PF53_ARM_PG 1U
-#define PCAL6408A_INPUT_PF53_SOC_PG 2U
-#define PCAL6408A_INPUT_PF09_INT 3U
-#define PCAL6408A_INPUT_PCA2131_INT 6U
-
/* Local types */
/* Local variables */
/* Global variables */
-PCAL6408A_Type g_pcal6408aDev;
PF09_Type g_pf09Dev;
PF53_Type g_pf5301Dev;
PF53_Type g_pf5302Dev;
@@ -238,34 +232,6 @@ int32_t BRD_SM_SerialDevicesInit(void)
return status;
}
-/*--------------------------------------------------------------------------*/
-/* Set bus expander interrupt mask */
-/*--------------------------------------------------------------------------*/
-int32_t BRD_SM_BusExpMaskSet(uint8_t val, uint8_t mask)
-{
- int32_t status = SM_ERR_SUCCESS;
- static uint8_t cachedMask = PCAL6408A_INITIAL_MASK;
- uint8_t newMask = (cachedMask & ~mask);
-
- newMask |= val;
-
- /* Mask changed? */
- if (cachedMask != newMask)
- {
- if (PCAL6408A_IntMaskSet(&g_pcal6408aDev, newMask))
- {
- cachedMask = newMask;
- }
- else
- {
- status = SM_ERR_HARDWARE_ERROR;
- }
- }
-
- /* Return status */
- return status;
-}
-
/*==========================================================================*/
/*--------------------------------------------------------------------------*/
diff --git a/boards/ccimx95dvk/sm/brd_sm_handlers.h b/boards/ccimx95dvk/sm/brd_sm_handlers.h
index e34d52b50f7a..781a443e8444 100755
--- a/boards/ccimx95dvk/sm/brd_sm_handlers.h
+++ b/boards/ccimx95dvk/sm/brd_sm_handlers.h
@@ -2,6 +2,7 @@
** ###################################################################
**
** Copyright 2023-2024 NXP
+** Copyright 2025 Digi International Inc.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
@@ -52,16 +53,12 @@
#include "sm.h"
#include "dev_sm.h"
-#include "fsl_pcal6408a.h"
#include "fsl_pf09.h"
#include "fsl_pf53.h"
#include "fsl_pca2131.h"
/* Defines */
-/*! Initial PCAL6408A interrupt mask */
-#define PCAL6408A_INITIAL_MASK 0xF7U
-
/*! Number of board IRQs participating dynamic prioritization */
#define BOARD_NUM_IRQ_PRIO_IDX 1U
@@ -72,9 +69,6 @@
/* External variables */
-/*! Handle to access PCAL6408A */
-extern PCAL6408A_Type g_pcal6408aDev;
-
/*! Handle to access PF09 */
extern PF09_Type g_pf09Dev;
@@ -105,19 +99,6 @@ extern uint32_t g_pmicFaultFlags;
*/
int32_t BRD_SM_SerialDevicesInit(void);
-/*!
- * Enable/disable bus expander interrupts.
- *
- * @param[in] val Value to write
- * @param[in] mask Mask of bits to modify
- *
- * This function allows a caller to configure the bus expander.
- * interrupts.
- *
- * @return Returns the status (::SM_ERR_SUCCESS = success).
- */
-int32_t BRD_SM_BusExpMaskSet(uint8_t val, uint8_t mask);
-
/*!
* GPIO 1 interrupt 0 handler.
*/
diff --git a/configs/ccimx95dvk.cfg b/configs/ccimx95dvk.cfg
index afec8eb5b738..4af5cea789d9 100755
--- a/configs/ccimx95dvk.cfg
+++ b/configs/ccimx95dvk.cfg
@@ -345,7 +345,6 @@ CHANNEL db=2, xport=smt, check=crc32, rpc=scmi, \
# API
-BRD_SM_CTRL_BUTTON NOTIFY
BRD_SM_CTRL_PCA2131 ALL
BRD_SM_CTRL_TEST ALL
BRD_SM_RTC_PCA2131 ALL
@@ -532,11 +531,6 @@ CHANNEL db=1, xport=smt, rpc=scmi, type=p2a_notify
AUDIO_PLL1 ALL
AUDIO_PLL2 ALL
-BRD_SM_CTRL_BT_WAKE NOTIFY
-BRD_SM_CTRL_BUTTON NOTIFY
-BRD_SM_CTRL_PCIE1_WAKE NOTIFY
-BRD_SM_CTRL_PCIE2_WAKE NOTIFY
-BRD_SM_CTRL_SD3_WAKE NOTIFY
BRD_SM_RTC_PCA2131 PRIV
BRD_SM_SENSOR_TEMP_PF09 ALL
BRD_SM_SENSOR_TEMP_PF5301 SET
diff --git a/configs/ccimx95dvk/config_scmi.h b/configs/ccimx95dvk/config_scmi.h
index 36cbb06126fe..d251f7910b39 100644
--- a/configs/ccimx95dvk/config_scmi.h
+++ b/configs/ccimx95dvk/config_scmi.h
@@ -72,7 +72,6 @@
.clkPerms[DEV_SM_CLK_M7] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_TSTMR2] = SM_SCMI_PERM_ALL, \
.cpuPerms[DEV_SM_CPU_M7P] = SM_SCMI_PERM_ALL, \
- .ctrlPerms[BRD_SM_CTRL_BUTTON] = SM_SCMI_PERM_NOTIFY, \
.ctrlPerms[BRD_SM_CTRL_PCA2131] = SM_SCMI_PERM_ALL, \
.ctrlPerms[BRD_SM_CTRL_TEST] = SM_SCMI_PERM_ALL, \
.daisyPerms[DEV_SM_DAISY_LPTMR2_0] = SM_SCMI_PERM_ALL, \
@@ -314,11 +313,6 @@
.clkPerms[DEV_SM_CLK_VIDEOPLL1_VCO] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_VPUDSP] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_XSPISLVROOT] = SM_SCMI_PERM_ALL, \
- .ctrlPerms[BRD_SM_CTRL_BT_WAKE] = SM_SCMI_PERM_NOTIFY, \
- .ctrlPerms[BRD_SM_CTRL_BUTTON] = SM_SCMI_PERM_NOTIFY, \
- .ctrlPerms[BRD_SM_CTRL_PCIE1_WAKE] = SM_SCMI_PERM_NOTIFY, \
- .ctrlPerms[BRD_SM_CTRL_PCIE2_WAKE] = SM_SCMI_PERM_NOTIFY, \
- .ctrlPerms[BRD_SM_CTRL_SD3_WAKE] = SM_SCMI_PERM_NOTIFY, \
.ctrlPerms[DEV_SM_CTRL_ADC_TEST] = SM_SCMI_PERM_ALL, \
.ctrlPerms[DEV_SM_CTRL_MQS1_SETTINGS] = SM_SCMI_PERM_ALL, \
.ctrlPerms[DEV_SM_CTRL_PDM_CLK_SEL] = SM_SCMI_PERM_ALL, \

1197
meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0008-ccimx95dvk-remove-PCA2123-RTC-from-EVK.patch Normal file
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File diff suppressed because it is too large Load Diff

14
meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager_1.0.0.bbappend Normal file
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@ -0,0 +1,14 @@
# Copyright (C) 2025, Digi International Inc.
FILESEXTRAPATHS:prepend := "${THISDIR}/${BPN}:"
SRC_URI:append:dey = " \
file://0001-ccimx95dvk-add-new-platform-config-and-board.patch \
file://0002-ccimx95dvk-configure-board-and-switch-debug-UART-to-.patch \
file://0003-ccimx95dvk-disable-PCAL6408A-expander-and-move-GPIO1.patch \
file://0004-ccimx95dvk-move-resources-from-M7-to-A55.patch \
file://0005-ccimx95dvk-move-pads-to-non-secure-A55.patch \
file://0006-ccimx95dvk-move-CAN1-to-be-used-by-A55.patch \
file://0007-ccimx95dvk-remove-PCAL6408A-IO-expander-from-EVK.patch \
file://0008-ccimx95dvk-remove-PCA2123-RTC-from-EVK.patch \
"