diff --git a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf/0005-imx8mm-set-BL32_BASE-and-map-high-DRAM-for-ccimx8mm-.patch b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf/0005-imx8mm-set-BL32_BASE-and-map-high-DRAM-for-ccimx8mm-.patch new file mode 100644 index 000000000..7d359d352 --- /dev/null +++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf/0005-imx8mm-set-BL32_BASE-and-map-high-DRAM-for-ccimx8mm-.patch @@ -0,0 +1,67 @@ +From: Javier Viguera +Date: Fri, 11 Apr 2025 15:01:33 +0200 +Subject: [PATCH] imx8mm: set BL32_BASE and map high DRAM for ccimx8mm support + +Set BL32_BASE to 0x7e000000 (32MiB below the first gigabyte of DDR) to +align with the OP-TEE layout used across ccimx8mm variants. Add support +for high-memory DDR by defining and mapping an extra 1GB mem at 0x100000000 +to support the 4GB variant. + +Upstream-Status: Inappropriate [DEY specific] + +Signed-off-by: Javier Viguera +--- + plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c | 1 + + plat/imx/imx8m/imx8mm/include/platform_def.h | 6 ++++-- + plat/imx/imx8m/imx8mm/platform.mk | 2 +- + 3 files changed, 6 insertions(+), 3 deletions(-) + +diff --git a/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c b/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c +index 388deae2b0e8..76f8a34d12fb 100644 +--- a/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c ++++ b/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c +@@ -51,6 +51,7 @@ static const mmap_region_t imx_mmap[] = { + MAP_REGION_FLAT(IMX_ROM_BASE, IMX_ROM_SIZE, MT_MEMORY | MT_RO), /* ROM code */ + #ifndef PLAT_XLAT_TABLES_DYNAMIC + MAP_REGION_FLAT(IMX_DRAM_BASE, IMX_DRAM_SIZE, MT_MEMORY | MT_RW | MT_NS), /* DRAM */ ++ MAP_REGION_FLAT(IMX_DRAM2_BASE, IMX_DRAM2_SIZE, MT_MEMORY | MT_RW | MT_NS), /* DRAM */ + #endif + MAP_REGION_FLAT(IMX_TCM_BASE, IMX_TCM_SIZE, MT_MEMORY | MT_RW | MT_NS), /* TCM */ + {0}, +diff --git a/plat/imx/imx8m/imx8mm/include/platform_def.h b/plat/imx/imx8m/imx8mm/include/platform_def.h +index e721664087f8..44926451b2a2 100644 +--- a/plat/imx/imx8m/imx8mm/include/platform_def.h ++++ b/plat/imx/imx8m/imx8mm/include/platform_def.h +@@ -69,8 +69,8 @@ + #define PLAT_GICD_BASE U(0x38800000) + #define PLAT_GICR_BASE U(0x38880000) + +-#define PLAT_VIRT_ADDR_SPACE_SIZE (1ull << 32) +-#define PLAT_PHY_ADDR_SPACE_SIZE (1ull << 32) ++#define PLAT_VIRT_ADDR_SPACE_SIZE (1ull << 34) ++#define PLAT_PHY_ADDR_SPACE_SIZE (1ull << 34) + + #ifdef SPD_trusty + #define MAX_XLAT_TABLES 10 +@@ -125,6 +125,8 @@ + #define IMX_CAAM_RAM_SIZE U(0x10000) + #define IMX_DRAM_BASE U(0x40000000) + #define IMX_DRAM_SIZE U(0xc0000000) ++#define IMX_DRAM2_BASE U(0x100000000) ++#define IMX_DRAM2_SIZE U(0x40000000) + #define IMX_TCM_BASE U(0x7E0000) + #define IMX_TCM_SIZE U(0x40000) + +diff --git a/plat/imx/imx8m/imx8mm/platform.mk b/plat/imx/imx8m/imx8mm/platform.mk +index 1de30f40f397..4fe3cca34065 100644 +--- a/plat/imx/imx8m/imx8mm/platform.mk ++++ b/plat/imx/imx8m/imx8mm/platform.mk +@@ -166,7 +166,7 @@ ERRATA_A53_835769 := 1 + ERRATA_A53_843419 := 1 + ERRATA_A53_855873 := 1 + +-BL32_BASE ?= 0xbe000000 ++BL32_BASE ?= 0x7e000000 + $(eval $(call add_define,BL32_BASE)) + + BL32_SIZE ?= 0x2000000 diff --git a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf_%.bbappend b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf_%.bbappend index 7b3d1e503..336f4cf98 100644 --- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf_%.bbappend +++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf_%.bbappend @@ -7,6 +7,7 @@ SRC_URI:append:ccimx8m = " \ file://0002-imx8mm-Disable-M4-debug-console.patch \ file://0003-imx8mn-Define-UART1-as-console-for-boot-stage.patch \ file://0004-imx8mn-Disable-M7-debug-console.patch \ + file://0005-imx8mm-set-BL32_BASE-and-map-high-DRAM-for-ccimx8mm-.patch \ " SRC_URI:append:ccimx91 = " \ file://0001-ccimx91-use-UART6-for-the-default-console.patch \ diff --git a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-mkimage/files/0004-imx8mm-adjust-TEE_LOAD_ADDR-for-ccimx8mm.patch b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-mkimage/files/0004-imx8mm-adjust-TEE_LOAD_ADDR-for-ccimx8mm.patch new file mode 100644 index 000000000..da4184245 --- /dev/null +++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-mkimage/files/0004-imx8mm-adjust-TEE_LOAD_ADDR-for-ccimx8mm.patch @@ -0,0 +1,26 @@ +From: Javier Viguera +Date: Mon, 7 Apr 2025 16:57:39 +0200 +Subject: [PATCH] imx8mm: adjust TEE_LOAD_ADDR for ccimx8mm + +This change aligns with equivalent changes in the Optee and ATF. + +Upstream-Status: Inappropriate [DEY specific] + +Signed-off-by: Javier Viguera +--- + iMX8M/soc.mak | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/iMX8M/soc.mak b/iMX8M/soc.mak +index ffd70af8ac7d..7ab1ea099894 100644 +--- a/iMX8M/soc.mak ++++ b/iMX8M/soc.mak +@@ -35,7 +35,7 @@ PLAT = imx8mm + HDMI = no + SPL_LOAD_ADDR = 0x7E1000 + SPL_FSPI_LOAD_ADDR = 0x7E2000 +-TEE_LOAD_ADDR ?= 0xbe000000 ++TEE_LOAD_ADDR ?= 0x7e000000 + ATF_LOAD_ADDR = 0x00920000 + VAL_BOARD = val + #define the F(Q)SPI header file diff --git a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-mkimage/imx-boot_1.0.bbappend b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-mkimage/imx-boot_1.0.bbappend index 67b8e2981..5cab81e18 100644 --- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-mkimage/imx-boot_1.0.bbappend +++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-mkimage/imx-boot_1.0.bbappend @@ -5,6 +5,7 @@ FILESEXTRAPATHS:prepend := "${THISDIR}/files:" SRC_URI:append:ccimx8m = " \ file://0002-imx8m-soc.mak-capture-commands-output-into-a-log-fil.patch \ file://0003-imx8m-print_fit_hab-follow-symlinks.patch \ + file://0004-imx8mm-adjust-TEE_LOAD_ADDR-for-ccimx8mm.patch \ " SRC_URI:append:ccimx8x = " \ file://0001-iMX8QX-soc.mak-capture-commands-output-into-a-log-fi.patch \ diff --git a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os/0001-plat-imx-add-support-for-ConnectCore-8M-Mini.patch b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os/0001-plat-imx-add-support-for-ConnectCore-8M-Mini.patch new file mode 100644 index 000000000..f96f02ff2 --- /dev/null +++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os/0001-plat-imx-add-support-for-ConnectCore-8M-Mini.patch @@ -0,0 +1,55 @@ +From: Javier Viguera +Date: Fri, 11 Apr 2025 15:13:18 +0200 +Subject: [PATCH] plat-imx: add support for ConnectCore 8M Mini + +Add support for ccimx8mmdvk platform flavor: +* Define a DDR size that supports up to 4GB. +* Force TZDRAM base to 0x7e000000 for consistent OP-TEE base address + across all ccimx8mm variants, regardless of actual DDR size. +* Set UART base to UART1_BASE. + +Upstream-Status: Inappropriate [DEY specific] + +Signed-off-by: Javier Viguera +--- + core/arch/arm/plat-imx/conf.mk | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +diff --git a/core/arch/arm/plat-imx/conf.mk b/core/arch/arm/plat-imx/conf.mk +index d1fc2882e598..62cc51b61063 100644 +--- a/core/arch/arm/plat-imx/conf.mk ++++ b/core/arch/arm/plat-imx/conf.mk +@@ -63,6 +63,7 @@ mx8mq-flavorlist = \ + mx8mqevk + + mx8mm-flavorlist = \ ++ ccimx8mmdvk \ + mx8mmevk \ + mx8mm_cl_iot_gate + +@@ -412,6 +413,15 @@ CFG_DDR_SIZE ?= 0xc0000000 + CFG_UART_BASE ?= UART1_BASE + endif + ++ifneq (,$(filter $(PLATFORM_FLAVOR),ccimx8mmdvk)) ++# Configure DDR size for the variant with maximum memory ++CFG_DDR_SIZE ?= 0x100000000 ++CFG_UART_BASE ?= UART1_BASE ++$(call force,CFG_CCIMX8MM,y) ++$(call force,CFG_CORE_LARGE_PHYS_ADDR,y) ++$(call force,CFG_CORE_ARM64_PA_BITS,36) ++endif ++ + ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mmevk)) + CFG_DDR_SIZE ?= 0x80000000 + CFG_UART_BASE ?= UART2_BASE +@@ -587,6 +597,9 @@ else ifneq (,$(filter y, $(CFG_MX95))) + CFG_TZDRAM_START ?= ($(CFG_DRAM_BASE) + 0x0C000000) + # On i.MX95 we will have 32MB OP-TEE memory and 2MB Shared Memory after that. + CFG_TZDRAM_SIZE ?= 0x02000000 ++else ifneq (,$(filter y, $(CFG_CCIMX8MM))) ++# Set the Optee base address at the end of the first GB (where 0x02000000 = CFG_TZDRAM_SIZE + CFG_SHMEM_SIZE). ++CFG_TZDRAM_START ?= ($(CFG_DRAM_BASE) - 0x02000000 + 0x40000000) + else ifneq (,$(filter y, $(CFG_MX8MM) $(CFG_MX8MQ) $(CFG_MX8QM) $(CFG_MX8QX))) + CFG_TZDRAM_START ?= ($(CFG_DRAM_BASE) - 0x02000000 + $(CFG_DDR_SIZE)) + else diff --git a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os_4.4.0.imx.bbappend b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os_4.4.0.imx.bbappend index 6f69344c7..be5ab0543 100644 --- a/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os_4.4.0.imx.bbappend +++ b/meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os_4.4.0.imx.bbappend @@ -3,6 +3,10 @@ FILESEXTRAPATHS:prepend := "${THISDIR}/${BPN}:" SRC_URI += "file://environment.d-optee-sdk.sh" +SRC_URI:append:ccimx8mm = " \ + file://0001-plat-imx-add-support-for-ConnectCore-8M-Mini.patch \ +" + SRC_URI:append:ccimx91 = " \ file://0001-core-imx-support-ccimx91-dvk.patch \ " @@ -12,6 +16,7 @@ SRC_URI:append:ccimx93 = " \ file://0002-core-ccimx93-enable-AES_HUK-trusted-application.patch \ " +PLATFORM_FLAVOR:ccimx8mm = "ccimx8mmdvk" PLATFORM_FLAVOR:ccimx91 = "ccimx91dvk" PLATFORM_FLAVOR:ccimx93 = "ccimx93dvk"