From 94b6e01c962b58ac2f0951335e58def7906aac33 Mon Sep 17 00:00:00 2001 From: Hector Palacios Date: Mon, 24 Sep 2018 17:05:07 +0200 Subject: [PATCH 01/30] meta-digi-dey: revert some recipes to build from master branches During the merge of the maintainance branch and the manual revert of some recipes, these were forgotten. Signed-off-by: Hector Palacios --- .../recipes-digi/trustfence/trustfence-sign-tools_git.bb | 6 +++--- .../recipes-digi/dey-examples/awsiotsdk-demo_git.bb | 6 +++--- .../recipes-digi/dey-examples/dey-examples-cryptochip.bb | 6 +++--- .../recipes-digi/dey-examples/dey-examples-digiapix.bb | 6 +++--- 4 files changed, 12 insertions(+), 12 deletions(-) diff --git a/meta-digi-arm/recipes-digi/trustfence/trustfence-sign-tools_git.bb b/meta-digi-arm/recipes-digi/trustfence/trustfence-sign-tools_git.bb index 6e391ba1b..882c70886 100644 --- a/meta-digi-arm/recipes-digi/trustfence/trustfence-sign-tools_git.bb +++ b/meta-digi-arm/recipes-digi/trustfence/trustfence-sign-tools_git.bb @@ -5,8 +5,8 @@ LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/GPL-2.0;md5=801f80980d171dd6425 DEPENDS = "trustfence-cst coreutils util-linux" -SRCBRANCH = "v2017.03/maint" -SRCREV = "8d60f536d2063ac6a0676bdf34c4c8c8807371c5" +SRCBRANCH = "v2017.03/master" +SRCREV = "${AUTOREV}" S = "${WORKDIR}" @@ -14,7 +14,7 @@ S = "${WORKDIR}" UBOOT_GIT_URI ?= "${@base_conditional('DIGI_INTERNAL_GIT', '1' , '${DIGI_GIT}u-boot-denx.git', '${DIGI_GITHUB_GIT}/u-boot.git', d)}" SRC_URI = " \ - ${UBOOT_GIT_URI};nobranch=1 \ + ${UBOOT_GIT_URI};branch=${SRCBRANCH} \ file://trustfence-sign-kernel.sh;name=kernel-script \ file://sign_uimage;name=kernel-sign \ file://encrypt_uimage;name=kernel-encrypt \ diff --git a/meta-digi-dey/recipes-digi/dey-examples/awsiotsdk-demo_git.bb b/meta-digi-dey/recipes-digi/dey-examples/awsiotsdk-demo_git.bb index 4165f97cb..b9b7c0f7b 100644 --- a/meta-digi-dey/recipes-digi/dey-examples/awsiotsdk-demo_git.bb +++ b/meta-digi-dey/recipes-digi/dey-examples/awsiotsdk-demo_git.bb @@ -14,15 +14,15 @@ AWS_USER_LED_ccimx6ulsbc ?= "488" AWS_USER_LED_ccimx6sbc ?= "34" AWS_USER_LED_ccimx6qpsbc ?= "34" -SRCBRANCH = "dey-2.4/maint" -SRCREV = "6bb9699c29107cad06654bf537e92e4c9ec1b45c" +SRCBRANCH = "master" +SRCREV = "${AUTOREV}" CC_STASH = "${DIGI_MTK_GIT}dey/dey-examples.git;protocol=ssh" CC_GITHUB = "${DIGI_GITHUB_GIT}/dey-examples.git;protocol=git" CC_GIT_URI ?= "${@base_conditional('DIGI_INTERNAL_GIT', '1' , '${CC_STASH}', '${CC_GITHUB}', d)}" -SRC_URI = "${CC_GIT_URI};nobranch=1" +SRC_URI = "${CC_GIT_URI};branch=${SRCBRANCH}" S = "${WORKDIR}/git/awsiot-sample" diff --git a/meta-digi-dey/recipes-digi/dey-examples/dey-examples-cryptochip.bb b/meta-digi-dey/recipes-digi/dey-examples/dey-examples-cryptochip.bb index a86999278..cc957ac2a 100644 --- a/meta-digi-dey/recipes-digi/dey-examples/dey-examples-cryptochip.bb +++ b/meta-digi-dey/recipes-digi/dey-examples/dey-examples-cryptochip.bb @@ -7,15 +7,15 @@ LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/GPL-2.0;md5=801f80980d171dd6425 DEPENDS = "cryptoauthlib" -SRCBRANCH = "dey-2.4/maint" -SRCREV = "6bb9699c29107cad06654bf537e92e4c9ec1b45c" +SRCBRANCH = "master" +SRCREV = "${AUTOREV}" CC_STASH = "${DIGI_MTK_GIT}dey/dey-examples.git;protocol=ssh" CC_GITHUB = "${DIGI_GITHUB_GIT}/dey-examples.git;protocol=git" CC_GIT_URI ?= "${@base_conditional('DIGI_INTERNAL_GIT', '1' , '${CC_STASH}', '${CC_GITHUB}', d)}" -SRC_URI = "${CC_GIT_URI};nobranch=1" +SRC_URI = "${CC_GIT_URI};branch=${SRCBRANCH}" S = "${WORKDIR}/git/cryptochip-get-random" diff --git a/meta-digi-dey/recipes-digi/dey-examples/dey-examples-digiapix.bb b/meta-digi-dey/recipes-digi/dey-examples/dey-examples-digiapix.bb index e54ad573a..28918bcc6 100644 --- a/meta-digi-dey/recipes-digi/dey-examples/dey-examples-digiapix.bb +++ b/meta-digi-dey/recipes-digi/dey-examples/dey-examples-digiapix.bb @@ -7,15 +7,15 @@ LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/ISC;md5=f3b90e78ea0cffb20bf5cca DEPENDS = "libdigiapix" -SRCBRANCH = "dey-2.4/maint" -SRCREV = "6bb9699c29107cad06654bf537e92e4c9ec1b45c" +SRCBRANCH = "master" +SRCREV = "${AUTOREV}" LIBDIGIAPIX_STASH = "${DIGI_MTK_GIT}dey/dey-examples.git;protocol=ssh" LIBDIGIAPIX_GITHUB = "${DIGI_GITHUB_GIT}/dey-examples.git;protocol=git" LIBDIGIAPIX_GIT_URI ?= "${@base_conditional('DIGI_INTERNAL_GIT', '1' , '${LIBDIGIAPIX_STASH}', '${LIBDIGIAPIX_GITHUB}', d)}" -SRC_URI = "${LIBDIGIAPIX_GIT_URI};nobranch=1" +SRC_URI = "${LIBDIGIAPIX_GIT_URI};branch=${SRCBRANCH}" S = "${WORKDIR}/git" From 66d51040c5290f18b21b8ec3c5b339ecac590e60 Mon Sep 17 00:00:00 2001 From: Gabriel Valcazar Date: Mon, 24 Sep 2018 14:04:01 +0200 Subject: [PATCH 02/30] ccimx8x-sbc-express: libdigiapix: change default SPI device index On this platform, the SPI device gets registered as /dev/spidev32766.0. https://jira.digi.com/browse/DEL-6183 Signed-off-by: Gabriel Valcazar --- .../libdigiapix/libdigiapix-git/ccimx8x-sbc-express/board.conf | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-digi-dey/recipes-digi/libdigiapix/libdigiapix-git/ccimx8x-sbc-express/board.conf b/meta-digi-dey/recipes-digi/libdigiapix/libdigiapix-git/ccimx8x-sbc-express/board.conf index 32d2bd5ae..3d6ce6856 100644 --- a/meta-digi-dey/recipes-digi/libdigiapix/libdigiapix-git/ccimx8x-sbc-express/board.conf +++ b/meta-digi-dey/recipes-digi/libdigiapix/libdigiapix-git/ccimx8x-sbc-express/board.conf @@ -17,7 +17,7 @@ DEFAULT_I2C_BUS = 1 [SPI] # SPI-3 on Expansion connector. -DEFAULT_SPI = 2,0 +DEFAULT_SPI = 32766,0 [PWM] From f9427d1641aa4e8021ab44f7389b28dbfd4c2e9c Mon Sep 17 00:00:00 2001 From: Gabriel Valcazar Date: Tue, 25 Sep 2018 10:59:57 +0200 Subject: [PATCH 03/30] ccimx8x: u-boot: deploy all u-boot files to the imx-boot-tools directory This way, customers are less likely to flash the plain u-boot by accident instead of imx-boot. Also, have the imx-boot recipe look for the u-boot files in the imx-boot-tools directory. https://jira.digi.com/browse/DEL-6185 Signed-off-by: Gabriel Valcazar --- meta-digi-arm/recipes-bsp/imx-mkimage/imx-boot_0.2.bb | 7 ++----- meta-digi-arm/recipes-bsp/u-boot/u-boot-dey_2017.03.bb | 9 +++++++++ 2 files changed, 11 insertions(+), 5 deletions(-) diff --git a/meta-digi-arm/recipes-bsp/imx-mkimage/imx-boot_0.2.bb b/meta-digi-arm/recipes-bsp/imx-mkimage/imx-boot_0.2.bb index ce67c406d..a8ee69487 100644 --- a/meta-digi-arm/recipes-bsp/imx-mkimage/imx-boot_0.2.bb +++ b/meta-digi-arm/recipes-bsp/imx-mkimage/imx-boot_0.2.bb @@ -122,7 +122,7 @@ do_compile () { cp ${DEPLOY_DIR_IMAGE}/${BOOT_TOOLS}/${SC_FIRMWARE_NAME} ${S}/${SOC_TARGET}/scfw_tcm.bin cp ${DEPLOY_DIR_IMAGE}/${BOOT_TOOLS}/${ATF_MACHINE_NAME} ${S}/${SOC_TARGET}/bl31.bin for type in ${UBOOT_CONFIG}; do - cp ${DEPLOY_DIR_IMAGE}/${UBOOT_NAME}-${type} ${S}/${SOC_TARGET}/u-boot.bin-${type} + cp ${DEPLOY_DIR_IMAGE}/${BOOT_TOOLS}/${UBOOT_NAME}-${type} ${S}/${SOC_TARGET}/u-boot.bin-${type} done fi @@ -167,10 +167,7 @@ DEPLOYDIR_IMXBOOT = "${BOOT_TOOLS}" do_deploy () { install -d ${DEPLOYDIR}/${DEPLOYDIR_IMXBOOT} - # copy the tool mkimage to deploy path and sc fw, dcd and uboot - for type in ${UBOOT_CONFIG}; do - install -m 0644 ${DEPLOY_DIR_IMAGE}/${UBOOT_NAME}-${type} ${DEPLOYDIR}/${DEPLOYDIR_IMXBOOT} - done + # copy the tool mkimage to deploy path along with sc fw and dcd if [ "${SOC_TARGET}" = "iMX8M" ]; then install -m 0644 ${DEPLOY_DIR_IMAGE}/u-boot-spl.bin-${MACHINE}-${UBOOT_CONFIG} ${DEPLOYDIR}/${DEPLOYDIR_IMXBOOT} for ddr_firmware in ${DDR_FIRMWARE_NAME}; do diff --git a/meta-digi-arm/recipes-bsp/u-boot/u-boot-dey_2017.03.bb b/meta-digi-arm/recipes-bsp/u-boot/u-boot-dey_2017.03.bb index 54f0b1958..6864b9fc3 100644 --- a/meta-digi-arm/recipes-bsp/u-boot/u-boot-dey_2017.03.bb +++ b/meta-digi-arm/recipes-bsp/u-boot/u-boot-dey_2017.03.bb @@ -169,4 +169,13 @@ do_deploy_append() { rm -f ${TMP_BOOTSCR} } +BOOT_TOOLS = "imx-boot-tools" + +do_deploy_append_ccimx8x() { + # Move all U-Boot artifacts to the imx-boot-tools folder + # U-Boot images are not bootable on the i.MX8X + install -d ${DEPLOYDIR}/${BOOT_TOOLS} + mv ${DEPLOYDIR}/u-boot* ${DEPLOYDIR}/${BOOT_TOOLS}/ +} + COMPATIBLE_MACHINE = "(ccimx6$|ccimx6ul|ccimx8x)" From 84715edfd5021f436f83167cbb3ba7c9acdb370f Mon Sep 17 00:00:00 2001 From: Hector Palacios Date: Fri, 5 Oct 2018 12:41:50 +0200 Subject: [PATCH 04/30] README: add build version number Signed-off-by: Hector Palacios https://jira.digi.com/browse/DEL-6203 --- README.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/README.md b/README.md index 7c7123c14..bf008e31a 100644 --- a/README.md +++ b/README.md @@ -1,5 +1,5 @@ # Digi Embedded Yocto (DEY) 2.4 -## Release 2.4-r2-beta +## Release 2.4-r2.4-beta This document provides information about Digi Embedded Yocto, Digi International's professional embedded Yocto development environment. @@ -98,7 +98,7 @@ Documentation is available online on the Digi documentation site: # Release Changelog -## 2.4-r2-beta +## 2.4-r2.4-beta * Added support for ConnectCore 8X platform. Supported features: * Bluetooth and Wireless interfaces (STA, SoftAP, P2P, Concurrence) From 60440111274f0c6bb5593b9e1de1ffd8edd2e809 Mon Sep 17 00:00:00 2001 From: Jose Diaz de Grenu Date: Tue, 9 Oct 2018 09:40:30 +0200 Subject: [PATCH 05/30] kernel-module-imx-gpu, imx-gst1.0-plugin: fix file paths Currently the contents of FILESEXTRAPATHS and the actual paths being used for the patch files are not aligned. That generates the following WARNINGs: imx-gst1.0-plugin_4.3.4.bb: Unable to get checksum for imx-gst1.0-plugin SRC_URI entry 0001-gstimxv4l2-map-dev-video1-to-dev-fb0.patch: file could not be found kernel-module-imx-gpu-viv_5.0.11.p8.6.bb: Unable to get checksum for kernel-module-imx-gpu-viv SRC_URI entry 0001-mxc-gpu-use-recommended-values-for-minimum-GPU-frequ.patch: file could not be found kernel-module-imx-gpu-viv_5.0.11.p8.6+fslc.bb: Unable to get checksum for kernel-module-imx-gpu-viv SRC_URI entry 0001-mxc-gpu-use-recommended-values-for-minimum-GPU-frequ.patch: file could not be found Also, those patches are not being applied. This patch fixes FILESEXTRAPATHS to contain the actual paths being used. Signed-off-by: Jose Diaz de Grenu (cherry picked from commit 4d35d15fee891bc5e0687ea19eaebbda9f16fab9) --- .../kernel-modules/kernel-module-imx-gpu-viv_%.bbappend | 4 +--- .../recipes-multimedia/gstreamer/imx-gst1.0-plugin_%.bbappend | 3 +-- 2 files changed, 2 insertions(+), 5 deletions(-) diff --git a/meta-digi-arm/recipes-kernel/kernel-modules/kernel-module-imx-gpu-viv_%.bbappend b/meta-digi-arm/recipes-kernel/kernel-modules/kernel-module-imx-gpu-viv_%.bbappend index 86f3daa69..ac10b669d 100644 --- a/meta-digi-arm/recipes-kernel/kernel-modules/kernel-module-imx-gpu-viv_%.bbappend +++ b/meta-digi-arm/recipes-kernel/kernel-modules/kernel-module-imx-gpu-viv_%.bbappend @@ -1,8 +1,6 @@ # Copyright (C) 2017-2018 Digi International -VER_DIR = "${@d.getVar('PV', True).split('+git')[0]}" - -FILESEXTRAPATHS_prepend := "${THISDIR}/${BPN}-${VER_DIR}:" +FILESEXTRAPATHS_prepend := "${THISDIR}/${BPN}:" SRC_URI += " \ file://0001-mxc-gpu-use-recommended-values-for-minimum-GPU-frequ.patch \ diff --git a/meta-digi-dey/recipes-multimedia/gstreamer/imx-gst1.0-plugin_%.bbappend b/meta-digi-dey/recipes-multimedia/gstreamer/imx-gst1.0-plugin_%.bbappend index 9cc4e0cb0..90696801e 100644 --- a/meta-digi-dey/recipes-multimedia/gstreamer/imx-gst1.0-plugin_%.bbappend +++ b/meta-digi-dey/recipes-multimedia/gstreamer/imx-gst1.0-plugin_%.bbappend @@ -1,7 +1,6 @@ # Copyright (C) 2016-2018 Digi International -FILESEXTRAPATHS_prepend := "${THISDIR}/${BP}:" +FILESEXTRAPATHS_prepend := "${THISDIR}/${BPN}:" SRC_URI += "file://0001-gstimxv4l2-map-dev-video1-to-dev-fb0.patch" - SRC_URI_append_ccimx6 = " file://0002-imx_2d_device_g2d-define-a-G2D_AMPHION_INTERLACED-ma.patch" From 2eaade486fc7939570ba2fec0ca93aa461ff6cbe Mon Sep 17 00:00:00 2001 From: Alex Gonzalez Date: Fri, 24 Aug 2018 17:53:38 +0200 Subject: [PATCH 06/30] meta-digi-arm: ccimx6ul: Add support to build mainline BSP Just add the following to the conf/local.conf file: MACHINEOVERRIDES .= ":use-mainline-bsp" The defconfig is the mainline imx_v6_v7_defconfig. Signed-off-by: Alex Gonzalez --- meta-digi-arm/conf/machine/ccimx6ulsbc.conf | 4 ++++ meta-digi-arm/conf/machine/ccimx6ulstarter.conf | 4 ++++ meta-digi-arm/conf/machine/include/ccimx6ul.inc | 3 --- meta-digi-arm/conf/machine/include/digi-defaults.inc | 1 + meta-digi-arm/recipes-kernel/linux/linux-4.18.y.bb | 8 ++++++++ meta-digi-arm/recipes-kernel/linux/linux-dey.inc | 1 + 6 files changed, 18 insertions(+), 3 deletions(-) create mode 100644 meta-digi-arm/recipes-kernel/linux/linux-4.18.y.bb diff --git a/meta-digi-arm/conf/machine/ccimx6ulsbc.conf b/meta-digi-arm/conf/machine/ccimx6ulsbc.conf index b52f6d5bc..ecf1f5cf2 100644 --- a/meta-digi-arm/conf/machine/ccimx6ulsbc.conf +++ b/meta-digi-arm/conf/machine/ccimx6ulsbc.conf @@ -26,6 +26,10 @@ KERNEL_DEVICETREE ?= " \ imx6ul-ccimx6ulsbc-id135.dtb \ imx6ul-ccimx6ulsbc-id136.dtb \ " +KERNEL_DEVICETREE_use-mainline-bsp ?= "imx6ul-ccimx6ulsbcpro.dtb" + +KERNEL_DEFCONFIG ?= "arch/arm/configs/ccimx6ul_defconfig" +KERNEL_DEFCONFIG_use-mainline-bsp ?= "arch/arm/configs/imx_v6_v7_defconfig" SERIAL_CONSOLES ?= "115200;ttymxc4" diff --git a/meta-digi-arm/conf/machine/ccimx6ulstarter.conf b/meta-digi-arm/conf/machine/ccimx6ulstarter.conf index 91b8f696f..10cb62a92 100644 --- a/meta-digi-arm/conf/machine/ccimx6ulstarter.conf +++ b/meta-digi-arm/conf/machine/ccimx6ulstarter.conf @@ -25,6 +25,10 @@ KERNEL_DEVICETREE ?= " \ imx6ul-ccimx6ulstarter-wb.dtb \ imx6ul-ccimx6ulstarter-id129.dtb \ " +KERNEL_DEVICETREE_use-mainline-bsp ?= "imx6ul-ccimx6ulsbcexpress.dtb" + +KERNEL_DEFCONFIG ?= "arch/arm/configs/ccimx6ul_defconfig" +KERNEL_DEFCONFIG_use-mainline-bsp ?= "arch/arm/configs/imx_v6_v7_defconfig" SERIAL_CONSOLES ?= "115200;ttymxc4" diff --git a/meta-digi-arm/conf/machine/include/ccimx6ul.inc b/meta-digi-arm/conf/machine/include/ccimx6ul.inc index 962f2c2d9..498ad37d3 100644 --- a/meta-digi-arm/conf/machine/include/ccimx6ul.inc +++ b/meta-digi-arm/conf/machine/include/ccimx6ul.inc @@ -12,9 +12,6 @@ include conf/machine/include/tune-cortexa7.inc UBOOT_SUFFIX = "imx" UBOOT_SYMLINK = "u-boot-${MACHINE}.${UBOOT_SUFFIX}" -# Linux kernel configuration -KERNEL_DEFCONFIG ?= "arch/arm/configs/ccimx6ul_defconfig" - # Wireless external module WIRELESS_MODULE ?= "" WIRELESS_MODULE_append = " ${@base_conditional('HAVE_WIFI', '1', 'kernel-module-qualcomm', '', d)}" diff --git a/meta-digi-arm/conf/machine/include/digi-defaults.inc b/meta-digi-arm/conf/machine/include/digi-defaults.inc index f40341ab1..67f2081bf 100644 --- a/meta-digi-arm/conf/machine/include/digi-defaults.inc +++ b/meta-digi-arm/conf/machine/include/digi-defaults.inc @@ -3,6 +3,7 @@ PREFERRED_PROVIDER_jpeg-native ?= "jpeg-native" PREFERRED_PROVIDER_u-boot ??= "u-boot-dey" PREFERRED_PROVIDER_virtual/bootloader ??= "u-boot-dey" PREFERRED_PROVIDER_virtual/kernel ??= "linux-dey" +PREFERRED_PROVIDER_virtual/kernel_use-mainline-bsp ??= "linux-4.18.y" PREFERRED_PROVIDER_virtual/xserver = "xserver-xorg" # diff --git a/meta-digi-arm/recipes-kernel/linux/linux-4.18.y.bb b/meta-digi-arm/recipes-kernel/linux/linux-4.18.y.bb new file mode 100644 index 000000000..ade04b657 --- /dev/null +++ b/meta-digi-arm/recipes-kernel/linux/linux-4.18.y.bb @@ -0,0 +1,8 @@ +# Copyright (C) 2018 Digi International + +require recipes-kernel/linux/linux-dey.inc + +SRCBRANCH = "v4.18.y" +SRCREV = "${AUTOREV}" + +COMPATIBLE_MACHINE = "(ccimx6ul)" diff --git a/meta-digi-arm/recipes-kernel/linux/linux-dey.inc b/meta-digi-arm/recipes-kernel/linux/linux-dey.inc index 58fc19e12..cf2de5982 100644 --- a/meta-digi-arm/recipes-kernel/linux/linux-dey.inc +++ b/meta-digi-arm/recipes-kernel/linux/linux-dey.inc @@ -3,6 +3,7 @@ SUMMARY = "Linux kernel for Digi boards" LICENSE = "GPLv2" LIC_FILES_CHKSUM = "file://COPYING;md5=d7810fab7487fb0aad327b76f1be7cd7" +LIC_FILES_CHKSUM_use-mainline-bsp = "file://COPYING;md5=bbea815ee2795b2f4230826c0c6b8814" DEPENDS += "lzop-native bc-native" DEPENDS += "${@base_conditional('TRUSTFENCE_SIGN', '1', 'trustfence-sign-tools-native', '', d)}" From 7aff3ee169bced952d72bb246612834f89a0320d Mon Sep 17 00:00:00 2001 From: Alex Gonzalez Date: Mon, 3 Sep 2018 18:35:02 +0200 Subject: [PATCH 07/30] meta-digi-arm: u-boot-dey: Modify boot script for mainline kernel use Signed-off-by: Alex Gonzalez --- .../u-boot/u-boot-dey/use-mainline-bsp/boot.txt | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) create mode 100644 meta-digi-arm/recipes-bsp/u-boot/u-boot-dey/use-mainline-bsp/boot.txt diff --git a/meta-digi-arm/recipes-bsp/u-boot/u-boot-dey/use-mainline-bsp/boot.txt b/meta-digi-arm/recipes-bsp/u-boot/u-boot-dey/use-mainline-bsp/boot.txt new file mode 100644 index 000000000..8ad8e8c96 --- /dev/null +++ b/meta-digi-arm/recipes-bsp/u-boot/u-boot-dey/use-mainline-bsp/boot.txt @@ -0,0 +1,16 @@ +# +# U-Boot bootscript for NAND images created by Yocto. +# +if test "${board}" = "ccimx6ulsbc"; then + setenv fdt_file zImage-imx6ul-ccimx6ulsbcpro.dtb +else + setenv fdt_file zImage-imx6ul-ccimx6ulsbcexpress.dtb +fi + +if test "${mtdbootpart}" = "recovery"; then + setenv boot_initrd true + setenv initrd_file uramdisk-recovery.img +else + true +fi +dboot linux nand ${mtdbootpart} From 6a95035b3c25ba95b841e0341170bc0d387d223c Mon Sep 17 00:00:00 2001 From: Alex Gonzalez Date: Mon, 7 May 2018 11:11:34 +0200 Subject: [PATCH 08/30] meta-digi-arm: ccimx6ul: use-mainline-bsp: Remove imx-alsa-plugins This package does not build with mainline kernels Signed-off-by: Alex Gonzalez --- meta-digi-arm/conf/machine/include/ccimx6ul.inc | 1 + 1 file changed, 1 insertion(+) diff --git a/meta-digi-arm/conf/machine/include/ccimx6ul.inc b/meta-digi-arm/conf/machine/include/ccimx6ul.inc index 498ad37d3..f9b6a673a 100644 --- a/meta-digi-arm/conf/machine/include/ccimx6ul.inc +++ b/meta-digi-arm/conf/machine/include/ccimx6ul.inc @@ -37,6 +37,7 @@ MACHINE_EXTRA_RRECOMMENDS += " \ cryptodev-module \ cryptoauth-openssl-engine \ " +MACHINE_EXTRA_RRECOMMENDS_remove_use-mainline-bsp = "${@bb.utils.contains('COMBINED_FEATURES', 'alsa', 'imx-alsa-plugins', '', d)}" MACHINE_FEATURES += "wifi bluetooth cryptochip" From f85cd4e2eeb1248cfe95e1ad354b20c4c4d87617 Mon Sep 17 00:00:00 2001 From: Alex Gonzalez Date: Thu, 31 May 2018 14:20:06 +0200 Subject: [PATCH 09/30] meta-digi-dey: sysinfo: Fix for use with mainline kernels * Check for file before using it This just avoids the failure, on mainline access to OTP would need to be done differently, see: https://jira.digi.com/browse/ACL-163 * Use compatible node instead of digi,machine,name Signed-off-by: Alex Gonzalez --- meta-digi-dey/recipes-digi/sysinfo/sysinfo/sysinfo | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/meta-digi-dey/recipes-digi/sysinfo/sysinfo/sysinfo b/meta-digi-dey/recipes-digi/sysinfo/sysinfo/sysinfo index f938a6efc..43a0e2802 100755 --- a/meta-digi-dey/recipes-digi/sysinfo/sysinfo/sysinfo +++ b/meta-digi-dey/recipes-digi/sysinfo/sysinfo/sysinfo @@ -236,10 +236,12 @@ make_report(){ echo "--------------------------------------" echo "" - if [ "$(($(cat /sys/fsl_otp/HW_OCOTP_CFG5) & 2))" != "0" ]; then - echo "Device status: [CLOSED]" - else - echo "Device status: [OPEN]" + if [ -e /sys/fsl_otp/HW_OCOTP_CFG5 ]; then + if [ "$(($(cat /sys/fsl_otp/HW_OCOTP_CFG5) & 2))" != "0" ]; then + echo "Device status: [CLOSED]" + else + echo "Device status: [OPEN]" + fi fi if [ -f "/proc/device-tree/digi,uboot-env,encrypted" ]; then @@ -260,7 +262,7 @@ if [ -z "${UBOOT_VERSION}" ]; then [ -c "/dev/mtd0" ] && UBOOT_PARTITION="/dev/mtd0" UBOOT_VERSION="$(strings ${UBOOT_PARTITION} | grep -m 1 dub | cut -d' ' -f2)" fi -MACHINE="$(cat /proc/device-tree/digi,machine,name | tr -d '\0')" +MACHINE="$(cat /proc/device-tree/compatible | tr '\0' '\t' | cut -f 1)" BOARD_VARIANT="$(cat /proc/device-tree/digi,hwid,variant | tr -d '\0')" BOARD_SN="$(cat /proc/device-tree/digi,hwid,sn | tr -d '\0')" BOARD_VERSION="$(cat /proc/device-tree/digi,carrierboard,version | tr -d '\0')" From ea46a81642f5d6122e324accf82411fdfc083bfb Mon Sep 17 00:00:00 2001 From: Alex Gonzalez Date: Fri, 5 Oct 2018 10:33:12 +0200 Subject: [PATCH 10/30] meta-digi-arm: use-mainline-bsp: Use community maintained gstreamer1.0 plugin This is the same gstreamer used by meta-freescale. Signed-off-by: Alex Gonzalez --- meta-digi-arm/conf/machine/include/imx-digi-base.inc | 1 + 1 file changed, 1 insertion(+) diff --git a/meta-digi-arm/conf/machine/include/imx-digi-base.inc b/meta-digi-arm/conf/machine/include/imx-digi-base.inc index 57a89a0ca..bd5857043 100644 --- a/meta-digi-arm/conf/machine/include/imx-digi-base.inc +++ b/meta-digi-arm/conf/machine/include/imx-digi-base.inc @@ -63,6 +63,7 @@ MACHINE_EXTRA_RRECOMMENDS += "udev-extraconf udev-rules-imx" # GStreamer 1.0 plugins MACHINE_GSTREAMER_1_0_PLUGIN ?= "" +MACHINE_GSTREAMER_1_0_PLUGIN_use-mainline-bsp ?= "gstreamer1.0-plugins-imx-meta" MACHINE_GSTREAMER_1_0_PLUGIN_mx6q ?= "imx-gst1.0-plugin imx-gst1.0-plugin-gplay imx-gst1.0-plugin-grecorder" MACHINE_GSTREAMER_1_0_PLUGIN_mx6dl ?= "imx-gst1.0-plugin imx-gst1.0-plugin-gplay imx-gst1.0-plugin-grecorder" MACHINE_GSTREAMER_1_0_PLUGIN_mx6ul ?= "imx-gst1.0-plugin imx-gst1.0-plugin-gplay imx-gst1.0-plugin-grecorder" From 2b5525228720098259458c0921bcefe5b3501bd9 Mon Sep 17 00:00:00 2001 From: Alex Gonzalez Date: Thu, 9 Aug 2018 19:00:53 +0200 Subject: [PATCH 11/30] meta-digi-dey: xserver-xf86-config: Use fbdev device for mainline The meta-freescale layer assumes that when you define the use-mainline-bsp the platform is going to use the etnaviv gpu driver. This is not the case for the CC6UL as the mxsfb.c driver is still not DRM capable. Probably this will change in v4.19 as there is a DRM capable mxsfb.c driver that will make it possible to use the armada xf86 driver with the etnaviv fbdev emulation. Signed-off-by: Alex Gonzalez --- .../xserver-xf86-config/use-mainline-bsp/xorg.conf | 12 ++++++++++++ 1 file changed, 12 insertions(+) create mode 100644 meta-digi-dey/recipes-graphics/xorg-xserver/xserver-xf86-config/use-mainline-bsp/xorg.conf diff --git a/meta-digi-dey/recipes-graphics/xorg-xserver/xserver-xf86-config/use-mainline-bsp/xorg.conf b/meta-digi-dey/recipes-graphics/xorg-xserver/xserver-xf86-config/use-mainline-bsp/xorg.conf new file mode 100644 index 000000000..79b6c0fc1 --- /dev/null +++ b/meta-digi-dey/recipes-graphics/xorg-xserver/xserver-xf86-config/use-mainline-bsp/xorg.conf @@ -0,0 +1,12 @@ +Section "Device" + Identifier "Kernel Framebuffer Device" + Driver "fbdev" + Option "fbdev" "/dev/fb0" +EndSection + +Section "ServerFlags" + Option "BlankTime" "0" + Option "StandbyTime" "0" + Option "SuspendTime" "0" + Option "OffTime" "0" +EndSection From 30fde4487b761d25ab33b632e341416b71161412 Mon Sep 17 00:00:00 2001 From: Alex Gonzalez Date: Tue, 4 Sep 2018 11:21:22 +0200 Subject: [PATCH 12/30] meta-digi-arm: udev-extraconf: Avoid loading evbug by default This kernel module is used for debugging and when available it spams the log file with every input event. This patch avoid it being loaded by default but the user can still load it manually if required. Signed-off-by: Alex Gonzalez --- .../recipes-core/udev/udev-extraconf/imx/blacklist.conf | 1 + .../recipes-core/udev/udev-extraconf_1.1.bbappend | 8 +++++++- 2 files changed, 8 insertions(+), 1 deletion(-) create mode 100644 meta-digi-arm/recipes-core/udev/udev-extraconf/imx/blacklist.conf diff --git a/meta-digi-arm/recipes-core/udev/udev-extraconf/imx/blacklist.conf b/meta-digi-arm/recipes-core/udev/udev-extraconf/imx/blacklist.conf new file mode 100644 index 000000000..a8b88854e --- /dev/null +++ b/meta-digi-arm/recipes-core/udev/udev-extraconf/imx/blacklist.conf @@ -0,0 +1 @@ +blacklist evbug diff --git a/meta-digi-arm/recipes-core/udev/udev-extraconf_1.1.bbappend b/meta-digi-arm/recipes-core/udev/udev-extraconf_1.1.bbappend index 682247ec3..954c41f74 100644 --- a/meta-digi-arm/recipes-core/udev/udev-extraconf_1.1.bbappend +++ b/meta-digi-arm/recipes-core/udev/udev-extraconf_1.1.bbappend @@ -1,4 +1,4 @@ -# Copyright (C) 2013-2017 Digi International. +# Copyright (C) 2013-2018 Digi International. FILESEXTRAPATHS_prepend := "${THISDIR}/${BPN}:" @@ -6,6 +6,7 @@ SRC_URI += " \ file://mount_bootparts.sh \ file://mount_partition.sh \ file://81-spi-spidev.rules \ + file://blacklist.conf \ " do_install_append() { @@ -20,7 +21,12 @@ do_install_append() { "KERNEL==\"${BT_TTY}\", MODE=\"0660\", GROUP=\"dialout\", SYMLINK+=\"ttyBt\"" \ >> ${D}${sysconfdir}/udev/rules.d/localextra.rules fi + + install -d ${D}${sysconfdir}/modprobe.d + install -m 0644 ${WORKDIR}/blacklist.conf ${D}${sysconfdir}/modprobe.d } +FILES_${PN}_append = " ${sysconfdir}/modprobe.d" + # BT_TTY is machine specific (defined in machine config file) PACKAGE_ARCH = "${MACHINE_ARCH}" From 569c95511f8b7534b0feeb8de1dac6282c0cb338 Mon Sep 17 00:00:00 2001 From: Alex Gonzalez Date: Thu, 4 Oct 2018 17:18:28 +0200 Subject: [PATCH 13/30] meta-digi-dey: bluez5: Adapt bluetooth-init to mainline use The Digi vendor kernel uses a dedicated HCI UART driver with support for In-Band Sleep (IBS). This driver, when used with a QCA vendor ROME plugin for hciattach, is able to upload a new firmware version to the Bluetooth chipset, as well as set the MAC address directly on the firmware. Mainline BSP uses the HCI H4 driver instead and the "qualcomm" hciattach plugin which is not able to upload firmware to the QCA6564 chipset. As such, when using mainline the chipset uses the ROM firmware and the bluetooth init script has been adapted accordingly. Signed-off-by: Alex Gonzalez --- .../use-mainline-bsp/bluetooth-init | 102 ++++++++++++++++++ 1 file changed, 102 insertions(+) create mode 100644 meta-digi-dey/recipes-connectivity/bluez/bluez5-5.46/use-mainline-bsp/bluetooth-init diff --git a/meta-digi-dey/recipes-connectivity/bluez/bluez5-5.46/use-mainline-bsp/bluetooth-init b/meta-digi-dey/recipes-connectivity/bluez/bluez5-5.46/use-mainline-bsp/bluetooth-init new file mode 100644 index 000000000..094535f22 --- /dev/null +++ b/meta-digi-dey/recipes-connectivity/bluez/bluez5-5.46/use-mainline-bsp/bluetooth-init @@ -0,0 +1,102 @@ +#!/bin/sh +#=============================================================================== +# +# Copyright (C) 2012-2018 by Digi International Inc. +# All rights reserved. +# +# This program is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License version 2 as published by +# the Free Software Foundation. +# +# +# !Description: Initialize bluetooth hardware +# +#=============================================================================== + +# Bluetooth power GPIO +BT_EN_QCA_GPIO_NR="137" + +# set_gpio_value +set_gpio_value() { + local SG_GPIONR="${1}" + local SG_GPIOVAL="${2}" + local SG_GPIOPATH="/sys/class/gpio/gpio${SG_GPIONR}" + + [ -d "${SG_GPIOPATH}" ] || printf "%s" "${SG_GPIONR}" > /sys/class/gpio/export + printf out > "${SG_GPIOPATH}/direction" && sleep .2 + printf "${SG_GPIOVAL}" > "${SG_GPIOPATH}/value" && sleep .2 + [ -d "${SG_GPIOPATH}" ] && printf "%s" "${SG_GPIONR}" > /sys/class/gpio/unexport +} + +# powercycle_gpio +powercycle_gpio() { + set_gpio_value "${1}" 0 + set_gpio_value "${1}" 1 +} + +error() { + echo ${1} + exit 1 +} + +set_mac_address() { + # Get MAC address from the device tree. Use a default value if it has not been set. + BT_MACADDR="$(hexdump -ve '1/1 "%02X" ":"' /proc/device-tree/bluetooth/mac-address 2>/dev/null | sed 's/:$//g')" + if [ -z "${BT_MACADDR}" ] || [ "${BT_MACADDR}" = "00:00:00:00:00:00" ]; then + BT_MACADDR="00:04:F3:FF:FF:BB" + fi + + # Convert the BT address to the hcitool command format. + # Example: "00:04:F3:11:22:33" coverted to "33 22 11 F3 04 00" + HCI_BT_ADDR="$(echo ${BT_MACADDR} | sed -e 's,^\(..\):\(..\):\(..\):\(..\):\(..\):\(..\)$,\6 \5 \4 \3 \2 \1,g')" + + # Up the interface to be able to send hci commands + hciconfig hci0 up || echo "Cannot bring up bluetooth interface after initial attach" || exit 1 + + # Set the MAC address + hcitool -i hci0 cmd 3F 000B 01 02 06 ${HCI_BT_ADDR} > /dev/null || echo "Unable to set BT MAC Address" || exit 1 + + # Set the hci interface down so bluetooth main.conf will apply + hciconfig hci0 down || echo "Cannot down the hci interface" || exit 1 +} + +bluetooth_init() { + # Start the Bluetooth driver and bring up the interface + HCIATTACH_LOG="/var/log/hciattach.log" + + killproc hciattach + powercycle_gpio "${BT_EN_QCA_GPIO_NR}" + hciattach ttyBt qualcomm 115200 -t3 flow unused > ${HCIATTACH_LOG} 2>&1 || BT_ERROR="FAIL (hciattach)" + set_mac_address || BT_ERROR="Unable to set MAC address" +} + +# Source function library +. /etc/init.d/functions + +case "$1" in + start) + if [ -d "/proc/device-tree/bluetooth" ]; then + echo -n "Starting bluetooth hardware: " + bluetooth_init + echo "${BT_ERROR:-done.}" + fi + ;; + stop) + if [ -d "/sys/class/bluetooth/hci0" ]; then + echo -n "Stopping bluetooth hardware: " + killproc hciattach + # Power down bluetooth + set_gpio_value "${BT_EN_QCA_GPIO_NR}" 0 + echo "done." + fi + ;; + restart) + $0 stop + sleep 1 + $0 start + ;; + *) + echo "Usage: $0 {start|stop|restart}" + exit 1 + ;; +esac From 4cdb24d0f5b32b03b1fe2031b2a6d564a5826b49 Mon Sep 17 00:00:00 2001 From: Arturo Buzarra Date: Mon, 8 Oct 2018 10:45:15 +0200 Subject: [PATCH 14/30] bluez5: initialize BT in HCI_H4 mode and disable IBS and DEEP_SLEEP on firmware binary Initialize Bluetooth chip in HCI_H4 mode and provide a firmware binary with the IBS and DEEP_SLEEP mode disabled by default. Also this firmware enables an internal clock required to maintain the system on low power modes. https://jira.digi.com/browse/DEL-3711 Signed-off-by: Arturo Buzarra --- .../firmware-qualcomm/qca/nvm_tlv_3.2.bin | Bin 1968 -> 1968 bytes ...uetooth-low-power-mode-functionality.patch | 28 ++++++++++++++++++ .../0004-QCA_bluetooth_chip_support.patch | 2 +- .../bluez/bluez5_5.41.bbappend | 1 + 4 files changed, 30 insertions(+), 1 deletion(-) create mode 100644 meta-digi-dey/recipes-connectivity/bluez/bluez5-5.41/0016-bluetooth-Disable-bluetooth-low-power-mode-functionality.patch diff --git a/meta-digi-arm/recipes-bsp/firmware-qualcomm/firmware-qualcomm/qca/nvm_tlv_3.2.bin b/meta-digi-arm/recipes-bsp/firmware-qualcomm/firmware-qualcomm/qca/nvm_tlv_3.2.bin index f42a007e8c43ba768855df00e591df4ed8c4bf19..2715082decbf74920ab8efa2a2f98a062ed81acc 100644 GIT binary patch delta 52 scmdnMzkz>(nI;n>9|sGU27@#MBLf`BFo?j}3<3-cI*g1A8{-4n0h9d%uK)l5 delta 52 ucmdnMzkz>(nPw9s9|sGU27@#MBLfUD$}ot)*bEE;3=BGqOdK2I1K9zp#05D3 diff --git a/meta-digi-dey/recipes-connectivity/bluez/bluez5-5.41/0016-bluetooth-Disable-bluetooth-low-power-mode-functionality.patch b/meta-digi-dey/recipes-connectivity/bluez/bluez5-5.41/0016-bluetooth-Disable-bluetooth-low-power-mode-functionality.patch new file mode 100644 index 000000000..5c6712ed1 --- /dev/null +++ b/meta-digi-dey/recipes-connectivity/bluez/bluez5-5.41/0016-bluetooth-Disable-bluetooth-low-power-mode-functionality.patch @@ -0,0 +1,28 @@ +From: Arturo Buzarra +Date: Wed, 10 Oct 2018 09:14:56 +0200 +Subject: [PATCH] bluetooth: Disable bluetooth low power mode functionality + +In some conditions the low power modes cause communication +errors between the BT chip and the system, for this reason +we disable it by default. + +https://jira.digi.com/browse/DEL-3711 + +Signed-off-by: Arturo Buzarra +--- + tools/hciattach.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/tools/hciattach.c b/tools/hciattach.c +index 4aacdafed..234283882 100644 +--- a/tools/hciattach.c ++++ b/tools/hciattach.c +@@ -1120,7 +1120,7 @@ struct uart_t uart[] = { + FLOW_CTL, DISABLE_PM, NULL, ath3k_ps, ath3k_pm }, + + /* QCA ROME */ +- { "qca", 0x0000, 0x0000, HCI_UART_IBS, 115200, 115200, ++ { "qca", 0x0000, 0x0000, HCI_UART_H4, 115200, 115200, + FLOW_CTL, DISABLE_PM, NULL, qca, NULL }, + + /* QUALCOMM BTS */ diff --git a/meta-digi-dey/recipes-connectivity/bluez/bluez5-5.46/0004-QCA_bluetooth_chip_support.patch b/meta-digi-dey/recipes-connectivity/bluez/bluez5-5.46/0004-QCA_bluetooth_chip_support.patch index f407ad7df..d1144bd81 100644 --- a/meta-digi-dey/recipes-connectivity/bluez/bluez5-5.46/0004-QCA_bluetooth_chip_support.patch +++ b/meta-digi-dey/recipes-connectivity/bluez/bluez5-5.46/0004-QCA_bluetooth_chip_support.patch @@ -163,7 +163,7 @@ index fad176c9b804..dda639cabca3 100644 FLOW_CTL, DISABLE_PM, NULL, ath3k_ps, ath3k_pm }, + /* QCA ROME */ -+ { "qca", 0x0000, 0x0000, HCI_UART_IBS, 115200, 115200, ++ { "qca", 0x0000, 0x0000, HCI_UART_H4, 115200, 115200, + FLOW_CTL, DISABLE_PM, NULL, qca, NULL }, + /* QUALCOMM BTS */ diff --git a/meta-digi-dey/recipes-connectivity/bluez/bluez5_5.41.bbappend b/meta-digi-dey/recipes-connectivity/bluez/bluez5_5.41.bbappend index d786b748d..773cab675 100644 --- a/meta-digi-dey/recipes-connectivity/bluez/bluez5_5.41.bbappend +++ b/meta-digi-dey/recipes-connectivity/bluez/bluez5_5.41.bbappend @@ -23,6 +23,7 @@ QCA65XX_COMMON_PATCHES = " \ file://0013-hciattach_rome-Respect-the-user-indication-for-noflo.patch \ file://0014-hciattach-If-the-user-supplies-a-bdaddr-use-it.patch \ file://0015-hciattach-Add-verbosity-option.patch \ + file://0016-bluetooth-Disable-bluetooth-low-power-mode-functionality.patch \ " SRC_URI_append_ccimx6ul = " ${QCA65XX_COMMON_PATCHES}" From dcab770db7af1be18f0dfc1743834328cb006817 Mon Sep 17 00:00:00 2001 From: Alex Gonzalez Date: Tue, 9 Oct 2018 15:54:44 +0200 Subject: [PATCH 15/30] meta-digi-dey: bluez: Move IBS protocol to the last HCI UART entry. This protocol will only work with the Digi vendor v4.9 kernels. Signed-off-by: Alex Gonzalez --- .../0012-QCA_bluetooth_chip_support.patch | 74 ++++++++----------- .../0004-QCA_bluetooth_chip_support.patch | 29 +++----- 2 files changed, 40 insertions(+), 63 deletions(-) diff --git a/meta-digi-dey/recipes-connectivity/bluez/bluez5-5.41/0012-QCA_bluetooth_chip_support.patch b/meta-digi-dey/recipes-connectivity/bluez/bluez5-5.41/0012-QCA_bluetooth_chip_support.patch index 1f6e178c4..60c9cf0f0 100644 --- a/meta-digi-dey/recipes-connectivity/bluez/bluez5-5.41/0012-QCA_bluetooth_chip_support.patch +++ b/meta-digi-dey/recipes-connectivity/bluez/bluez5-5.41/0012-QCA_bluetooth_chip_support.patch @@ -1,11 +1,4 @@ -Add hciattach rome support for Qualcomm chip QCA6564 - -This is a multiple patch including all the specific qualcomm commits to add -support for its chip in bluez stack (hciattach rome). - -Signed-off-by: Isaac Hermida - -From e6d2fb7efcde66f9ab22a42bd6d7039a4f0c02cd Mon Sep 17 00:00:00 2001 +From 64912e658db8883637afd298b0a8eda1f49b056a Mon Sep 17 00:00:00 2001 From: Anantha Krishnan Date: Tue, 19 Aug 2014 20:23:01 +0530 Subject: [PATCH 01/19] bluetooth : Add bluetooth support for QCA6174 chip. @@ -22,10 +15,10 @@ Signed-off-by: Rupesh Tatiya --- Makefile.tools | 3 +- tools/hciattach.c | 25 +- - tools/hciattach.h | 8 +- + tools/hciattach.h | 3 + tools/hciattach_rome.c | 1578 ++++++++++++++++++++++++++++++++++++++++++++++++ tools/hciattach_rome.h | 317 ++++++++++ - 5 files changed, 1926 insertions(+), 5 deletions(-) + 5 files changed, 1924 insertions(+), 2 deletions(-) create mode 100644 tools/hciattach_rome.c create mode 100644 tools/hciattach_rome.h @@ -142,24 +135,19 @@ index fad176c9b804..73811d4c4c2a 100644 return 0; } diff --git a/tools/hciattach.h b/tools/hciattach.h -index 4279a3361749..0656a845223c 100644 +index 4279a3361749..93577e9474de 100644 --- a/tools/hciattach.h +++ b/tools/hciattach.h -@@ -39,9 +39,10 @@ - #define HCI_UART_H4DS 3 - #define HCI_UART_LL 4 - #define HCI_UART_ATH3K 5 --#define HCI_UART_INTEL 6 --#define HCI_UART_BCM 7 --#define HCI_UART_QCA 8 -+#define HCI_UART_IBS 6 -+#define HCI_UART_INTEL 7 -+#define HCI_UART_BCM 8 -+#define HCI_UART_QCA 9 +@@ -43,6 +43,8 @@ + #define HCI_UART_BCM 7 + #define HCI_UART_QCA 8 ++#define HCI_UART_IBS 12 ++ #define HCI_UART_RAW_DEVICE 0 #define HCI_UART_RESET_ON_INIT 1 -@@ -63,6 +64,7 @@ int ath3k_init(int fd, int speed, int init_speed, char *bdaddr, + #define HCI_UART_CREATE_AMP 2 +@@ -63,6 +65,7 @@ int ath3k_init(int fd, int speed, int init_speed, char *bdaddr, struct termios *ti); int ath3k_post(int fd, int pm); int qualcomm_init(int fd, int speed, struct termios *ti, const char *bdaddr); @@ -2075,7 +2063,7 @@ index 000000000000..aa59965643ec +}; +#endif /* HW_ROME_H */ -From 333676e63694e137558e7a685d2fa1a50c499436 Mon Sep 17 00:00:00 2001 +From f84a56a539fa5f37b1a8262520bf4ab7f503cc17 Mon Sep 17 00:00:00 2001 From: Anantha Krishnan Date: Thu, 11 Sep 2014 19:20:02 +0530 Subject: [PATCH 02/19] bluetooth: Enable bluetooth low power mode @@ -2106,7 +2094,7 @@ index 73811d4c4c2a..e3a915061440 100644 /* QUALCOMM BTS */ -From 0518592a10bff2ac0b99e4081bd01154f2eeacb6 Mon Sep 17 00:00:00 2001 +From 05c8c51fbdce151bcd050a8b742c3af7ba175ceb Mon Sep 17 00:00:00 2001 From: Anantha Krishnan Date: Thu, 11 Sep 2014 18:57:45 +0530 Subject: [PATCH 03/19] bluetooth: Fix bug in firmware parsing mechanism @@ -2159,7 +2147,7 @@ index aa59965643ec..07127f30a70a 100644 union{ tlv_patch_hdr patch; -From 78f1ab9c20956f4e6f009d7bc2b94fe1d4474a08 Mon Sep 17 00:00:00 2001 +From 480096d50d5cad31650380470f9c7f7e783f38e4 Mon Sep 17 00:00:00 2001 From: Anantha Krishnan Date: Mon, 8 Sep 2014 15:11:02 +0530 Subject: [PATCH 04/19] bluetooth: Configure BD Address @@ -2275,7 +2263,7 @@ index 07127f30a70a..a4abe9f73080 100644 typedef enum { USERIAL_OP_FLOW_ON, -From 7f148243e9d36427734de874f291911e1f3d60d0 Mon Sep 17 00:00:00 2001 +From 91decff6ed724123a182f4ca0514b7e55b2b5d0f Mon Sep 17 00:00:00 2001 From: Anantha Krishnan Date: Mon, 8 Sep 2014 14:33:24 +0530 Subject: [PATCH 05/19] bluetooth: Remove unused functions in the firmware @@ -2350,7 +2338,7 @@ index 947e1abb96c4..4fcbdf2ab82a 100644 int rome_set_baudrate_req(int fd) { -From 175fe3690522afc91f38933f821e4b00bd1a12c8 Mon Sep 17 00:00:00 2001 +From ec990e2f5c62417dc32cc3f23af3c5861f815837 Mon Sep 17 00:00:00 2001 From: Anantha Krishnan Date: Mon, 8 Sep 2014 14:31:18 +0530 Subject: [PATCH 06/19] bluetooth: Enable 3Mbps baud rate support @@ -2502,7 +2490,7 @@ index 4fcbdf2ab82a..d0e2935b9997 100644 /* Perform HCI reset here*/ err = rome_hci_reset_req(fd); -From 1911a9d5799d110a7d010e154b44e43c65e838ff Mon Sep 17 00:00:00 2001 +From 4acc26e112f003c23f2997f98e0e84e1875c37b1 Mon Sep 17 00:00:00 2001 From: Anantha Krishnan Date: Tue, 30 Sep 2014 12:13:00 +0530 Subject: [PATCH 07/19] bluetooth: Check TTY buffer for data availability @@ -2693,7 +2681,7 @@ index a4abe9f73080..3efb71995c45 100644 #define ROME_1_0_100022_1 0x101000221 #define ROME_1_0_100019 0x101000190 -From 9d81b1dd643966ba6f2ffb3f7658a24cfcb37df4 Mon Sep 17 00:00:00 2001 +From 1f7fb6f953b1714d574181e6ae6b7b281288c0de Mon Sep 17 00:00:00 2001 From: Anantha Krishnan Date: Wed, 20 Aug 2014 12:13:19 +0530 Subject: [PATCH 08/19] bluetooth : Add support for TUFEELO firmware download @@ -2739,7 +2727,7 @@ index 3efb71995c45..9d18c576fcae 100644 /****************************************************************************** ** Local type definitions -From ac12a2a733ad6cc6eed8ccdd3462d1fe1969fc54 Mon Sep 17 00:00:00 2001 +From f1594502b2627691bf519fe163e655a3d8755e4f Mon Sep 17 00:00:00 2001 From: Anantha Krishnan Date: Mon, 8 Dec 2014 14:52:16 +0530 Subject: [PATCH 09/19] bluetooth: Add support for ROME 3.2 SOC. @@ -2977,7 +2965,7 @@ index 9d18c576fcae..77e85e7e7b19 100644 }; #endif /* HW_ROME_H */ -From f7cc3b22522cfc66a7c4126630c6222f22be17f6 Mon Sep 17 00:00:00 2001 +From 4980bd625c8eab2240e7e754f2b7be99ab679fcb Mon Sep 17 00:00:00 2001 From: Anantha Krishnan Date: Thu, 4 Dec 2014 17:23:58 +0530 Subject: [PATCH 10/19] bluetooth: Use correct TTY ioctl calls for flow control @@ -3168,7 +3156,7 @@ index 77e85e7e7b19..ef3647e6a69b 100644 unsigned char vnd_local_bd_addr[6] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; typedef enum { -From bd7d1fce8de4639445563442a8448468d671fad2 Mon Sep 17 00:00:00 2001 +From c42651fe738f2ce0740016fcc885bb79a1909021 Mon Sep 17 00:00:00 2001 From: Anantha Krishnan Date: Tue, 20 Jan 2015 12:43:20 +0530 Subject: [PATCH 11/19] bluetooth: Add support for multi baud rate @@ -3199,10 +3187,10 @@ index c3cf10843303..dda639cabca3 100644 static int qualcomm(int fd, struct uart_t *u, struct termios *ti) diff --git a/tools/hciattach.h b/tools/hciattach.h -index 0656a845223c..49e59321fcac 100644 +index 93577e9474de..5255251448d6 100644 --- a/tools/hciattach.h +++ b/tools/hciattach.h -@@ -64,7 +64,7 @@ int ath3k_init(int fd, int speed, int init_speed, char *bdaddr, +@@ -65,7 +65,7 @@ int ath3k_init(int fd, int speed, int init_speed, char *bdaddr, struct termios *ti); int ath3k_post(int fd, int pm); int qualcomm_init(int fd, int speed, struct termios *ti, const char *bdaddr); @@ -3426,7 +3414,7 @@ index ef3647e6a69b..1500ddd3a79f 100644 #define FALSE 0 #endif -From 7dc9c5e316aa9a22899259ce296136b2e257735d Mon Sep 17 00:00:00 2001 +From c3e7808efa573974bf7d7d5fb08766b140dbe8f3 Mon Sep 17 00:00:00 2001 From: Kamal Negi Date: Tue, 30 Dec 2014 19:15:08 +0530 Subject: [PATCH 12/19] Override PCM Settings by reading configuration file @@ -3572,7 +3560,7 @@ index 1500ddd3a79f..f591c10e4f2b 100644 ** Local type definitions ******************************************************************************/ -From 9eb8220969598d63be3b918b49b6258387629bf3 Mon Sep 17 00:00:00 2001 +From e435ae1aa83440aaee7833c8ebce438065168f76 Mon Sep 17 00:00:00 2001 From: Rupesh Tatiya Date: Thu, 29 Jan 2015 15:36:27 +0530 Subject: [PATCH 13/19] Add support for Tufello 1.1 SOC @@ -3743,7 +3731,7 @@ index f591c10e4f2b..95d5f1e8a5c2 100644 }; #endif /* HW_ROME_H */ -From f55d710cf43d008e42ce06ead49dc0dfbf97d3a1 Mon Sep 17 00:00:00 2001 +From f09f6d7675062407b904fb85348249b09425bbed Mon Sep 17 00:00:00 2001 From: Anantha Krishnan Date: Wed, 4 Feb 2015 12:29:07 +0530 Subject: [PATCH 14/19] bluetooth: Vote UART CLK ON prior to firmware download @@ -3819,7 +3807,7 @@ index 95d5f1e8a5c2..20264f9978d9 100644 unsigned char vnd_local_bd_addr[6] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; typedef enum { -From b09f8b12c937ec58df0581b2d95493e036c86432 Mon Sep 17 00:00:00 2001 +From 96e0dfef4073e19927d1a5c3e45b91fc0a7a3827 Mon Sep 17 00:00:00 2001 From: Kamal Negi Date: Thu, 30 Apr 2015 15:53:06 +0530 Subject: [PATCH 15/19] Override IBS settings by reading configuration file @@ -3948,7 +3936,7 @@ index 20264f9978d9..8eaeeed8bc96 100644 ** Local type definitions ******************************************************************************/ -From b307659dc988054c1fef32c131417cfab2b74c3e Mon Sep 17 00:00:00 2001 +From 30168b14444dad98babe8e0dc4474bb1947e60e6 Mon Sep 17 00:00:00 2001 From: Dibyendu Roy Date: Fri, 22 May 2015 18:57:05 +0530 Subject: [PATCH 16/19] bluetooth: Fix flow control operation @@ -4002,7 +3990,7 @@ index 8eaeeed8bc96..3fdaf208e522 100644 #define USERIAL_OP_CLK_OFF 0x5442 -From bec6be1174e250c60b48b51933ab6f80a27a093e Mon Sep 17 00:00:00 2001 +From ed48ba0a9558ea9e0025210ade514e86579e0801 Mon Sep 17 00:00:00 2001 From: Dibyendu Roy Date: Thu, 11 Jun 2015 12:07:43 +0530 Subject: [PATCH 17/19] Adding MDM specific code under _PLATFORM_MDM_ @@ -4069,7 +4057,7 @@ index 3fdaf208e522..89f7db3bef86 100644 unsigned char vnd_local_bd_addr[6] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; typedef enum { -From 5ab2a193c11eaa8a68a0e060a560a5bd2ee2459c Mon Sep 17 00:00:00 2001 +From 73225f2554d77df772d026475d27413161f5aaa6 Mon Sep 17 00:00:00 2001 From: Dibyendu Roy Date: Mon, 6 Jul 2015 13:30:53 +0530 Subject: [PATCH 18/19] Bluetooth: Fix static analysis issues @@ -4108,7 +4096,7 @@ index 1891de24e21a..59bdc16e4e8f 100644 total_segment = tlv_size/MAX_SIZE_PER_TLV_SEGMENT; -From ca52faad6e23bee353e3315f136efb43d1e9d143 Mon Sep 17 00:00:00 2001 +From cba902ee7f1d78e8b46d0ce7e2243b2d9dddf063 Mon Sep 17 00:00:00 2001 From: Kamal Negi Date: Fri, 8 May 2015 15:01:02 +0530 Subject: [PATCH 19/19] Handle NULL Pointer derefrencing in AVRCP Target role diff --git a/meta-digi-dey/recipes-connectivity/bluez/bluez5-5.46/0004-QCA_bluetooth_chip_support.patch b/meta-digi-dey/recipes-connectivity/bluez/bluez5-5.46/0004-QCA_bluetooth_chip_support.patch index d1144bd81..c291d3044 100644 --- a/meta-digi-dey/recipes-connectivity/bluez/bluez5-5.46/0004-QCA_bluetooth_chip_support.patch +++ b/meta-digi-dey/recipes-connectivity/bluez/bluez5-5.46/0004-QCA_bluetooth_chip_support.patch @@ -1,3 +1,4 @@ +From 8e337d77edfbc4f69d326e3abbd8f4f1ca65bffb Mon Sep 17 00:00:00 2001 From: Jose Diaz de Grenu Date: Mon, 8 Jan 2018 10:29:51 +0100 Subject: [PATCH 1/4] Add hciattach rome support for Qualcomm chip QCA6564 @@ -11,10 +12,10 @@ Signed-off-by: Jose Diaz de Grenu Makefile.tools | 3 +- profiles/audio/avrcp.c | 27 +- tools/hciattach.c | 45 +- - tools/hciattach.h | 14 +- + tools/hciattach.h | 2 + tools/hciattach_rome.c | 1941 ++++++++++++++++++++++++++++++++++++++++++++++++ tools/hciattach_rome.h | 390 ++++++++++ - 6 files changed, 2406 insertions(+), 14 deletions(-) + 6 files changed, 2400 insertions(+), 8 deletions(-) create mode 100644 tools/hciattach_rome.c create mode 100644 tools/hciattach_rome.h @@ -231,26 +232,14 @@ index fad176c9b804..dda639cabca3 100644 return 0; } diff --git a/tools/hciattach.h b/tools/hciattach.h -index 249aab49e90d..481e3a65f685 100644 +index 249aab49e90d..5724b03bf2a6 100644 --- a/tools/hciattach.h +++ b/tools/hciattach.h -@@ -39,12 +39,13 @@ - #define HCI_UART_H4DS 3 - #define HCI_UART_LL 4 - #define HCI_UART_ATH3K 5 --#define HCI_UART_INTEL 6 --#define HCI_UART_BCM 7 --#define HCI_UART_QCA 8 --#define HCI_UART_AG6XX 9 --#define HCI_UART_NOKIA 10 --#define HCI_UART_MRVL 11 -+#define HCI_UART_IBS 6 -+#define HCI_UART_INTEL 7 -+#define HCI_UART_BCM 8 -+#define HCI_UART_QCA 9 -+#define HCI_UART_AG6XX 10 -+#define HCI_UART_NOKIA 11 -+#define HCI_UART_MRVL 12 +@@ -45,6 +45,7 @@ + #define HCI_UART_AG6XX 9 + #define HCI_UART_NOKIA 10 + #define HCI_UART_MRVL 11 ++#define HCI_UART_IBS 12 #define HCI_UART_RAW_DEVICE 0 #define HCI_UART_RESET_ON_INIT 1 From b3c05fa5c5480342b62d90917a89894da881ca0e Mon Sep 17 00:00:00 2001 From: Arturo Buzarra Date: Thu, 11 Oct 2018 08:42:08 +0200 Subject: [PATCH 16/30] meta-digi-arm: add support for ConnectCore 8X SBC Pro platform https://jira.digi.com/browse/DEL-6205 Signed-off-by: Arturo Buzarra --- .../conf/machine/ccimx8x-sbc-pro.conf | 44 +++ sdk/build-github.sh | 3 +- sdk/build.sh | 1 + .../ccimx8x-sbc-pro/bblayers.conf.sample | 22 ++ sdk/config/ccimx8x-sbc-pro/conf-notes.txt | 18 ++ sdk/config/ccimx8x-sbc-pro/local.conf.sample | 254 ++++++++++++++++++ 6 files changed, 341 insertions(+), 1 deletion(-) create mode 100644 meta-digi-arm/conf/machine/ccimx8x-sbc-pro.conf create mode 100644 sdk/config/ccimx8x-sbc-pro/bblayers.conf.sample create mode 100644 sdk/config/ccimx8x-sbc-pro/conf-notes.txt create mode 100644 sdk/config/ccimx8x-sbc-pro/local.conf.sample diff --git a/meta-digi-arm/conf/machine/ccimx8x-sbc-pro.conf b/meta-digi-arm/conf/machine/ccimx8x-sbc-pro.conf new file mode 100644 index 000000000..5eead7e89 --- /dev/null +++ b/meta-digi-arm/conf/machine/ccimx8x-sbc-pro.conf @@ -0,0 +1,44 @@ +#@TYPE: Machine +#@NAME: ConnectCore 8X Single Board Computer Pro. +#@DESCRIPTION: Machine configuration for Digi's ConnectCore 8X SBC Pro. + +# Include the machine configuration for Digi's ConnectCore 8X module. +include conf/machine/include/ccimx8x.inc + +# Wireless external module +WIRELESS_MODULE_append = " ${@base_conditional('HAVE_WIFI', '1', 'kernel-module-qualcomm', '', d)}" + +# Wireless p2p interface +WLAN_P2P_INTERFACE ?= "p2p0" + +MACHINE_EXTRA_RRECOMMENDS += " \ + cryptoauthlib \ + cryptoauth-openssl-engine \ +" + +# Firmware +MACHINE_FIRMWARE_append = " ${@base_conditional('HAVE_BT', '1', 'firmware-qualcomm-qca6574-bt', '', d)}" +MACHINE_FIRMWARE_append = " ${@base_conditional('HAVE_WIFI', '1', 'firmware-qualcomm-qca6574-wifi', '', d)}" + +# U-Boot configurations +# Last one is the default (the one the symlinks point at) +UBOOT_CONFIG ??= "ccimx8x_sbc_pro1GB ccimx8x_sbc_pro2GB" +UBOOT_CONFIG[ccimx8x_sbc_pro2GB] = "ccimx8x_sbc_pro2GB_defconfig,,u-boot-dtb.${UBOOT_SUFFIX}" +UBOOT_CONFIG[ccimx8x_sbc_pro1GB] = "ccimx8x_sbc_pro1GB_defconfig,,u-boot-dtb.${UBOOT_SUFFIX}" + +KERNEL_DEVICETREE ?= " \ + digi/ccimx8x-sbc-pro-id135.dtb \ + digi/ccimx8x-sbc-pro-wb.dtb \ + digi/ccimx8x-sbc-pro.dtb \ +" + +SERIAL_CONSOLES ?= "115200;ttyLP2" + +# Bluetooth tty +BT_TTY ?= "ttyLP1" + +# U-Boot script to be copied to the boot image +BOOT_SCRIPTS = "boot.scr:boot.scr" + +# Flash image types +IMAGE_FSTYPES ?= "boot.vfat ext4 sdcard tar.bz2 recovery.vfat" diff --git a/sdk/build-github.sh b/sdk/build-github.sh index 6566d0912..fbb5750cb 100755 --- a/sdk/build-github.sh +++ b/sdk/build-github.sh @@ -22,7 +22,7 @@ set -e -AVAILABLE_PLATFORMS="ccimx8x-sbc-express ccimx6qpsbc ccimx6sbc ccimx6ulsbc ccimx6ulstarter" +AVAILABLE_PLATFORMS="ccimx8x-sbc-pro ccimx8x-sbc-express ccimx6qpsbc ccimx6sbc ccimx6ulsbc ccimx6ulstarter" MANIFEST_URL="https://github.com/digi-embedded/dey-manifest.git" @@ -121,6 +121,7 @@ while read _pl _tgt; do # the fly with underscores. eval "${_pl//-/_}_tgt=\"${_tgt//,/ }\"" done<<-_EOF_ + ccimx8x-sbc-pro dey-image-qt ccimx8x-sbc-express dey-image-qt ccimx6qpsbc dey-image-qt ccimx6sbc dey-image-qt diff --git a/sdk/build.sh b/sdk/build.sh index bea80823e..d0a5178f1 100755 --- a/sdk/build.sh +++ b/sdk/build.sh @@ -171,6 +171,7 @@ while read _pl _var _tgt; do eval "${_pl//-/_}_var=\"${_var//,/ }\"" eval "${_pl//-/_}_tgt=\"${_tgt//,/ }\"" done<<-_EOF_ + ccimx8x-sbc-pro DONTBUILDVARIANTS dey-image-qt ccimx8x-sbc-express DONTBUILDVARIANTS dey-image-qt ccimx6qpsbc DONTBUILDVARIANTS dey-image-qt,dey-image-aws ccimx6sbc DONTBUILDVARIANTS dey-image-qt,dey-image-aws diff --git a/sdk/config/ccimx8x-sbc-pro/bblayers.conf.sample b/sdk/config/ccimx8x-sbc-pro/bblayers.conf.sample new file mode 100644 index 000000000..bc2ef9645 --- /dev/null +++ b/sdk/config/ccimx8x-sbc-pro/bblayers.conf.sample @@ -0,0 +1,22 @@ +# POKY_BBLAYERS_CONF_VERSION is increased each time build/conf/bblayers.conf +# changes incompatibly +POKY_BBLAYERS_CONF_VERSION = "2" + +BBPATH = "${TOPDIR}" +BBFILES ?= "" + +BBLAYERS ?= " \ + ##OEROOT##/meta \ + ##OEROOT##/meta-poky \ + ##OEROOT##/meta-yocto-bsp \ + ##DIGIBASE##/meta-openembedded/meta-oe \ + ##DIGIBASE##/meta-openembedded/meta-python \ + ##DIGIBASE##/meta-openembedded/meta-networking \ + ##DIGIBASE##/meta-openembedded/meta-webserver \ + ##DIGIBASE##/meta-qt5 \ + ##DIGIBASE##/meta-swupdate \ + ##DIGIBASE##/meta-freescale \ + ##DIGIBASE##/meta-fsl-demos \ + ##DIGIBASE##/meta-digi/meta-digi-arm \ + ##DIGIBASE##/meta-digi/meta-digi-dey \ + " diff --git a/sdk/config/ccimx8x-sbc-pro/conf-notes.txt b/sdk/config/ccimx8x-sbc-pro/conf-notes.txt new file mode 100644 index 000000000..6085b7217 --- /dev/null +++ b/sdk/config/ccimx8x-sbc-pro/conf-notes.txt @@ -0,0 +1,18 @@ +Digi Embedded Yocto provides the following image recipes: + + * dey-image-qt: graphical QT image + + By default the image is XWayland-based so it provides a full Weston + desktop environment. + + To compile the image for the framebuffer (instead of XWayland) add + the following line to the project's conf/local.conf: + + DISTRO_FEATURES_remove = "x11 wayland vulkan" + + * dey-image-aws: console-only image supporting Amazon Web Services IoT + + This image includes the AWS Greengrass Core and an AWS IoT platform + example application. For more information on AWS support in Digi + Embedded Yocto see the online documentation. + diff --git a/sdk/config/ccimx8x-sbc-pro/local.conf.sample b/sdk/config/ccimx8x-sbc-pro/local.conf.sample new file mode 100644 index 000000000..87394d017 --- /dev/null +++ b/sdk/config/ccimx8x-sbc-pro/local.conf.sample @@ -0,0 +1,254 @@ +# +# This file is your local configuration file and is where all local user settings +# are placed. The comments in this file give some guide to the options a new user +# to the system might want to change but pretty much any configuration option can +# be set in this file. More adventurous users can look at local.conf.extended +# which contains other examples of configuration which can be placed in this file +# but new users likely won't need any of them initially. +# +# Lines starting with the '#' character are commented out and in some cases the +# default values are provided as comments to show people example syntax. Enabling +# the option is a question of removing the # character and making any change to the +# variable as required. + +# +# Machine Selection +# +# You need to select a specific machine to target the build with. There are a selection +# of emulated machines available which can boot and run in the QEMU emulator: +# +#MACHINE ?= "qemuarm" +#MACHINE ?= "qemuarm64" +#MACHINE ?= "qemumips" +#MACHINE ?= "qemumips64" +#MACHINE ?= "qemuppc" +#MACHINE ?= "qemux86" +#MACHINE ?= "qemux86-64" +# +# There are also the following hardware board target machines included for +# demonstration purposes: +# +#MACHINE ?= "beaglebone" +#MACHINE ?= "genericx86" +#MACHINE ?= "genericx86-64" +#MACHINE ?= "mpc8315e-rdb" +#MACHINE ?= "edgerouter" +# +# This sets the default machine to be qemux86 if no other machine is selected: +#MACHINE ??= "qemux86" + +MACHINE = "ccimx8x-sbc-pro" + +# +# Use Digi's internal git repositories +# +#DIGI_INTERNAL_GIT ?= "1" + +# +# Where to place downloads +# +# During a first build the system will download many different source code tarballs +# from various upstream projects. This can take a while, particularly if your network +# connection is slow. These are all stored in DL_DIR. When wiping and rebuilding you +# can preserve this directory to speed up this part of subsequent builds. This directory +# is safe to share between multiple builds on the same machine too. +# +# The default is a downloads directory under TOPDIR which is the build directory. +# +#DL_DIR ?= "${TOPDIR}/downloads" + +# +# Where to place shared-state files +# +# BitBake has the capability to accelerate builds based on previously built output. +# This is done using "shared state" files which can be thought of as cache objects +# and this option determines where those files are placed. +# +# You can wipe out TMPDIR leaving this directory intact and the build would regenerate +# from these files if no changes were made to the configuration. If changes were made +# to the configuration, only shared state files where the state was still valid would +# be used (done using checksums). +# +# The default is a sstate-cache directory under TOPDIR. +# +#SSTATE_DIR ?= "${TOPDIR}/sstate-cache" + +# +# Where to place the build output +# +# This option specifies where the bulk of the building work should be done and +# where BitBake should place its temporary files and output. Keep in mind that +# this includes the extraction and compilation of many applications and the toolchain +# which can use Gigabytes of hard disk space. +# +# The default is a tmp directory under TOPDIR. +# +#TMPDIR = "${TOPDIR}/tmp" + +# +# Default policy config +# +# The distribution setting controls which policy settings are used as defaults. +# The default value is fine for general Yocto project use, at least initially. +# Ultimately when creating custom policy, people will likely end up subclassing +# these defaults. +# +DISTRO ?= "dey" +# As an example of a subclass there is a "bleeding" edge policy configuration +# where many versions are set to the absolute latest code from the upstream +# source control systems. This is just mentioned here as an example, its not +# useful to most new users. +# DISTRO ?= "poky-bleeding" + +# +# Package Management configuration +# +# This variable lists which packaging formats to enable. Multiple package backends +# can be enabled at once and the first item listed in the variable will be used +# to generate the root filesystems. +# Options are: +# - 'package_deb' for debian style deb files +# - 'package_ipk' for ipk files are used by opkg (a debian style embedded package manager) +# - 'package_rpm' for rpm style packages +# E.g.: PACKAGE_CLASSES ?= "package_rpm package_deb package_ipk" +# We default to rpm: +PACKAGE_CLASSES ?= "package_rpm" + +# +# SDK target architecture +# +# This variable specifies the architecture to build SDK items for and means +# you can build the SDK packages for architectures other than the machine you are +# running the build on (i.e. building i686 packages on an x86_64 host). +# Supported values are i686 and x86_64 +#SDKMACHINE ?= "i686" + +# +# Extra image configuration defaults +# +# The EXTRA_IMAGE_FEATURES variable allows extra packages to be added to the generated +# images. Some of these options are added to certain image types automatically. The +# variable can contain the following options: +# "dbg-pkgs" - add -dbg packages for all installed packages +# (adds symbol information for debugging/profiling) +# "dev-pkgs" - add -dev packages for all installed packages +# (useful if you want to develop against libs in the image) +# "ptest-pkgs" - add -ptest packages for all ptest-enabled packages +# (useful if you want to run the package test suites) +# "tools-sdk" - add development tools (gcc, make, pkgconfig etc.) +# "tools-debug" - add debugging tools (gdb, strace) +# "eclipse-debug" - add Eclipse remote debugging support +# "tools-profile" - add profiling tools (oprofile, lttng, valgrind) +# "tools-testapps" - add useful testing tools (ts_print, aplay, arecord etc.) +# "debug-tweaks" - make an image suitable for development +# e.g. ssh root access has a blank password +# There are other application targets that can be used here too, see +# meta/classes/image.bbclass and meta/classes/core-image.bbclass for more details. +# We default to enabling the debugging tweaks. +EXTRA_IMAGE_FEATURES ?= "debug-tweaks" + +# +# Additional image features +# +# The following is a list of additional classes to use when building images which +# enable extra features. Some available options which can be included in this variable +# are: +# - 'buildstats' collect build statistics +# - 'image-mklibs' to reduce shared library files size for an image +# - 'image-prelink' in order to prelink the filesystem image +# NOTE: if listing mklibs & prelink both, then make sure mklibs is before prelink +# NOTE: mklibs also needs to be explicitly enabled for a given image, see local.conf.extended +USER_CLASSES ?= "buildstats image-mklibs image-prelink" + +# +# Runtime testing of images +# +# The build system can test booting virtual machine images under qemu (an emulator) +# after any root filesystems are created and run tests against those images. To +# enable this uncomment this line. See classes/testimage(-auto).bbclass for +# further details. +#TEST_IMAGE = "1" +# +# Interactive shell configuration +# +# Under certain circumstances the system may need input from you and to do this it +# can launch an interactive shell. It needs to do this since the build is +# multithreaded and needs to be able to handle the case where more than one parallel +# process may require the user's attention. The default is iterate over the available +# terminal types to find one that works. +# +# Examples of the occasions this may happen are when resolving patches which cannot +# be applied, to use the devshell or the kernel menuconfig +# +# Supported values are auto, gnome, xfce, rxvt, screen, konsole (KDE 3.x only), none +# Note: currently, Konsole support only works for KDE 3.x due to the way +# newer Konsole versions behave +#OE_TERMINAL = "auto" +# By default disable interactive patch resolution (tasks will just fail instead): +PATCHRESOLVE = "noop" + +# +# Disk Space Monitoring during the build +# +# Monitor the disk space during the build. If there is less that 1GB of space or less +# than 100K inodes in any key build location (TMPDIR, DL_DIR, SSTATE_DIR), gracefully +# shutdown the build. If there is less that 100MB or 1K inodes, perform a hard abort +# of the build. The reason for this is that running completely out of space can corrupt +# files and damages the build in ways which may not be easily recoverable. +# It's necesary to monitor /tmp, if there is no space left the build will fail +# with very exotic errors. +BB_DISKMON_DIRS = "\ + STOPTASKS,${TMPDIR},1G,100K \ + STOPTASKS,${DL_DIR},1G,100K \ + STOPTASKS,${SSTATE_DIR},1G,100K \ + STOPTASKS,/tmp,100M,100K \ + ABORT,${TMPDIR},100M,1K \ + ABORT,${DL_DIR},100M,1K \ + ABORT,${SSTATE_DIR},100M,1K \ + ABORT,/tmp,10M,1K" + +# +# Shared-state files from other locations +# +# As mentioned above, shared state files are prebuilt cache data objects which can +# used to accelerate build time. This variable can be used to configure the system +# to search other mirror locations for these objects before it builds the data itself. +# +# This can be a filesystem directory, or a remote url such as http or ftp. These +# would contain the sstate-cache results from previous builds (possibly from other +# machines). This variable works like fetcher MIRRORS/PREMIRRORS and points to the +# cache locations to check for the shared objects. +# NOTE: if the mirror uses the same structure as SSTATE_DIR, you need to add PATH +# at the end as shown in the examples below. This will be substituted with the +# correct path within the directory structure. +#SSTATE_MIRRORS ?= "\ +#file://.* http://someserver.tld/share/sstate/PATH;downloadfilename=PATH \n \ +#file://.* file:///some/local/dir/sstate/PATH" + + +# +# Qemu configuration +# +# By default qemu will build with a builtin VNC server where graphical output can be +# seen. The two lines below enable the SDL backend too. By default libsdl-native will +# be built, if you want to use your host's libSDL instead of the minimal libsdl built +# by libsdl-native then uncomment the ASSUME_PROVIDED line below. +PACKAGECONFIG_append_pn-qemu-native = " sdl" +PACKAGECONFIG_append_pn-nativesdk-qemu = " sdl" +#ASSUME_PROVIDED += "libsdl-native" + + +# CONF_VERSION is increased each time build/conf/ changes incompatibly and is used to +# track the version of this file when it was generated. This can safely be ignored if +# this doesn't mean anything to you. +CONF_VERSION = "1" + +# +# Enable local PR server +# +PRSERV_HOST = "localhost:0" + +# +# Some libraries and packages are covered by NXP EULA +# +#ACCEPT_FSL_EULA = "1" From 557c2735c28e6d4a94b14a29175657125b85f8a8 Mon Sep 17 00:00:00 2001 From: Arturo Buzarra Date: Thu, 11 Oct 2018 08:52:04 +0200 Subject: [PATCH 17/30] uboot: add support to ConnectCore 8X SBC Pro platform Add initial support cloned from ccimx8x-sbc-express. https://jira.digi.com/browse/DEL-6205 Signed-off-by: Arturo Buzarra --- .../u-boot-dey/ccimx8x-sbc-pro/boot.txt | 37 ++++ .../ccimx8x-sbc-pro/install_linux_fw_sd.txt | 170 ++++++++++++++++++ 2 files changed, 207 insertions(+) create mode 100644 meta-digi-arm/recipes-bsp/u-boot/u-boot-dey/ccimx8x-sbc-pro/boot.txt create mode 100644 meta-digi-arm/recipes-bsp/u-boot/u-boot-dey/ccimx8x-sbc-pro/install_linux_fw_sd.txt diff --git a/meta-digi-arm/recipes-bsp/u-boot/u-boot-dey/ccimx8x-sbc-pro/boot.txt b/meta-digi-arm/recipes-bsp/u-boot/u-boot-dey/ccimx8x-sbc-pro/boot.txt new file mode 100644 index 000000000..600880c48 --- /dev/null +++ b/meta-digi-arm/recipes-bsp/u-boot/u-boot-dey/ccimx8x-sbc-pro/boot.txt @@ -0,0 +1,37 @@ +# +# U-Boot bootscript for EMMC/SD images created by Yocto. +# + +# +# Set device tree filename depending on the board ID (if defined) +# +if test -n "${board_id}"; then + setenv fdt_file Image.gz-ccimx8x-sbc-pro-id${board_id}.dtb +else + # + # Set device tree filename depending on the hardware variant + # + if test "${module_variant}" = "0x01" || test "${module_variant}" = "0x02" || test "${module_variant}" = "0x04"; then + setenv fdt_file Image.gz-ccimx8x-sbc-pro-wb.dtb + elif test "${module_variant}" = "0x03" || test "${module_variant}" = "0x05"; then + setenv fdt_file Image.gz-ccimx8x-sbc-pro.dtb + else + echo "------ Using default fdt_file: $fdt_file" + fi +fi + +# Get the UUID of the configured boot partition. +part uuid mmc ${mmcbootdev}:${mmcpart} bootpart +# Check the boot source. +if test "${bootpart}" = "${part1_uuid}"; then + # We are booting from the eMMC using 'linux'. + true +elif test "${bootpart}" = "${part2_uuid}"; then + # We are booting from the eMMC using 'recovery'. + setenv boot_initrd true + setenv initrd_file uramdisk-recovery.img +else + # We are booting from the SD card. + setenv mmcroot /dev/mmcblk${mmcbootdev}p2 +fi +dboot linux mmc ${mmcbootdev}:${mmcpart} diff --git a/meta-digi-arm/recipes-bsp/u-boot/u-boot-dey/ccimx8x-sbc-pro/install_linux_fw_sd.txt b/meta-digi-arm/recipes-bsp/u-boot/u-boot-dey/ccimx8x-sbc-pro/install_linux_fw_sd.txt new file mode 100644 index 000000000..1bf32a2ae --- /dev/null +++ b/meta-digi-arm/recipes-bsp/u-boot/u-boot-dey/ccimx8x-sbc-pro/install_linux_fw_sd.txt @@ -0,0 +1,170 @@ +# +# U-Boot script for installing Linux images created by Yocto from the SD +# card into the eMMC +# + +echo "############################################################" +echo "# Linux firmware install from micro SD #" +echo "############################################################" +echo "" +echo " This process will erase your eMMC and will install a new" +echo " U-Boot and Linux firmware images on the eMMC." +echo "" +echo " Press CTRL+C now if you wish to abort or wait 10 seconds" +echo " to continue." + +sleep 10 +if test $? -eq 1; then + echo "Aborted by user."; + exit; +fi + +# Determine U-Boot file to program basing on module variant +if test -n "${module_variant}"; then + if test "${module_variant}" = "0x01" || test "${module_variant}" = "0x04" || test "${module_variant}" = "0x05"; then + setenv INSTALL_UBOOT_FILENAME imx-boot-ccimx8x_sbc_pro1GB.bin; + elif test "${module_variant}" = "0x02" || test "${module_variant}" = "0x03"; then + setenv INSTALL_UBOOT_FILENAME imx-boot-ccimx8x_sbc_pro2GB.bin; + fi +fi +# Use 'test -n ...' because 'test -z ...' does not work well on old versions of +# u-boot when the checked value is empty. +if test -n "${INSTALL_UBOOT_FILENAME}"; then + true; +else + echo ""; + echo "[ERROR] Cannot determine U-Boot file for this module!"; + echo ""; + echo "1. Set variable 'INSTALL_UBOOT_FILENAME' depending on your ConnectCore 8X variant:"; + echo " - For a QuadXPlus CPU with 1GB DDR3, run:"; + echo " => setenv INSTALL_UBOOT_FILENAME imx-boot-ccimx8x_sbc_pro1GB.bin"; + echo " - For a QuadXPlus CPU with 2GB DDR3, run:"; + echo " => setenv INSTALL_UBOOT_FILENAME imx-boot-ccimx8x_sbc_pro2GB.bin"; + echo ""; + echo "2. Run the install script again."; + echo ""; + echo "Aborted"; + echo ""; + exit; +fi; + +setenv INSTALL_MMCDEV 1 +setenv INSTALL_LINUX_FILENAME dey-image-qt-##GRAPHICAL_BACKEND##-ccimx8x-sbc-pro.boot.vfat +setenv INSTALL_RECOVERY_FILENAME dey-image-qt-##GRAPHICAL_BACKEND##-ccimx8x-sbc-pro.recovery.vfat +setenv INSTALL_ROOTFS_FILENAME dey-image-qt-##GRAPHICAL_BACKEND##-ccimx8x-sbc-pro.ext4 + +# Check for presence of firmware files on the SD card +for install_f in ${INSTALL_UBOOT_FILENAME} ${INSTALL_LINUX_FILENAME} ${INSTALL_RECOVERY_FILENAME} ${INSTALL_ROOTFS_FILENAME}; do + if test ! -e mmc ${INSTALL_MMCDEV} ${install_f}; then + echo "ERROR: Could not find file ${install_f}"; + install_abort=1; + fi; +done +if test -n "${install_abort}"; then + echo "Aborted."; + exit; +fi + +# Skip user confirmation for U-Boot update +setenv forced_update 1 + +# Set bootdelay to zero so that firmware update is run immediately after +# the first reset. +setenv bootdelay 0 + +# Set target MMC device index to eMMC +setenv mmcdev 0 + +# Update U-Boot +echo "" +echo "" +echo ">> Installing U-Boot boot loader (target will reset)" +echo "" +echo "" +update uboot mmc ${INSTALL_MMCDEV} fat ${INSTALL_UBOOT_FILENAME} +if test $? -eq 1; then + echo "[ERROR] Failed to update U-Boot boot loader!"; + echo ""; + echo "Aborted."; + exit; +fi + +# Set 'bootcmd' to the second part of the script that will +# - Reset environment to defaults +# - Save the environment +# - Force on-the-fly updates to avoid possible verification errors +# - Partition the eMMC user data area for Linux +# - Update the 'linux' partition +# - Update the 'recovery' partition +# - Update the 'rootfs' partition +# - Configure recovery to wipe 'update' partition +# - Disable on-the-fly updates +# - Run 'recovery' and let the system boot after +setenv bootcmd " + env default -a; + saveenv; + setenv otf-update yes; + echo \"\"; + echo \"\"; + echo \">> Creating Linux partition table on the eMMC\"; + echo \"\"; + echo \"\"; + run partition_mmc_linux; + if test \$? -eq 1; then + echo \"[ERROR] Failed to create Linux partition table!\"; + echo \"\"; + echo \"Aborted.\"; + exit; + fi; + echo \"\"; + echo \"\"; + echo \">> Installing Linux kernel and device tree files\"; + echo \"\"; + echo \"\"; + update linux mmc ${INSTALL_MMCDEV} fat ${INSTALL_LINUX_FILENAME}; + if test \$? -eq 1; then + echo \"[ERROR] Failed to update linux partition!\"; + echo \"\"; + echo \"Aborted.\"; + exit; + fi; + echo \"\"; + echo \"\"; + echo \">> Installing recovery\"; + echo \"\"; + echo \"\"; + update recovery mmc ${INSTALL_MMCDEV} fat ${INSTALL_RECOVERY_FILENAME}; + if test \$? -eq 1; then + echo \"[ERROR] Failed to update recovery partition!\"; + echo \"\"; + echo \"Aborted.\"; + exit; + fi; + echo \"\"; + echo \"\"; + echo \">> Installing Linux root file system\"; + echo \"\"; + echo \"\"; + update rootfs mmc ${INSTALL_MMCDEV} fat ${INSTALL_ROOTFS_FILENAME}; + if test \$? -eq 1; then + echo \"[ERROR] Failed to update rootfs partition!\"; + echo \"\"; + echo \"Aborted.\"; + exit; + fi; + echo \"\"; + setenv boot_recovery yes; + setenv recovery_command wipe_update; + setenv otf-update; + saveenv; + echo \"\"; + echo \"\"; + echo \">> Firmware installation complete. Rebooting into recovery mode for final deployment.\"; + echo \"\"; + echo \"\"; + sleep 1; + reset; +" + +saveenv +reset From 3af8c2f566ef3e1a04d3ff554b98a7803f8b10dc Mon Sep 17 00:00:00 2001 From: Arturo Buzarra Date: Thu, 11 Oct 2018 08:55:38 +0200 Subject: [PATCH 18/30] modemmanager: generalize XBee Cellular rule for ccimx8x platforms https://jira.digi.com/browse/DEL-6205 Signed-off-by: Arturo Buzarra --- .../78-mm-digi-xbee-cellular.rules | 0 1 file changed, 0 insertions(+), 0 deletions(-) rename meta-digi-dey/recipes-connectivity/modemmanager/modemmanager/{ccimx8x-sbc-express => ccimx8x}/78-mm-digi-xbee-cellular.rules (100%) diff --git a/meta-digi-dey/recipes-connectivity/modemmanager/modemmanager/ccimx8x-sbc-express/78-mm-digi-xbee-cellular.rules b/meta-digi-dey/recipes-connectivity/modemmanager/modemmanager/ccimx8x/78-mm-digi-xbee-cellular.rules similarity index 100% rename from meta-digi-dey/recipes-connectivity/modemmanager/modemmanager/ccimx8x-sbc-express/78-mm-digi-xbee-cellular.rules rename to meta-digi-dey/recipes-connectivity/modemmanager/modemmanager/ccimx8x/78-mm-digi-xbee-cellular.rules From d44d97dc1b62b63343025e714912a42279861f99 Mon Sep 17 00:00:00 2001 From: Arturo Buzarra Date: Thu, 11 Oct 2018 09:04:46 +0200 Subject: [PATCH 19/30] libdigiapix: add board.conf file for the ConnectCore 8X SBC Pro platform The PWM and ADC values are still to be determined, since their BSP support is currently unavailable. https://jira.digi.com/browse/DEL-6205 Signed-off-by: Arturo Buzarra --- .../ccimx8x-sbc-pro/board.conf | 30 +++++++++++++++++++ 1 file changed, 30 insertions(+) create mode 100644 meta-digi-dey/recipes-digi/libdigiapix/libdigiapix-git/ccimx8x-sbc-pro/board.conf diff --git a/meta-digi-dey/recipes-digi/libdigiapix/libdigiapix-git/ccimx8x-sbc-pro/board.conf b/meta-digi-dey/recipes-digi/libdigiapix/libdigiapix-git/ccimx8x-sbc-pro/board.conf new file mode 100644 index 000000000..09c49ee83 --- /dev/null +++ b/meta-digi-dey/recipes-digi/libdigiapix/libdigiapix-git/ccimx8x-sbc-pro/board.conf @@ -0,0 +1,30 @@ +[board] +model = Digi International ConnectCore 8X SBC Pro. + +[GPIO] + +# USER LED0 - MCA_IO18 +USER_LED = 222 + +# USER BUTTON - MCA_IO05 +USER_BUTTON = 209 + +[I2C] + +# I2C-3 on Expansion connector. +DEFAULT_I2C_BUS = 3 + +[SPI] + +# SPI-0 on Expansion connector. +DEFAULT_SPI = 32766,0 + +[PWM] + +# TODO: PWM not currently supported +DEFAULT_PWM = 0,0 + +[ADC] + +# TODO: only MCA ADCs are supported at the moment, with them being disabled by default +DEFAULT_ADC = 0,0 From f47852a5735b8d6d0bee4ed23ea0d6fa15201853 Mon Sep 17 00:00:00 2001 From: Arturo Buzarra Date: Thu, 11 Oct 2018 09:09:10 +0200 Subject: [PATCH 20/30] imx-boot: generalize support for ccimx8x platforms with 1GB and 2GB of RAM Generalize DCD patch to be agnostic of the platform and modify the imx-boot recipe to depend only on the memory configuration instead of the platform name. https://jira.digi.com/browse/DEL-6205 Signed-off-by: Arturo Buzarra --- ...-DCD-for-the-2GB-variant-of-the-cc8x.patch | 601 +----------------- .../recipes-bsp/imx-mkimage/imx-boot_0.2.bb | 3 +- 2 files changed, 14 insertions(+), 590 deletions(-) diff --git a/meta-digi-arm/recipes-bsp/imx-mkimage/files/0002-cc8x-add-second-DCD-for-the-2GB-variant-of-the-cc8x.patch b/meta-digi-arm/recipes-bsp/imx-mkimage/files/0002-cc8x-add-second-DCD-for-the-2GB-variant-of-the-cc8x.patch index 00a01d53e..da34c8e21 100644 --- a/meta-digi-arm/recipes-bsp/imx-mkimage/files/0002-cc8x-add-second-DCD-for-the-2GB-variant-of-the-cc8x.patch +++ b/meta-digi-arm/recipes-bsp/imx-mkimage/files/0002-cc8x-add-second-DCD-for-the-2GB-variant-of-the-cc8x.patch @@ -11,600 +11,23 @@ imx-boot recipe is able to handle them. https://jira.digi.com/browse/DEL-6085 Signed-off-by: Gabriel Valcazar +Signed-off-by: Arturo Buzarra --- - iMX8QX/imx8qx_dcd_1.2GHz.cfg | 284 --------------------- - .../imx8qx_dcd_1.2GHz.cfg-ccimx8x_sbc_express1GB | 284 +++++++++++++++++++++ - .../imx8qx_dcd_1.2GHz.cfg-ccimx8x_sbc_express2GB | 284 +++++++++++++++++++++ - 3 files changed, 568 insertions(+), 284 deletions(-) - delete mode 100644 iMX8QX/imx8qx_dcd_1.2GHz.cfg - create mode 100644 iMX8QX/imx8qx_dcd_1.2GHz.cfg-ccimx8x_sbc_express1GB - create mode 100644 iMX8QX/imx8qx_dcd_1.2GHz.cfg-ccimx8x_sbc_express2GB + ...d_1.2GHz.cfg => imx8qx_dcd_1.2GHz.cfg-1GB} | 0 + iMX8QX/imx8qx_dcd_1.2GHz.cfg-2GB | 284 ++++++++++++++++++ + 2 files changed, 284 insertions(+) + rename iMX8QX/{imx8qx_dcd_1.2GHz.cfg => imx8qx_dcd_1.2GHz.cfg-1GB} (100%) + create mode 100644 iMX8QX/imx8qx_dcd_1.2GHz.cfg-2GB -diff --git a/iMX8QX/imx8qx_dcd_1.2GHz.cfg b/iMX8QX/imx8qx_dcd_1.2GHz.cfg -deleted file mode 100644 -index abf0ad8..0000000 ---- a/iMX8QX/imx8qx_dcd_1.2GHz.cfg -+++ /dev/null -@@ -1,284 +0,0 @@ --#define __ASSEMBLY__ -- --#include --#include -- --/* -- * Device Configuration Data (DCD) -- * -- * Each entry must have the format: -- * Addr-type Address Value -- * -- * where: -- * Addr-type register length (1,2 or 4 bytes) -- * Address absolute address of the register -- * value value to be stored in the register -- */ -- --#ifndef SCFW_DCD --/* For 1200MHz DDR, DRC 600MHz operation */ --DATA 4 0xff190000 0x00000CC8 /* DRC0 bringup */ --#else --/* Set the DRC rate to 600MHz, the PHY PLL will double this for the DRAM rate. */ --uint32_t rate2 = SC_600MHZ; --pm_set_clock_rate(SC_PT, SC_R_DRC_0, SC_PM_CLK_MISC0, &rate2); --#endif -- --DATA 4 0x41C80208 0x1 --DATA 4 0x41C80040 0xb --DATA 4 0x41C80204 0x1 -- --/* DRAM 0 controller configuration begin */ --DATA 4 DDRC_MSTR_0 0xC1080020 // Set LPDDR4, BL = 16 and active ranks --DATA 4 DDRC_DERATEEN_0 0x00000203 // derate enable, derate values, byte to read MRR data --DATA 4 DDRC_DERATEINT_0 0x0124F800 // derate MR4 interval read --DATA 4 DDRC_RFSHTMG_0 0x0049006C // tREFI, tRFC --DATA 4 DDRC_INIT0_0 0x40030495 // pre_cke = 2ms, post_cke = 2us --DATA 4 DDRC_INIT1_0 0x00770000 // dram_rstn = 200us --DATA 4 DDRC_INIT3_0 0x00440024 // MR1, MR2 --DATA 4 DDRC_INIT4_0 0x00F10000 // MR3, MR13 --DATA 4 DDRC_RANKCTL_0 0x0000066F // diff_rank_wr_gap, diff_rank_rd_gap, max_rank_rd --DATA 4 DDRC_DRAMTMG0_0 0x1618141A // wr2pr, tFAW, tRASmax, tRASmin --DATA 4 DDRC_DRAMTMG1_0 0x00050526 // tXP, rd2pre, tRC --DATA 4 DDRC_DRAMTMG2_0 0x060E1714 // WL, RL, rd2wr, wr2rd --DATA 4 DDRC_DRAMTMG3_0 0x00909000 // tmrw, tmrd, tmod --DATA 4 DDRC_DRAMTMG4_0 0x0B04060B // trcd, tccd, trrd, trp --DATA 4 DDRC_DRAMTMG5_0 0x02030909 // tCKCKEH, tCKCKEL, tckesr, tcke --DATA 4 DDRC_DRAMTMG6_0 0x02020006 // tckdpde, tckdpdx, tckcsx --DATA 4 DDRC_DRAMTMG7_0 0x00000301 // tckpde, tckpdx --DATA 4 DDRC_DRAMTMG12_0 0x00020510 // tCMDCKE, tCKEHCMD --DATA 4 DDRC_DRAMTMG13_0 0x0B100002 // tODTLoff, tCCDMW, tPPD --DATA 4 DDRC_DRAMTMG14_0 0x00000071 // txsr --DATA 4 DDRC_ZQCTL0_0 0x02580012 // tZQCAL, tZQLAT --DATA 4 DDRC_ZQCTL1_0 0x01E0493E // tZQReset, tzq_short_interval --DATA 4 DDRC_DFITMG0_0 0x0499820A // dfi_t_ctrl_delay, dfi_t_rddata_en, dfi_tphy_wrdata, dfi_tphy_wrlat --DATA 4 DDRC_DFITMG1_0 0x00070303 // dfi_t_wrdata_delay, dfi_t_dram_clk_disable, dfi_t_dram_clk_enable --DATA 4 DDRC_DFITMG2_0 0x00001708 // dfi_tphy_rdcslat, dfi_tphy_wrcslat --DATA 4 DDRC_DFIMISC_0 0x00000005 // dfi_data_cs_polarity --DATA 4 DDRC_DFIUPD0_0 0x00400003 // Disable the automatic dfi_ctrlupd_req generation --DATA 4 DDRC_DFIUPD1_0 0x008000A0 // dfi_ctrlupd_req generation interval generation (min and max) --DATA 4 DDRC_DFIUPD2_0 0x80000000 // dfi_phyupd_en --DATA 4 DDRC_ADDRMAP0_0 0x0000001F // addrmap_cs_bit0 --DATA 4 DDRC_ADDRMAP3_0 0x00000000 // addrmap_col_b9, addrmap_col_b8, addrmap_col_b7, addrmap_col_b6 --DATA 4 DDRC_ADDRMAP4_0 0x00001F1F // addrmap_col_b10 and addrmap_col_b11 set to de-activated --DATA 4 DDRC_ADDRMAP1_0 0x00080808 // addrmap_bank_b2, addrmap_bank_b1, addrmap_bank_b0 --DATA 4 DDRC_ADDRMAP5_0 0x07070707 // addrmap_row_b11, addrmap_row_b10_b2, addrmap_row_b1, addrmap_row_b0 --DATA 4 DDRC_ADDRMAP6_0 0x0F070707 // addrmap_row_b15, addrmap_row_b14, addrmap_row_b13, addrmap_row_b12 --DATA 4 DDRC_DBICTL_0 0x00000007 // rd_dbi_en=wr_dbi_en=dm_en=1 --DATA 4 DDRC_ODTMAP_0 0x00002211 // rank[3:0]_wr_odt, rank[3:0]_wr_odt --DATA 4 DDRC_PCTRL_0_0 0x00000001 // Enable port 0 -- --DATA 4 DDRC_DFITMG0_SHADOW_0 0x00808000 -- --DATA 4 DDRC_PWRCTL_0 0x0000010D -- --DATA 4 0x41c80208 0x1 --DATA 4 0x41c80040 0xf --DATA 4 0x41c80204 0x1 -- --//------------------------------------------- --// Configure registers for PHY initialization --// Timings are computed for 1200MHz DRAM operation --//-------------------------------------------- --// Set-up DRAM Configuration Register --DATA 4 DDR_PHY_DCR_0 0x0000040D // LPDDR4 selection with 8 bank --// Set-up byte and bit swapping registers --DATA 4 DDR_PHY_PGCR8_0 0x0001000A --DATA 4 DDR_PHY_DX0DQMAP0_0 0x00053210 // DQ bit 0/1/2/3/4 remapping --DATA 4 DDR_PHY_DX0DQMAP1_0 0x00004876 // DQ bit 5/6/7 and DM remapping --DATA 4 DDR_PHY_DX1DQMAP0_0 0x00053210 // DQ bit 0/1/2/3/4 remapping --DATA 4 DDR_PHY_DX1DQMAP1_0 0x00004876 // DQ bit 5/6/7 and DM remapping --DATA 4 DDR_PHY_DX2DQMAP0_0 0x00053210 // DQ bit 0/1/2/3/4 remapping --DATA 4 DDR_PHY_DX2DQMAP1_0 0x00004876 // DQ bit 5/6/7 and DM remapping --DATA 4 DDR_PHY_DX3DQMAP0_0 0x00053210 // DQ bit 0/1/2/3/4 remapping --DATA 4 DDR_PHY_DX3DQMAP1_0 0x00004876 // DQ bit 5/6/7 and DM remapping --DATA 4 DDR_PHY_CATR0_0 0x00141032 // Only for LPDDR3 but used here to know how LPDDR4 bytes are connected to PHY --DATA 4 DDR_PHY_CATR1_0 0x0103AAAA // Only for LPDDR3 but used here to know how LPDDR4 bytes are connected to PHY --// Set-up PHY General Configuration Register --// PGCR1,4,5,6,7 are untouched --SET_BIT 4 DDR_PHY_PGCR1_0 0x000A0000 // DISDIC=1 (no uMCTL2 commands can go to memory) and WDQSEXT=1 --DATA 4 DDR_PHY_PGCR0_0 0x87001E00 // Set ADCP=1 (Address Copy) --DATA 4 DDR_PHY_PGCR2_0 0x00F0A193 // Set tREFPRD --DATA 4 DDR_PHY_PGCR3_0 0x050A1080 // CKEN/CKNEN toggling and polarity --// Set-up PHY Timing Register --// PTR2 is untouched --DATA 4 DDR_PHY_PTR0_0 0x4B025810 // tPLLPD, tPLLGS, tPHYRST --DATA 4 DDR_PHY_PTR1_0 0x3A981518 // tPLLLOCK, tPLLRST --// Set-up PLL Control Register --DATA 4 DDR_PHY_PLLCR0_0 0x001C0000 --DATA 4 DDR_PHY_DX8SLbPLLCR0_0 0x001C0000 --// Set-up Impedance Control Register --DATA 4 DDR_PHY_ZQCR_0 0x008A2C58 // Set ODT_MODE=0b10(LPDDR4 stype pullup) --// ZPROG_DRAM_ODT and ZPROG_HOST_ODT --DATA 4 DDR_PHY_ZQ0PR0_0 0x1BBBB // Optimal setting based on factory testing --DATA 4 DDR_PHY_ZQ1PR0_0 0x1B9BB // Optimal setting based on factory testing --// Set-up PHY Initialization Register --DATA 4 DDR_PHY_PIR_0 0x32 --// Launch initialization (set bit 0) --DATA 4 DDR_PHY_PIR_0 0x33 -- -- --//------------------------------------------- --// Configure registers for DRAM initialization --//------------------------------------------- --// Set-up Mode Register --// MR0, MR3, MR4, MR5 MR6 are untouched --DATA 4 DDR_PHY_MR1_0 0x44 // Set BL, WR-PRE, nWR, RPST --DATA 4 DDR_PHY_MR2_0 0x24 // Set RL/WL --DATA 4 DDR_PHY_MR3_0 0xF1 // Set drive strength -- --DATA 4 DDR_PHY_MR11_0 0x54 // Set CA and DQ ODT --DATA 4 DDR_PHY_MR22_0 0x15 // Set ODTE-CS=1 (overrides ODT_CA for CS1 as CS not shared between ranks) --/* LPDDR4 mode register writes for CA and DQ VREF settings */ --DATA 4 DDR_PHY_MR12_0 0x48 --DATA 4 DDR_PHY_MR14_0 0x48 --// Set-up DRAM Timing Parameters Register --// DTPR6 is untouched --DATA 4 DDR_PHY_DTPR0_0 0x0C331A09 // tRRD, tRAS, tRP, tRTP --DATA 4 DDR_PHY_DTPR1_0 0x28300411 // tWLMRD, tFAW, tODTUP, tMRD --DATA 4 DDR_PHY_DTPR2_0 0x006960E2 // tRTW, tRTODT, tCMDCKE, tCKE, tVRCG, tXS --DATA 4 DDR_PHY_DTPR3_0 0x01800501 // tODX, tCCD, tDLLK, tDQSCKmax, tDQSCK (FIXME double check tDLLK) --DATA 4 DDR_PHY_DTPR4_0 0x00D82B0C // tRFC, tWLO, tXP --DATA 4 DDR_PHY_DTPR5_0 0x194C160D // tRC, tRCD, tWTR --// Set-up PHY Timing Register --DATA 4 DDR_PHY_PTR3_0 0x00249F00 // tDINIT0 --DATA 4 DDR_PHY_PTR4_0 0x00000960 // tDINIT1 --DATA 4 DDR_PHY_PTR5_0 0x0003A980 // tDINIT2 --DATA 4 DDR_PHY_PTR6_0 0x027004B0 // tDINIT4, tDINIT3 -- -- --// Set-up ODT Configuration Register --// DDR ODT_CA signal is tied at boundary of DDR. Thus no need to drive it dynamically. --DATA 4 DDR_PHY_RANKIDR_0 0x00000001 // Select rank 1 to write --DATA 4 DDR_PHY_ODTCR_0 0x00000000 // ODT of rank1 disabled --DATA 4 DDR_PHY_RANKIDR_0 0x00000000 // Select rank 0 to write --DATA 4 DDR_PHY_ODTCR_0 0x00000000 // ODT of rank0 disabled -- -- --// Set-up AC I/O Configuration Register --// ACIOCR1-4 are untouched --DATA 4 DDR_PHY_ACIOCR0_0 0x30070800 // PNUM2 (i.e.LPDDR4) selection [10:11] = 0x2 --DATA 4 DDR_PHY_ACIOCR5_0 0x09000000 // I/O mode = LPDDR4 --// Due to address copy set A[13] (=cke_B[0]) and A[15] (=cke_B[1]) outputs as always ON. --DATA 4 DDR_PHY_ACIOCR1_0 0x44000000 --// Set-up VREF Training Control Registers --DATA 4 DDR_PHY_VTCR0_0 0xF0032008 // CK1, CK0, DRAM VREF set to same as MR12 --DATA 4 DDR_PHY_VTCR1_0 0x07F0018F // HVIO=1, SHREN=1, SHRNK=0 --// Set-up DATX8 General Configuration Registers --// DXnGCR0-4 are untouched --SET_BIT 4 DDR_PHY_PGCR5_0 0x4 --DATA 4 DDR_PHY_PGCR6_0 0x00033200 // Enable CSN Bit Delay VT Compensation (AC already enabled by default) + drift limit --// Set-up DATX8 General Configuration Registers --DATA 4 DDR_PHY_DX0GCR5_0 0x09092020 // Set DXREFISELR0 and DXREFISELR1 to 0x30, maintain other defaults --DATA 4 DDR_PHY_DX1GCR5_0 0x09092020 // Set DXREFISELR0 and DXREFISELR1 to 0x30, maintain other defaults --DATA 4 DDR_PHY_DX2GCR5_0 0x09092020 // Set DXREFISELR0 and DXREFISELR1 to 0x30, maintain other defaults --DATA 4 DDR_PHY_DX3GCR5_0 0x09092020 // Set DXREFISELR0 and DXREFISELR1 to 0x30, maintain other defaults --DATA 4 DDR_PHY_DX0GCR4_0 0x0E00BF3C // Set DXREFSSEL,DXREFSSELRANGE,DXREFSEN,DXREFIEN, maintain other defaults --DATA 4 DDR_PHY_DX1GCR4_0 0x0E00BF3C // Set DXREFSSEL,DXREFSSELRANGE,DXREFSEN,DXREFIEN, maintain other defaults --DATA 4 DDR_PHY_DX2GCR4_0 0x0E00BF3C // Set DXREFSSEL,DXREFSSELRANGE,DXREFSEN,DXREFIEN, maintain other defaults --DATA 4 DDR_PHY_DX3GCR4_0 0x0E00BF3C // Set DXREFSSEL,DXREFSSELRANGE,DXREFSEN,DXREFIEN, maintain other defaults --// Set-up DATX8 DX Control Register 2 --// PREOEX=2.5tCK (0.5 more than MR1), POSOEX=1tCK (0.5 more than in MR3), LPWAKEUP_THRSH=0xA --DATA 4 DDR_PHY_DX8SLbDXCTL2_0 0x001C1400 --// Set-up DATX8 IO Control Register --DATA 4 DDR_PHY_DX8SLbIOCR_0 0x79000000 // I/O mode = LPDDR4 -- --#if DDR_TRAIN_IN_DCD --// Wait PHY initialization end then launch DRAM initialization --// Wait for bit 0 of PGSR0 to be '1' --CHECK_BITS_SET 4 DDR_PHY_PGSR0_0 0x1 --CHECK_BITS_CLR 4 DDR_PHY_PGSR0_0 0x7FF40000 // Check that no error occured -- --// Launch DRAM 0 initialization (set bit 0) --DATA 4 DDR_PHY_PIR_0 0x180 --DATA 4 DDR_PHY_PIR_0 0x181 -- --// DRAM 0 initialization end --CHECK_BITS_SET 4 DDR_PHY_PGSR0_0 0x1 --CHECK_BITS_CLR 4 DDR_PHY_PGSR0_0 0x7FF40000 -- --// Launch a second time DRAM initialization due to following Synopsys PHY bug: --// Title: "PUB does not program LPDDR4 DRAM MR22 prior to running DRAM ZQ calibration" --// Workaround: "Run DRAM Initialization twice" --DATA 4 DDR_PHY_PIR_0 0x100 --DATA 4 DDR_PHY_PIR_0 0x101 -- --// Wait (second time) DRAM 0 initialization end --CHECK_BITS_SET 4 DDR_PHY_PGSR0_0 0x1 --CHECK_BITS_CLR 4 DDR_PHY_PGSR0_0 0x7FF40000 -- --//---------------------------------------------------------------// --// DATA training --//---------------------------------------------------------------// --// configure PHY for data training --// The following register writes are recommended by SNPS prior to running training --CLR_BIT 4 DDR_PHY_DQSDR0_0 0x00000001 // Disable drift --SET_BIT 4 DDR_PHY_PGCR6_0 0x00000001 // Disable VT compensation --CHECK_BITS_SET 4 DDR_PHY_PGSR1_0 0x40000000 // Disable VT compensation --SET_BIT 4 DDR_PHY_PGCR1_0 0x00020040 // DISDIC=1; PUBMODE=1 --// Per SNPS initialize BIST registers for VREF training --DATA 4 DDR_PHY_BISTAR1_0 0x00010100 //BMRANK=1 (maximum rank minus 1); BIST Address Increment: 0x10 (16) --DATA 4 DDR_PHY_BISTAR2_0 0x700003FF // BMBANK=8; BMCOL=0x400 (limit to min cols in JEDEC) --DATA 4 DDR_PHY_BISTAR4_0 0x00003FFF // BMROW=0x4000 (limit to min rows in JEDEC) -- --// Set-up Data Training Configuration Register --// Note that DTCR0.RFSHDT are set to 0x0 as a workaround for PHY bug (Synopsys --// case 9001045655: Design limitation in LPDDR4 mode: REFRESH must be disabled during DQS2DQ training). --// (FYI avoiding refresh during training leads to Denali error (CUMULATIVE_REFRESH_POSTPONE_EXCEEDS_MAX_ALLOWED). --DATA 4 DDR_PHY_DTCR0_0 0x000071C7 // Set DTRPTN to 0x7. RFSHDT=0 --DATA 4 DDR_PHY_DTCR1_0 0x00010236 // Set RANKEN -- --CLR_BIT 4 DDR_PHY_DX4GCR1_0 0xFF // disable byte 4 -- --// Launch Write leveling --DATA 4 DDR_PHY_PIR_0 0x200 --DATA 4 DDR_PHY_PIR_0 0x201 --// Wait Write leveling to complete --CHECK_BITS_SET 4 DDR_PHY_PGSR0_0 0x1 --CHECK_BITS_CLR 4 DDR_PHY_PGSR0_0 0x00200000 -- --// Set DQS/DQSn glitch suppression resistor for training PHY0 --DATA 4 DDR_PHY_DX8SLbDQSCTL_0 0x012640F7 --// Launch Read DQS training --DATA 4 DDR_PHY_PIR_0 0x400 --DATA 4 DDR_PHY_PIR_0 0x401 --// Wait Read DQS training to complete PHY0 --CHECK_BITS_SET 4 DDR_PHY_PGSR0_0 0x1 --CHECK_BITS_CLR 4 DDR_PHY_PGSR0_0 0x00400000 --// Remove DQS/DQSn glitch suppression resistor PHY0 --DATA 4 DDR_PHY_DX8SLbDQSCTL_0 0x01264000 -- --// DQS2DQ training, Write leveling, Deskew and eye trainings --DATA 4 DDR_PHY_PIR_0 0x0010F800 --DATA 4 DDR_PHY_PIR_0 0x0010F801 --// Wait for training to complete --CHECK_BITS_SET 4 DDR_PHY_PGSR0_0 0x1 --CHECK_BITS_CLR 4 DDR_PHY_PGSR0_0 0x7FF40000 -- --// Launch VREF training --DATA 4 DDR_PHY_PIR_0 0x00020000 --DATA 4 DDR_PHY_PIR_0 0x00020001 --// Wait for training to complete --CHECK_BITS_SET 4 DDR_PHY_PGSR0_0 0x1 --CHECK_BITS_CLR 4 DDR_PHY_PGSR0_0 0x00080000 -- --//Re-allow uMCTL2 to send commands to DDR --CLR_BIT 4 DDR_PHY_PGCR1_0 0x00020040 // DISDIC=0, PUBMODE=0 -- --//DQS Drift Registers PHY0 --CLR_BIT 4 DDR_PHY_DX0GCR3_0 0x08000000 --CLR_BIT 4 DDR_PHY_DX1GCR3_0 0x08000000 --CLR_BIT 4 DDR_PHY_DX2GCR3_0 0x08000000 --CLR_BIT 4 DDR_PHY_DX3GCR3_0 0x08000000 --// Enable DQS drift detection PHY0 --DATA 4 DDR_PHY_DQSDR0_0 0x20188005 --DATA 4 DDR_PHY_DQSDR1_0 0xA8AA0000 --DATA 4 DDR_PHY_DQSDR2_0 0x00070200 -- --// Enable VT compensation --CLR_BIT 4 DDR_PHY_PGCR6_0 0x1 -- --//Check that controller is ready to operate --CHECK_BITS_SET 4 DDRC_STAT_0 0x1 -- --#endif -diff --git a/iMX8QX/imx8qx_dcd_1.2GHz.cfg-ccimx8x_sbc_express1GB b/iMX8QX/imx8qx_dcd_1.2GHz.cfg-ccimx8x_sbc_express1GB -new file mode 100644 -index 0000000..abf0ad8 ---- /dev/null -+++ b/iMX8QX/imx8qx_dcd_1.2GHz.cfg-ccimx8x_sbc_express1GB -@@ -0,0 +1,284 @@ -+#define __ASSEMBLY__ -+ -+#include -+#include -+ -+/* -+ * Device Configuration Data (DCD) -+ * -+ * Each entry must have the format: -+ * Addr-type Address Value -+ * -+ * where: -+ * Addr-type register length (1,2 or 4 bytes) -+ * Address absolute address of the register -+ * value value to be stored in the register -+ */ -+ -+#ifndef SCFW_DCD -+/* For 1200MHz DDR, DRC 600MHz operation */ -+DATA 4 0xff190000 0x00000CC8 /* DRC0 bringup */ -+#else -+/* Set the DRC rate to 600MHz, the PHY PLL will double this for the DRAM rate. */ -+uint32_t rate2 = SC_600MHZ; -+pm_set_clock_rate(SC_PT, SC_R_DRC_0, SC_PM_CLK_MISC0, &rate2); -+#endif -+ -+DATA 4 0x41C80208 0x1 -+DATA 4 0x41C80040 0xb -+DATA 4 0x41C80204 0x1 -+ -+/* DRAM 0 controller configuration begin */ -+DATA 4 DDRC_MSTR_0 0xC1080020 // Set LPDDR4, BL = 16 and active ranks -+DATA 4 DDRC_DERATEEN_0 0x00000203 // derate enable, derate values, byte to read MRR data -+DATA 4 DDRC_DERATEINT_0 0x0124F800 // derate MR4 interval read -+DATA 4 DDRC_RFSHTMG_0 0x0049006C // tREFI, tRFC -+DATA 4 DDRC_INIT0_0 0x40030495 // pre_cke = 2ms, post_cke = 2us -+DATA 4 DDRC_INIT1_0 0x00770000 // dram_rstn = 200us -+DATA 4 DDRC_INIT3_0 0x00440024 // MR1, MR2 -+DATA 4 DDRC_INIT4_0 0x00F10000 // MR3, MR13 -+DATA 4 DDRC_RANKCTL_0 0x0000066F // diff_rank_wr_gap, diff_rank_rd_gap, max_rank_rd -+DATA 4 DDRC_DRAMTMG0_0 0x1618141A // wr2pr, tFAW, tRASmax, tRASmin -+DATA 4 DDRC_DRAMTMG1_0 0x00050526 // tXP, rd2pre, tRC -+DATA 4 DDRC_DRAMTMG2_0 0x060E1714 // WL, RL, rd2wr, wr2rd -+DATA 4 DDRC_DRAMTMG3_0 0x00909000 // tmrw, tmrd, tmod -+DATA 4 DDRC_DRAMTMG4_0 0x0B04060B // trcd, tccd, trrd, trp -+DATA 4 DDRC_DRAMTMG5_0 0x02030909 // tCKCKEH, tCKCKEL, tckesr, tcke -+DATA 4 DDRC_DRAMTMG6_0 0x02020006 // tckdpde, tckdpdx, tckcsx -+DATA 4 DDRC_DRAMTMG7_0 0x00000301 // tckpde, tckpdx -+DATA 4 DDRC_DRAMTMG12_0 0x00020510 // tCMDCKE, tCKEHCMD -+DATA 4 DDRC_DRAMTMG13_0 0x0B100002 // tODTLoff, tCCDMW, tPPD -+DATA 4 DDRC_DRAMTMG14_0 0x00000071 // txsr -+DATA 4 DDRC_ZQCTL0_0 0x02580012 // tZQCAL, tZQLAT -+DATA 4 DDRC_ZQCTL1_0 0x01E0493E // tZQReset, tzq_short_interval -+DATA 4 DDRC_DFITMG0_0 0x0499820A // dfi_t_ctrl_delay, dfi_t_rddata_en, dfi_tphy_wrdata, dfi_tphy_wrlat -+DATA 4 DDRC_DFITMG1_0 0x00070303 // dfi_t_wrdata_delay, dfi_t_dram_clk_disable, dfi_t_dram_clk_enable -+DATA 4 DDRC_DFITMG2_0 0x00001708 // dfi_tphy_rdcslat, dfi_tphy_wrcslat -+DATA 4 DDRC_DFIMISC_0 0x00000005 // dfi_data_cs_polarity -+DATA 4 DDRC_DFIUPD0_0 0x00400003 // Disable the automatic dfi_ctrlupd_req generation -+DATA 4 DDRC_DFIUPD1_0 0x008000A0 // dfi_ctrlupd_req generation interval generation (min and max) -+DATA 4 DDRC_DFIUPD2_0 0x80000000 // dfi_phyupd_en -+DATA 4 DDRC_ADDRMAP0_0 0x0000001F // addrmap_cs_bit0 -+DATA 4 DDRC_ADDRMAP3_0 0x00000000 // addrmap_col_b9, addrmap_col_b8, addrmap_col_b7, addrmap_col_b6 -+DATA 4 DDRC_ADDRMAP4_0 0x00001F1F // addrmap_col_b10 and addrmap_col_b11 set to de-activated -+DATA 4 DDRC_ADDRMAP1_0 0x00080808 // addrmap_bank_b2, addrmap_bank_b1, addrmap_bank_b0 -+DATA 4 DDRC_ADDRMAP5_0 0x07070707 // addrmap_row_b11, addrmap_row_b10_b2, addrmap_row_b1, addrmap_row_b0 -+DATA 4 DDRC_ADDRMAP6_0 0x0F070707 // addrmap_row_b15, addrmap_row_b14, addrmap_row_b13, addrmap_row_b12 -+DATA 4 DDRC_DBICTL_0 0x00000007 // rd_dbi_en=wr_dbi_en=dm_en=1 -+DATA 4 DDRC_ODTMAP_0 0x00002211 // rank[3:0]_wr_odt, rank[3:0]_wr_odt -+DATA 4 DDRC_PCTRL_0_0 0x00000001 // Enable port 0 -+ -+DATA 4 DDRC_DFITMG0_SHADOW_0 0x00808000 -+ -+DATA 4 DDRC_PWRCTL_0 0x0000010D -+ -+DATA 4 0x41c80208 0x1 -+DATA 4 0x41c80040 0xf -+DATA 4 0x41c80204 0x1 -+ -+//------------------------------------------- -+// Configure registers for PHY initialization -+// Timings are computed for 1200MHz DRAM operation -+//-------------------------------------------- -+// Set-up DRAM Configuration Register -+DATA 4 DDR_PHY_DCR_0 0x0000040D // LPDDR4 selection with 8 bank -+// Set-up byte and bit swapping registers -+DATA 4 DDR_PHY_PGCR8_0 0x0001000A -+DATA 4 DDR_PHY_DX0DQMAP0_0 0x00053210 // DQ bit 0/1/2/3/4 remapping -+DATA 4 DDR_PHY_DX0DQMAP1_0 0x00004876 // DQ bit 5/6/7 and DM remapping -+DATA 4 DDR_PHY_DX1DQMAP0_0 0x00053210 // DQ bit 0/1/2/3/4 remapping -+DATA 4 DDR_PHY_DX1DQMAP1_0 0x00004876 // DQ bit 5/6/7 and DM remapping -+DATA 4 DDR_PHY_DX2DQMAP0_0 0x00053210 // DQ bit 0/1/2/3/4 remapping -+DATA 4 DDR_PHY_DX2DQMAP1_0 0x00004876 // DQ bit 5/6/7 and DM remapping -+DATA 4 DDR_PHY_DX3DQMAP0_0 0x00053210 // DQ bit 0/1/2/3/4 remapping -+DATA 4 DDR_PHY_DX3DQMAP1_0 0x00004876 // DQ bit 5/6/7 and DM remapping -+DATA 4 DDR_PHY_CATR0_0 0x00141032 // Only for LPDDR3 but used here to know how LPDDR4 bytes are connected to PHY -+DATA 4 DDR_PHY_CATR1_0 0x0103AAAA // Only for LPDDR3 but used here to know how LPDDR4 bytes are connected to PHY -+// Set-up PHY General Configuration Register -+// PGCR1,4,5,6,7 are untouched -+SET_BIT 4 DDR_PHY_PGCR1_0 0x000A0000 // DISDIC=1 (no uMCTL2 commands can go to memory) and WDQSEXT=1 -+DATA 4 DDR_PHY_PGCR0_0 0x87001E00 // Set ADCP=1 (Address Copy) -+DATA 4 DDR_PHY_PGCR2_0 0x00F0A193 // Set tREFPRD -+DATA 4 DDR_PHY_PGCR3_0 0x050A1080 // CKEN/CKNEN toggling and polarity -+// Set-up PHY Timing Register -+// PTR2 is untouched -+DATA 4 DDR_PHY_PTR0_0 0x4B025810 // tPLLPD, tPLLGS, tPHYRST -+DATA 4 DDR_PHY_PTR1_0 0x3A981518 // tPLLLOCK, tPLLRST -+// Set-up PLL Control Register -+DATA 4 DDR_PHY_PLLCR0_0 0x001C0000 -+DATA 4 DDR_PHY_DX8SLbPLLCR0_0 0x001C0000 -+// Set-up Impedance Control Register -+DATA 4 DDR_PHY_ZQCR_0 0x008A2C58 // Set ODT_MODE=0b10(LPDDR4 stype pullup) -+// ZPROG_DRAM_ODT and ZPROG_HOST_ODT -+DATA 4 DDR_PHY_ZQ0PR0_0 0x1BBBB // Optimal setting based on factory testing -+DATA 4 DDR_PHY_ZQ1PR0_0 0x1B9BB // Optimal setting based on factory testing -+// Set-up PHY Initialization Register -+DATA 4 DDR_PHY_PIR_0 0x32 -+// Launch initialization (set bit 0) -+DATA 4 DDR_PHY_PIR_0 0x33 -+ -+ -+//------------------------------------------- -+// Configure registers for DRAM initialization -+//------------------------------------------- -+// Set-up Mode Register -+// MR0, MR3, MR4, MR5 MR6 are untouched -+DATA 4 DDR_PHY_MR1_0 0x44 // Set BL, WR-PRE, nWR, RPST -+DATA 4 DDR_PHY_MR2_0 0x24 // Set RL/WL -+DATA 4 DDR_PHY_MR3_0 0xF1 // Set drive strength -+ -+DATA 4 DDR_PHY_MR11_0 0x54 // Set CA and DQ ODT -+DATA 4 DDR_PHY_MR22_0 0x15 // Set ODTE-CS=1 (overrides ODT_CA for CS1 as CS not shared between ranks) -+/* LPDDR4 mode register writes for CA and DQ VREF settings */ -+DATA 4 DDR_PHY_MR12_0 0x48 -+DATA 4 DDR_PHY_MR14_0 0x48 -+// Set-up DRAM Timing Parameters Register -+// DTPR6 is untouched -+DATA 4 DDR_PHY_DTPR0_0 0x0C331A09 // tRRD, tRAS, tRP, tRTP -+DATA 4 DDR_PHY_DTPR1_0 0x28300411 // tWLMRD, tFAW, tODTUP, tMRD -+DATA 4 DDR_PHY_DTPR2_0 0x006960E2 // tRTW, tRTODT, tCMDCKE, tCKE, tVRCG, tXS -+DATA 4 DDR_PHY_DTPR3_0 0x01800501 // tODX, tCCD, tDLLK, tDQSCKmax, tDQSCK (FIXME double check tDLLK) -+DATA 4 DDR_PHY_DTPR4_0 0x00D82B0C // tRFC, tWLO, tXP -+DATA 4 DDR_PHY_DTPR5_0 0x194C160D // tRC, tRCD, tWTR -+// Set-up PHY Timing Register -+DATA 4 DDR_PHY_PTR3_0 0x00249F00 // tDINIT0 -+DATA 4 DDR_PHY_PTR4_0 0x00000960 // tDINIT1 -+DATA 4 DDR_PHY_PTR5_0 0x0003A980 // tDINIT2 -+DATA 4 DDR_PHY_PTR6_0 0x027004B0 // tDINIT4, tDINIT3 -+ -+ -+// Set-up ODT Configuration Register -+// DDR ODT_CA signal is tied at boundary of DDR. Thus no need to drive it dynamically. -+DATA 4 DDR_PHY_RANKIDR_0 0x00000001 // Select rank 1 to write -+DATA 4 DDR_PHY_ODTCR_0 0x00000000 // ODT of rank1 disabled -+DATA 4 DDR_PHY_RANKIDR_0 0x00000000 // Select rank 0 to write -+DATA 4 DDR_PHY_ODTCR_0 0x00000000 // ODT of rank0 disabled -+ -+ -+// Set-up AC I/O Configuration Register -+// ACIOCR1-4 are untouched -+DATA 4 DDR_PHY_ACIOCR0_0 0x30070800 // PNUM2 (i.e.LPDDR4) selection [10:11] = 0x2 -+DATA 4 DDR_PHY_ACIOCR5_0 0x09000000 // I/O mode = LPDDR4 -+// Due to address copy set A[13] (=cke_B[0]) and A[15] (=cke_B[1]) outputs as always ON. -+DATA 4 DDR_PHY_ACIOCR1_0 0x44000000 -+// Set-up VREF Training Control Registers -+DATA 4 DDR_PHY_VTCR0_0 0xF0032008 // CK1, CK0, DRAM VREF set to same as MR12 -+DATA 4 DDR_PHY_VTCR1_0 0x07F0018F // HVIO=1, SHREN=1, SHRNK=0 -+// Set-up DATX8 General Configuration Registers -+// DXnGCR0-4 are untouched -+SET_BIT 4 DDR_PHY_PGCR5_0 0x4 -+DATA 4 DDR_PHY_PGCR6_0 0x00033200 // Enable CSN Bit Delay VT Compensation (AC already enabled by default) + drift limit -+// Set-up DATX8 General Configuration Registers -+DATA 4 DDR_PHY_DX0GCR5_0 0x09092020 // Set DXREFISELR0 and DXREFISELR1 to 0x30, maintain other defaults -+DATA 4 DDR_PHY_DX1GCR5_0 0x09092020 // Set DXREFISELR0 and DXREFISELR1 to 0x30, maintain other defaults -+DATA 4 DDR_PHY_DX2GCR5_0 0x09092020 // Set DXREFISELR0 and DXREFISELR1 to 0x30, maintain other defaults -+DATA 4 DDR_PHY_DX3GCR5_0 0x09092020 // Set DXREFISELR0 and DXREFISELR1 to 0x30, maintain other defaults -+DATA 4 DDR_PHY_DX0GCR4_0 0x0E00BF3C // Set DXREFSSEL,DXREFSSELRANGE,DXREFSEN,DXREFIEN, maintain other defaults -+DATA 4 DDR_PHY_DX1GCR4_0 0x0E00BF3C // Set DXREFSSEL,DXREFSSELRANGE,DXREFSEN,DXREFIEN, maintain other defaults -+DATA 4 DDR_PHY_DX2GCR4_0 0x0E00BF3C // Set DXREFSSEL,DXREFSSELRANGE,DXREFSEN,DXREFIEN, maintain other defaults -+DATA 4 DDR_PHY_DX3GCR4_0 0x0E00BF3C // Set DXREFSSEL,DXREFSSELRANGE,DXREFSEN,DXREFIEN, maintain other defaults -+// Set-up DATX8 DX Control Register 2 -+// PREOEX=2.5tCK (0.5 more than MR1), POSOEX=1tCK (0.5 more than in MR3), LPWAKEUP_THRSH=0xA -+DATA 4 DDR_PHY_DX8SLbDXCTL2_0 0x001C1400 -+// Set-up DATX8 IO Control Register -+DATA 4 DDR_PHY_DX8SLbIOCR_0 0x79000000 // I/O mode = LPDDR4 -+ -+#if DDR_TRAIN_IN_DCD -+// Wait PHY initialization end then launch DRAM initialization -+// Wait for bit 0 of PGSR0 to be '1' -+CHECK_BITS_SET 4 DDR_PHY_PGSR0_0 0x1 -+CHECK_BITS_CLR 4 DDR_PHY_PGSR0_0 0x7FF40000 // Check that no error occured -+ -+// Launch DRAM 0 initialization (set bit 0) -+DATA 4 DDR_PHY_PIR_0 0x180 -+DATA 4 DDR_PHY_PIR_0 0x181 -+ -+// DRAM 0 initialization end -+CHECK_BITS_SET 4 DDR_PHY_PGSR0_0 0x1 -+CHECK_BITS_CLR 4 DDR_PHY_PGSR0_0 0x7FF40000 -+ -+// Launch a second time DRAM initialization due to following Synopsys PHY bug: -+// Title: "PUB does not program LPDDR4 DRAM MR22 prior to running DRAM ZQ calibration" -+// Workaround: "Run DRAM Initialization twice" -+DATA 4 DDR_PHY_PIR_0 0x100 -+DATA 4 DDR_PHY_PIR_0 0x101 -+ -+// Wait (second time) DRAM 0 initialization end -+CHECK_BITS_SET 4 DDR_PHY_PGSR0_0 0x1 -+CHECK_BITS_CLR 4 DDR_PHY_PGSR0_0 0x7FF40000 -+ -+//---------------------------------------------------------------// -+// DATA training -+//---------------------------------------------------------------// -+// configure PHY for data training -+// The following register writes are recommended by SNPS prior to running training -+CLR_BIT 4 DDR_PHY_DQSDR0_0 0x00000001 // Disable drift -+SET_BIT 4 DDR_PHY_PGCR6_0 0x00000001 // Disable VT compensation -+CHECK_BITS_SET 4 DDR_PHY_PGSR1_0 0x40000000 // Disable VT compensation -+SET_BIT 4 DDR_PHY_PGCR1_0 0x00020040 // DISDIC=1; PUBMODE=1 -+// Per SNPS initialize BIST registers for VREF training -+DATA 4 DDR_PHY_BISTAR1_0 0x00010100 //BMRANK=1 (maximum rank minus 1); BIST Address Increment: 0x10 (16) -+DATA 4 DDR_PHY_BISTAR2_0 0x700003FF // BMBANK=8; BMCOL=0x400 (limit to min cols in JEDEC) -+DATA 4 DDR_PHY_BISTAR4_0 0x00003FFF // BMROW=0x4000 (limit to min rows in JEDEC) -+ -+// Set-up Data Training Configuration Register -+// Note that DTCR0.RFSHDT are set to 0x0 as a workaround for PHY bug (Synopsys -+// case 9001045655: Design limitation in LPDDR4 mode: REFRESH must be disabled during DQS2DQ training). -+// (FYI avoiding refresh during training leads to Denali error (CUMULATIVE_REFRESH_POSTPONE_EXCEEDS_MAX_ALLOWED). -+DATA 4 DDR_PHY_DTCR0_0 0x000071C7 // Set DTRPTN to 0x7. RFSHDT=0 -+DATA 4 DDR_PHY_DTCR1_0 0x00010236 // Set RANKEN -+ -+CLR_BIT 4 DDR_PHY_DX4GCR1_0 0xFF // disable byte 4 -+ -+// Launch Write leveling -+DATA 4 DDR_PHY_PIR_0 0x200 -+DATA 4 DDR_PHY_PIR_0 0x201 -+// Wait Write leveling to complete -+CHECK_BITS_SET 4 DDR_PHY_PGSR0_0 0x1 -+CHECK_BITS_CLR 4 DDR_PHY_PGSR0_0 0x00200000 -+ -+// Set DQS/DQSn glitch suppression resistor for training PHY0 -+DATA 4 DDR_PHY_DX8SLbDQSCTL_0 0x012640F7 -+// Launch Read DQS training -+DATA 4 DDR_PHY_PIR_0 0x400 -+DATA 4 DDR_PHY_PIR_0 0x401 -+// Wait Read DQS training to complete PHY0 -+CHECK_BITS_SET 4 DDR_PHY_PGSR0_0 0x1 -+CHECK_BITS_CLR 4 DDR_PHY_PGSR0_0 0x00400000 -+// Remove DQS/DQSn glitch suppression resistor PHY0 -+DATA 4 DDR_PHY_DX8SLbDQSCTL_0 0x01264000 -+ -+// DQS2DQ training, Write leveling, Deskew and eye trainings -+DATA 4 DDR_PHY_PIR_0 0x0010F800 -+DATA 4 DDR_PHY_PIR_0 0x0010F801 -+// Wait for training to complete -+CHECK_BITS_SET 4 DDR_PHY_PGSR0_0 0x1 -+CHECK_BITS_CLR 4 DDR_PHY_PGSR0_0 0x7FF40000 -+ -+// Launch VREF training -+DATA 4 DDR_PHY_PIR_0 0x00020000 -+DATA 4 DDR_PHY_PIR_0 0x00020001 -+// Wait for training to complete -+CHECK_BITS_SET 4 DDR_PHY_PGSR0_0 0x1 -+CHECK_BITS_CLR 4 DDR_PHY_PGSR0_0 0x00080000 -+ -+//Re-allow uMCTL2 to send commands to DDR -+CLR_BIT 4 DDR_PHY_PGCR1_0 0x00020040 // DISDIC=0, PUBMODE=0 -+ -+//DQS Drift Registers PHY0 -+CLR_BIT 4 DDR_PHY_DX0GCR3_0 0x08000000 -+CLR_BIT 4 DDR_PHY_DX1GCR3_0 0x08000000 -+CLR_BIT 4 DDR_PHY_DX2GCR3_0 0x08000000 -+CLR_BIT 4 DDR_PHY_DX3GCR3_0 0x08000000 -+// Enable DQS drift detection PHY0 -+DATA 4 DDR_PHY_DQSDR0_0 0x20188005 -+DATA 4 DDR_PHY_DQSDR1_0 0xA8AA0000 -+DATA 4 DDR_PHY_DQSDR2_0 0x00070200 -+ -+// Enable VT compensation -+CLR_BIT 4 DDR_PHY_PGCR6_0 0x1 -+ -+//Check that controller is ready to operate -+CHECK_BITS_SET 4 DDRC_STAT_0 0x1 -+ -+#endif -diff --git a/iMX8QX/imx8qx_dcd_1.2GHz.cfg-ccimx8x_sbc_express2GB b/iMX8QX/imx8qx_dcd_1.2GHz.cfg-ccimx8x_sbc_express2GB +diff --git a/iMX8QX/imx8qx_dcd_1.2GHz.cfg b/iMX8QX/imx8qx_dcd_1.2GHz.cfg-1GB +similarity index 100% +rename from iMX8QX/imx8qx_dcd_1.2GHz.cfg +rename to iMX8QX/imx8qx_dcd_1.2GHz.cfg-1GB +diff --git a/iMX8QX/imx8qx_dcd_1.2GHz.cfg-2GB b/iMX8QX/imx8qx_dcd_1.2GHz.cfg-2GB new file mode 100644 index 0000000..bb37fd5 --- /dev/null -+++ b/iMX8QX/imx8qx_dcd_1.2GHz.cfg-ccimx8x_sbc_express2GB ++++ b/iMX8QX/imx8qx_dcd_1.2GHz.cfg-2GB @@ -0,0 +1,284 @@ +#define __ASSEMBLY__ + diff --git a/meta-digi-arm/recipes-bsp/imx-mkimage/imx-boot_0.2.bb b/meta-digi-arm/recipes-bsp/imx-mkimage/imx-boot_0.2.bb index a8ee69487..6d5f2d81d 100644 --- a/meta-digi-arm/recipes-bsp/imx-mkimage/imx-boot_0.2.bb +++ b/meta-digi-arm/recipes-bsp/imx-mkimage/imx-boot_0.2.bb @@ -135,7 +135,8 @@ do_compile () { for type in ${UBOOT_CONFIG}; do cd ${S}/${SOC_TARGET} ln -sf u-boot.bin-${type} u-boot.bin - ln -sf ${DCD_SRC_NAME}-${type} ${DCD_SRC_NAME} + RAM_SIZE="$(echo ${type} | sed -e 's,.*\([0-9]\+GB\),\1,g')" + ln -sf ${DCD_SRC_NAME}-${RAM_SIZE} ${DCD_SRC_NAME} cd - for target in ${IMXBOOT_TARGETS}; do echo "building ${SOC_TARGET} - ${type} - ${target}" From 1497101245d8e30de0ea838a1eff1b05ac7682e4 Mon Sep 17 00:00:00 2001 From: Arturo Buzarra Date: Wed, 17 Oct 2018 14:23:48 +0200 Subject: [PATCH 21/30] busybox: adapt acpid.map file for ConnectCore 8X platforms https://jira.digi.com/browse/DEL-6128 Signed-off-by: Arturo Buzarra --- .../recipes-core/busybox/busybox-1.24.1/ccimx8x/acpid.map | 3 +++ 1 file changed, 3 insertions(+) create mode 100644 meta-digi-dey/recipes-core/busybox/busybox-1.24.1/ccimx8x/acpid.map diff --git a/meta-digi-dey/recipes-core/busybox/busybox-1.24.1/ccimx8x/acpid.map b/meta-digi-dey/recipes-core/busybox/busybox-1.24.1/ccimx8x/acpid.map new file mode 100644 index 000000000..f3940541e --- /dev/null +++ b/meta-digi-dey/recipes-core/busybox/busybox-1.24.1/ccimx8x/acpid.map @@ -0,0 +1,3 @@ +#s_type n_type(hex) s_code n_code value description +EV_KEY 0x01 KEY_SLEEP 142 1 pswitch-standby +EV_KEY 0x01 KEY_POWER 116 1 pswitch-poweroff From 9442509ea2e05bb8446ac8deff87c7da0cf6d623 Mon Sep 17 00:00:00 2001 From: Gabriel Valcazar Date: Thu, 4 Oct 2018 16:55:28 +0200 Subject: [PATCH 22/30] openssl: add compatibility with applications linking to v1.0.0 or higher Our current OpenSSL libraries are only functional when applications link against v1.0.2d or higher, making some packages containing pre-compiled applications that link to older versions (like AWS Greengrass) fail to build and/or run properly. This commit includes: * Changing SHLIB_EXT from so.1.0.2 to so.1.0.0 * Reverting the version-script to an older version with backwards compatibility plus newer symbols Specifically, these changes partially revert the patches added in the poky layer's commits a59bfd05d15085a3dc5669b47fd19867246c846b and 73a43fc15e0463c39baaadecab78fb3ef51b8cd0 respectively. Please note that this only modifies the cryptographic library's ABI, its code remains unchanged. Signed-off-by: Gabriel Valcazar --- .../openssl/openssl/version-script.patch | 4674 +++++++++++++++++ .../openssl/openssl_%.bbappend | 6 + 2 files changed, 4680 insertions(+) create mode 100644 meta-digi-dey/recipes-connectivity/openssl/openssl/version-script.patch diff --git a/meta-digi-dey/recipes-connectivity/openssl/openssl/version-script.patch b/meta-digi-dey/recipes-connectivity/openssl/openssl/version-script.patch new file mode 100644 index 000000000..7818ef6d9 --- /dev/null +++ b/meta-digi-dey/recipes-connectivity/openssl/openssl/version-script.patch @@ -0,0 +1,4674 @@ +Upstream-Status: Inappropriate + +Index: openssl-1.0.2~beta1.obsolete.0.0498436515490575/Configure +=================================================================== +--- openssl-1.0.2~beta1.obsolete.0.0498436515490575.orig/Configure 2014-02-24 21:02:30.000000000 +0100 ++++ openssl-1.0.2~beta1.obsolete.0.0498436515490575/Configure 2014-02-24 21:02:30.000000000 +0100 +@@ -1651,6 +1651,8 @@ + } + } + ++$shared_ldflag .= " -Wl,--version-script=openssl.ld"; ++ + open(IN,'$Makefile.new") || die "unable to create $Makefile.new:$!\n"; +Index: openssl-1.0.2~beta1.obsolete.0.0498436515490575/openssl.ld +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ openssl-1.0.2~beta1.obsolete.0.0498436515490575/openssl.ld 2014-02-24 22:19:08.601827266 +0100 +@@ -0,0 +1,4624 @@ ++OPENSSL_1.0.0 { ++ global: ++ BIO_f_ssl; ++ BIO_new_buffer_ssl_connect; ++ BIO_new_ssl; ++ BIO_new_ssl_connect; ++ BIO_proxy_ssl_copy_session_id; ++ BIO_ssl_copy_session_id; ++ BIO_ssl_shutdown; ++ d2i_SSL_SESSION; ++ DTLSv1_client_method; ++ DTLSv1_method; ++ DTLSv1_server_method; ++ ERR_load_SSL_strings; ++ i2d_SSL_SESSION; ++ kssl_build_principal_2; ++ kssl_cget_tkt; ++ kssl_check_authent; ++ kssl_ctx_free; ++ kssl_ctx_new; ++ kssl_ctx_setkey; ++ kssl_ctx_setprinc; ++ kssl_ctx_setstring; ++ kssl_ctx_show; ++ kssl_err_set; ++ kssl_krb5_free_data_contents; ++ kssl_sget_tkt; ++ kssl_skip_confound; ++ kssl_validate_times; ++ PEM_read_bio_SSL_SESSION; ++ PEM_read_SSL_SESSION; ++ PEM_write_bio_SSL_SESSION; ++ PEM_write_SSL_SESSION; ++ SSL_accept; ++ SSL_add_client_CA; ++ SSL_add_dir_cert_subjects_to_stack; ++ SSL_add_dir_cert_subjs_to_stk; ++ SSL_add_file_cert_subjects_to_stack; ++ SSL_add_file_cert_subjs_to_stk; ++ SSL_alert_desc_string; ++ SSL_alert_desc_string_long; ++ SSL_alert_type_string; ++ SSL_alert_type_string_long; ++ SSL_callback_ctrl; ++ SSL_check_private_key; ++ SSL_CIPHER_description; ++ SSL_CIPHER_get_bits; ++ SSL_CIPHER_get_name; ++ SSL_CIPHER_get_version; ++ SSL_clear; ++ SSL_COMP_add_compression_method; ++ SSL_COMP_get_compression_methods; ++ SSL_COMP_get_compress_methods; ++ SSL_COMP_get_name; ++ SSL_connect; ++ SSL_copy_session_id; ++ SSL_ctrl; ++ SSL_CTX_add_client_CA; ++ SSL_CTX_add_session; ++ SSL_CTX_callback_ctrl; ++ SSL_CTX_check_private_key; ++ SSL_CTX_ctrl; ++ SSL_CTX_flush_sessions; ++ SSL_CTX_free; ++ SSL_CTX_get_cert_store; ++ SSL_CTX_get_client_CA_list; ++ SSL_CTX_get_client_cert_cb; ++ SSL_CTX_get_ex_data; ++ SSL_CTX_get_ex_new_index; ++ SSL_CTX_get_info_callback; ++ SSL_CTX_get_quiet_shutdown; ++ SSL_CTX_get_timeout; ++ SSL_CTX_get_verify_callback; ++ SSL_CTX_get_verify_depth; ++ SSL_CTX_get_verify_mode; ++ SSL_CTX_load_verify_locations; ++ SSL_CTX_new; ++ SSL_CTX_remove_session; ++ SSL_CTX_sess_get_get_cb; ++ SSL_CTX_sess_get_new_cb; ++ SSL_CTX_sess_get_remove_cb; ++ SSL_CTX_sessions; ++ SSL_CTX_sess_set_get_cb; ++ SSL_CTX_sess_set_new_cb; ++ SSL_CTX_sess_set_remove_cb; ++ SSL_CTX_set1_param; ++ SSL_CTX_set_cert_store; ++ SSL_CTX_set_cert_verify_callback; ++ SSL_CTX_set_cert_verify_cb; ++ SSL_CTX_set_cipher_list; ++ SSL_CTX_set_client_CA_list; ++ SSL_CTX_set_client_cert_cb; ++ SSL_CTX_set_client_cert_engine; ++ SSL_CTX_set_cookie_generate_cb; ++ SSL_CTX_set_cookie_verify_cb; ++ SSL_CTX_set_default_passwd_cb; ++ SSL_CTX_set_default_passwd_cb_userdata; ++ SSL_CTX_set_default_verify_paths; ++ SSL_CTX_set_def_passwd_cb_ud; ++ SSL_CTX_set_def_verify_paths; ++ SSL_CTX_set_ex_data; ++ SSL_CTX_set_generate_session_id; ++ SSL_CTX_set_info_callback; ++ SSL_CTX_set_msg_callback; ++ SSL_CTX_set_psk_client_callback; ++ SSL_CTX_set_psk_server_callback; ++ SSL_CTX_set_purpose; ++ SSL_CTX_set_quiet_shutdown; ++ SSL_CTX_set_session_id_context; ++ SSL_CTX_set_ssl_version; ++ SSL_CTX_set_timeout; ++ SSL_CTX_set_tmp_dh_callback; ++ SSL_CTX_set_tmp_ecdh_callback; ++ SSL_CTX_set_tmp_rsa_callback; ++ SSL_CTX_set_trust; ++ SSL_CTX_set_verify; ++ SSL_CTX_set_verify_depth; ++ SSL_CTX_use_cert_chain_file; ++ SSL_CTX_use_certificate; ++ SSL_CTX_use_certificate_ASN1; ++ SSL_CTX_use_certificate_chain_file; ++ SSL_CTX_use_certificate_file; ++ SSL_CTX_use_PrivateKey; ++ SSL_CTX_use_PrivateKey_ASN1; ++ SSL_CTX_use_PrivateKey_file; ++ SSL_CTX_use_psk_identity_hint; ++ SSL_CTX_use_RSAPrivateKey; ++ SSL_CTX_use_RSAPrivateKey_ASN1; ++ SSL_CTX_use_RSAPrivateKey_file; ++ SSL_do_handshake; ++ SSL_dup; ++ SSL_dup_CA_list; ++ SSLeay_add_ssl_algorithms; ++ SSL_free; ++ SSL_get1_session; ++ SSL_get_certificate; ++ SSL_get_cipher_list; ++ SSL_get_ciphers; ++ SSL_get_client_CA_list; ++ SSL_get_current_cipher; ++ SSL_get_current_compression; ++ SSL_get_current_expansion; ++ SSL_get_default_timeout; ++ SSL_get_error; ++ SSL_get_ex_data; ++ SSL_get_ex_data_X509_STORE_CTX_idx; ++ SSL_get_ex_d_X509_STORE_CTX_idx; ++ SSL_get_ex_new_index; ++ SSL_get_fd; ++ SSL_get_finished; ++ SSL_get_info_callback; ++ SSL_get_peer_cert_chain; ++ SSL_get_peer_certificate; ++ SSL_get_peer_finished; ++ SSL_get_privatekey; ++ SSL_get_psk_identity; ++ SSL_get_psk_identity_hint; ++ SSL_get_quiet_shutdown; ++ SSL_get_rbio; ++ SSL_get_read_ahead; ++ SSL_get_rfd; ++ SSL_get_servername; ++ SSL_get_servername_type; ++ SSL_get_session; ++ SSL_get_shared_ciphers; ++ SSL_get_shutdown; ++ SSL_get_SSL_CTX; ++ SSL_get_ssl_method; ++ SSL_get_verify_callback; ++ SSL_get_verify_depth; ++ SSL_get_verify_mode; ++ SSL_get_verify_result; ++ SSL_get_version; ++ SSL_get_wbio; ++ SSL_get_wfd; ++ SSL_has_matching_session_id; ++ SSL_library_init; ++ SSL_load_client_CA_file; ++ SSL_load_error_strings; ++ SSL_new; ++ SSL_peek; ++ SSL_pending; ++ SSL_read; ++ SSL_renegotiate; ++ SSL_renegotiate_pending; ++ SSL_rstate_string; ++ SSL_rstate_string_long; ++ SSL_SESSION_cmp; ++ SSL_SESSION_free; ++ SSL_SESSION_get_ex_data; ++ SSL_SESSION_get_ex_new_index; ++ SSL_SESSION_get_id; ++ SSL_SESSION_get_time; ++ SSL_SESSION_get_timeout; ++ SSL_SESSION_hash; ++ SSL_SESSION_new; ++ SSL_SESSION_print; ++ SSL_SESSION_print_fp; ++ SSL_SESSION_set_ex_data; ++ SSL_SESSION_set_time; ++ SSL_SESSION_set_timeout; ++ SSL_set1_param; ++ SSL_set_accept_state; ++ SSL_set_bio; ++ SSL_set_cipher_list; ++ SSL_set_client_CA_list; ++ SSL_set_connect_state; ++ SSL_set_ex_data; ++ SSL_set_fd; ++ SSL_set_generate_session_id; ++ SSL_set_info_callback; ++ SSL_set_msg_callback; ++ SSL_set_psk_client_callback; ++ SSL_set_psk_server_callback; ++ SSL_set_purpose; ++ SSL_set_quiet_shutdown; ++ SSL_set_read_ahead; ++ SSL_set_rfd; ++ SSL_set_session; ++ SSL_set_session_id_context; ++ SSL_set_session_secret_cb; ++ SSL_set_session_ticket_ext; ++ SSL_set_session_ticket_ext_cb; ++ SSL_set_shutdown; ++ SSL_set_SSL_CTX; ++ SSL_set_ssl_method; ++ SSL_set_tmp_dh_callback; ++ SSL_set_tmp_ecdh_callback; ++ SSL_set_tmp_rsa_callback; ++ SSL_set_trust; ++ SSL_set_verify; ++ SSL_set_verify_depth; ++ SSL_set_verify_result; ++ SSL_set_wfd; ++ SSL_shutdown; ++ SSL_state; ++ SSL_state_string; ++ SSL_state_string_long; ++ SSL_use_certificate; ++ SSL_use_certificate_ASN1; ++ SSL_use_certificate_file; ++ SSL_use_PrivateKey; ++ SSL_use_PrivateKey_ASN1; ++ SSL_use_PrivateKey_file; ++ SSL_use_psk_identity_hint; ++ SSL_use_RSAPrivateKey; ++ SSL_use_RSAPrivateKey_ASN1; ++ SSL_use_RSAPrivateKey_file; ++ SSLv23_client_method; ++ SSLv23_method; ++ SSLv23_server_method; ++ SSLv2_client_method; ++ SSLv2_method; ++ SSLv2_server_method; ++ SSLv3_client_method; ++ SSLv3_method; ++ SSLv3_server_method; ++ SSL_version; ++ SSL_want; ++ SSL_write; ++ TLSv1_client_method; ++ TLSv1_method; ++ TLSv1_server_method; ++ ++ ++ SSLeay; ++ SSLeay_version; ++ ASN1_BIT_STRING_asn1_meth; ++ ASN1_HEADER_free; ++ ASN1_HEADER_new; ++ ASN1_IA5STRING_asn1_meth; ++ ASN1_INTEGER_get; ++ ASN1_INTEGER_set; ++ ASN1_INTEGER_to_BN; ++ ASN1_OBJECT_create; ++ ASN1_OBJECT_free; ++ ASN1_OBJECT_new; ++ ASN1_PRINTABLE_type; ++ ASN1_STRING_cmp; ++ ASN1_STRING_dup; ++ ASN1_STRING_free; ++ ASN1_STRING_new; ++ ASN1_STRING_print; ++ ASN1_STRING_set; ++ ASN1_STRING_type_new; ++ ASN1_TYPE_free; ++ ASN1_TYPE_new; ++ ASN1_UNIVERSALSTRING_to_string; ++ ASN1_UTCTIME_check; ++ ASN1_UTCTIME_print; ++ ASN1_UTCTIME_set; ++ ASN1_check_infinite_end; ++ ASN1_d2i_bio; ++ ASN1_d2i_fp; ++ ASN1_digest; ++ ASN1_dup; ++ ASN1_get_object; ++ ASN1_i2d_bio; ++ ASN1_i2d_fp; ++ ASN1_object_size; ++ ASN1_parse; ++ ASN1_put_object; ++ ASN1_sign; ++ ASN1_verify; ++ BF_cbc_encrypt; ++ BF_cfb64_encrypt; ++ BF_ecb_encrypt; ++ BF_encrypt; ++ BF_ofb64_encrypt; ++ BF_options; ++ BF_set_key; ++ BIO_CONNECT_free; ++ BIO_CONNECT_new; ++ BIO_accept; ++ BIO_ctrl; ++ BIO_int_ctrl; ++ BIO_debug_callback; ++ BIO_dump; ++ BIO_dup_chain; ++ BIO_f_base64; ++ BIO_f_buffer; ++ BIO_f_cipher; ++ BIO_f_md; ++ BIO_f_null; ++ BIO_f_proxy_server; ++ BIO_fd_non_fatal_error; ++ BIO_fd_should_retry; ++ BIO_find_type; ++ BIO_free; ++ BIO_free_all; ++ BIO_get_accept_socket; ++ BIO_get_filter_bio; ++ BIO_get_host_ip; ++ BIO_get_port; ++ BIO_get_retry_BIO; ++ BIO_get_retry_reason; ++ BIO_gethostbyname; ++ BIO_gets; ++ BIO_new; ++ BIO_new_accept; ++ BIO_new_connect; ++ BIO_new_fd; ++ BIO_new_file; ++ BIO_new_fp; ++ BIO_new_socket; ++ BIO_pop; ++ BIO_printf; ++ BIO_push; ++ BIO_puts; ++ BIO_read; ++ BIO_s_accept; ++ BIO_s_connect; ++ BIO_s_fd; ++ BIO_s_file; ++ BIO_s_mem; ++ BIO_s_null; ++ BIO_s_proxy_client; ++ BIO_s_socket; ++ BIO_set; ++ BIO_set_cipher; ++ BIO_set_tcp_ndelay; ++ BIO_sock_cleanup; ++ BIO_sock_error; ++ BIO_sock_init; ++ BIO_sock_non_fatal_error; ++ BIO_sock_should_retry; ++ BIO_socket_ioctl; ++ BIO_write; ++ BN_CTX_free; ++ BN_CTX_new; ++ BN_MONT_CTX_free; ++ BN_MONT_CTX_new; ++ BN_MONT_CTX_set; ++ BN_add; ++ BN_add_word; ++ BN_hex2bn; ++ BN_bin2bn; ++ BN_bn2hex; ++ BN_bn2bin; ++ BN_clear; ++ BN_clear_bit; ++ BN_clear_free; ++ BN_cmp; ++ BN_copy; ++ BN_div; ++ BN_div_word; ++ BN_dup; ++ BN_free; ++ BN_from_montgomery; ++ BN_gcd; ++ BN_generate_prime; ++ BN_get_word; ++ BN_is_bit_set; ++ BN_is_prime; ++ BN_lshift; ++ BN_lshift1; ++ BN_mask_bits; ++ BN_mod; ++ BN_mod_exp; ++ BN_mod_exp_mont; ++ BN_mod_exp_simple; ++ BN_mod_inverse; ++ BN_mod_mul; ++ BN_mod_mul_montgomery; ++ BN_mod_word; ++ BN_mul; ++ BN_new; ++ BN_num_bits; ++ BN_num_bits_word; ++ BN_options; ++ BN_print; ++ BN_print_fp; ++ BN_rand; ++ BN_reciprocal; ++ BN_rshift; ++ BN_rshift1; ++ BN_set_bit; ++ BN_set_word; ++ BN_sqr; ++ BN_sub; ++ BN_to_ASN1_INTEGER; ++ BN_ucmp; ++ BN_value_one; ++ BUF_MEM_free; ++ BUF_MEM_grow; ++ BUF_MEM_new; ++ BUF_strdup; ++ CONF_free; ++ CONF_get_number; ++ CONF_get_section; ++ CONF_get_string; ++ CONF_load; ++ CRYPTO_add_lock; ++ CRYPTO_dbg_free; ++ CRYPTO_dbg_malloc; ++ CRYPTO_dbg_realloc; ++ CRYPTO_dbg_remalloc; ++ CRYPTO_free; ++ CRYPTO_get_add_lock_callback; ++ CRYPTO_get_id_callback; ++ CRYPTO_get_lock_name; ++ CRYPTO_get_locking_callback; ++ CRYPTO_get_mem_functions; ++ CRYPTO_lock; ++ CRYPTO_malloc; ++ CRYPTO_mem_ctrl; ++ CRYPTO_mem_leaks; ++ CRYPTO_mem_leaks_cb; ++ CRYPTO_mem_leaks_fp; ++ CRYPTO_realloc; ++ CRYPTO_remalloc; ++ CRYPTO_set_add_lock_callback; ++ CRYPTO_set_id_callback; ++ CRYPTO_set_locking_callback; ++ CRYPTO_set_mem_functions; ++ CRYPTO_thread_id; ++ DH_check; ++ DH_compute_key; ++ DH_free; ++ DH_generate_key; ++ DH_generate_parameters; ++ DH_new; ++ DH_size; ++ DHparams_print; ++ DHparams_print_fp; ++ DSA_free; ++ DSA_generate_key; ++ DSA_generate_parameters; ++ DSA_is_prime; ++ DSA_new; ++ DSA_print; ++ DSA_print_fp; ++ DSA_sign; ++ DSA_sign_setup; ++ DSA_size; ++ DSA_verify; ++ DSAparams_print; ++ DSAparams_print_fp; ++ ERR_clear_error; ++ ERR_error_string; ++ ERR_free_strings; ++ ERR_func_error_string; ++ ERR_get_err_state_table; ++ ERR_get_error; ++ ERR_get_error_line; ++ ERR_get_state; ++ ERR_get_string_table; ++ ERR_lib_error_string; ++ ERR_load_ASN1_strings; ++ ERR_load_BIO_strings; ++ ERR_load_BN_strings; ++ ERR_load_BUF_strings; ++ ERR_load_CONF_strings; ++ ERR_load_DH_strings; ++ ERR_load_DSA_strings; ++ ERR_load_ERR_strings; ++ ERR_load_EVP_strings; ++ ERR_load_OBJ_strings; ++ ERR_load_PEM_strings; ++ ERR_load_PROXY_strings; ++ ERR_load_RSA_strings; ++ ERR_load_X509_strings; ++ ERR_load_crypto_strings; ++ ERR_load_strings; ++ ERR_peek_error; ++ ERR_peek_error_line; ++ ERR_print_errors; ++ ERR_print_errors_fp; ++ ERR_put_error; ++ ERR_reason_error_string; ++ ERR_remove_state; ++ EVP_BytesToKey; ++ EVP_CIPHER_CTX_cleanup; ++ EVP_CipherFinal; ++ EVP_CipherInit; ++ EVP_CipherUpdate; ++ EVP_DecodeBlock; ++ EVP_DecodeFinal; ++ EVP_DecodeInit; ++ EVP_DecodeUpdate; ++ EVP_DecryptFinal; ++ EVP_DecryptInit; ++ EVP_DecryptUpdate; ++ EVP_DigestFinal; ++ EVP_DigestInit; ++ EVP_DigestUpdate; ++ EVP_EncodeBlock; ++ EVP_EncodeFinal; ++ EVP_EncodeInit; ++ EVP_EncodeUpdate; ++ EVP_EncryptFinal; ++ EVP_EncryptInit; ++ EVP_EncryptUpdate; ++ EVP_OpenFinal; ++ EVP_OpenInit; ++ EVP_PKEY_assign; ++ EVP_PKEY_copy_parameters; ++ EVP_PKEY_free; ++ EVP_PKEY_missing_parameters; ++ EVP_PKEY_new; ++ EVP_PKEY_save_parameters; ++ EVP_PKEY_size; ++ EVP_PKEY_type; ++ EVP_SealFinal; ++ EVP_SealInit; ++ EVP_SignFinal; ++ EVP_VerifyFinal; ++ EVP_add_alias; ++ EVP_add_cipher; ++ EVP_add_digest; ++ EVP_bf_cbc; ++ EVP_bf_cfb64; ++ EVP_bf_ecb; ++ EVP_bf_ofb; ++ EVP_cleanup; ++ EVP_des_cbc; ++ EVP_des_cfb64; ++ EVP_des_ecb; ++ EVP_des_ede; ++ EVP_des_ede3; ++ EVP_des_ede3_cbc; ++ EVP_des_ede3_cfb64; ++ EVP_des_ede3_ofb; ++ EVP_des_ede_cbc; ++ EVP_des_ede_cfb64; ++ EVP_des_ede_ofb; ++ EVP_des_ofb; ++ EVP_desx_cbc; ++ EVP_dss; ++ EVP_dss1; ++ EVP_enc_null; ++ EVP_get_cipherbyname; ++ EVP_get_digestbyname; ++ EVP_get_pw_prompt; ++ EVP_idea_cbc; ++ EVP_idea_cfb64; ++ EVP_idea_ecb; ++ EVP_idea_ofb; ++ EVP_md2; ++ EVP_md5; ++ EVP_md_null; ++ EVP_rc2_cbc; ++ EVP_rc2_cfb64; ++ EVP_rc2_ecb; ++ EVP_rc2_ofb; ++ EVP_rc4; ++ EVP_read_pw_string; ++ EVP_set_pw_prompt; ++ EVP_sha; ++ EVP_sha1; ++ MD2; ++ MD2_Final; ++ MD2_Init; ++ MD2_Update; ++ MD2_options; ++ MD5; ++ MD5_Final; ++ MD5_Init; ++ MD5_Update; ++ MDC2; ++ MDC2_Final; ++ MDC2_Init; ++ MDC2_Update; ++ NETSCAPE_SPKAC_free; ++ NETSCAPE_SPKAC_new; ++ NETSCAPE_SPKI_free; ++ NETSCAPE_SPKI_new; ++ NETSCAPE_SPKI_sign; ++ NETSCAPE_SPKI_verify; ++ OBJ_add_object; ++ OBJ_bsearch; ++ OBJ_cleanup; ++ OBJ_cmp; ++ OBJ_create; ++ OBJ_dup; ++ OBJ_ln2nid; ++ OBJ_new_nid; ++ OBJ_nid2ln; ++ OBJ_nid2obj; ++ OBJ_nid2sn; ++ OBJ_obj2nid; ++ OBJ_sn2nid; ++ OBJ_txt2nid; ++ PEM_ASN1_read; ++ PEM_ASN1_read_bio; ++ PEM_ASN1_write; ++ PEM_ASN1_write_bio; ++ PEM_SealFinal; ++ PEM_SealInit; ++ PEM_SealUpdate; ++ PEM_SignFinal; ++ PEM_SignInit; ++ PEM_SignUpdate; ++ PEM_X509_INFO_read; ++ PEM_X509_INFO_read_bio; ++ PEM_X509_INFO_write_bio; ++ PEM_dek_info; ++ PEM_do_header; ++ PEM_get_EVP_CIPHER_INFO; ++ PEM_proc_type; ++ PEM_read; ++ PEM_read_DHparams; ++ PEM_read_DSAPrivateKey; ++ PEM_read_DSAparams; ++ PEM_read_PKCS7; ++ PEM_read_PrivateKey; ++ PEM_read_RSAPrivateKey; ++ PEM_read_X509; ++ PEM_read_X509_CRL; ++ PEM_read_X509_REQ; ++ PEM_read_bio; ++ PEM_read_bio_DHparams; ++ PEM_read_bio_DSAPrivateKey; ++ PEM_read_bio_DSAparams; ++ PEM_read_bio_PKCS7; ++ PEM_read_bio_PrivateKey; ++ PEM_read_bio_RSAPrivateKey; ++ PEM_read_bio_X509; ++ PEM_read_bio_X509_CRL; ++ PEM_read_bio_X509_REQ; ++ PEM_write; ++ PEM_write_DHparams; ++ PEM_write_DSAPrivateKey; ++ PEM_write_DSAparams; ++ PEM_write_PKCS7; ++ PEM_write_PrivateKey; ++ PEM_write_RSAPrivateKey; ++ PEM_write_X509; ++ PEM_write_X509_CRL; ++ PEM_write_X509_REQ; ++ PEM_write_bio; ++ PEM_write_bio_DHparams; ++ PEM_write_bio_DSAPrivateKey; ++ PEM_write_bio_DSAparams; ++ PEM_write_bio_PKCS7; ++ PEM_write_bio_PrivateKey; ++ PEM_write_bio_RSAPrivateKey; ++ PEM_write_bio_X509; ++ PEM_write_bio_X509_CRL; ++ PEM_write_bio_X509_REQ; ++ PKCS7_DIGEST_free; ++ PKCS7_DIGEST_new; ++ PKCS7_ENCRYPT_free; ++ PKCS7_ENCRYPT_new; ++ PKCS7_ENC_CONTENT_free; ++ PKCS7_ENC_CONTENT_new; ++ PKCS7_ENVELOPE_free; ++ PKCS7_ENVELOPE_new; ++ PKCS7_ISSUER_AND_SERIAL_digest; ++ PKCS7_ISSUER_AND_SERIAL_free; ++ PKCS7_ISSUER_AND_SERIAL_new; ++ PKCS7_RECIP_INFO_free; ++ PKCS7_RECIP_INFO_new; ++ PKCS7_SIGNED_free; ++ PKCS7_SIGNED_new; ++ PKCS7_SIGNER_INFO_free; ++ PKCS7_SIGNER_INFO_new; ++ PKCS7_SIGN_ENVELOPE_free; ++ PKCS7_SIGN_ENVELOPE_new; ++ PKCS7_dup; ++ PKCS7_free; ++ PKCS7_new; ++ PROXY_ENTRY_add_noproxy; ++ PROXY_ENTRY_clear_noproxy; ++ PROXY_ENTRY_free; ++ PROXY_ENTRY_get_noproxy; ++ PROXY_ENTRY_new; ++ PROXY_ENTRY_set_server; ++ PROXY_add_noproxy; ++ PROXY_add_server; ++ PROXY_check_by_host; ++ PROXY_check_url; ++ PROXY_clear_noproxy; ++ PROXY_free; ++ PROXY_get_noproxy; ++ PROXY_get_proxies; ++ PROXY_get_proxy_entry; ++ PROXY_load_conf; ++ PROXY_new; ++ PROXY_print; ++ RAND_bytes; ++ RAND_cleanup; ++ RAND_file_name; ++ RAND_load_file; ++ RAND_screen; ++ RAND_seed; ++ RAND_write_file; ++ RC2_cbc_encrypt; ++ RC2_cfb64_encrypt; ++ RC2_ecb_encrypt; ++ RC2_encrypt; ++ RC2_ofb64_encrypt; ++ RC2_set_key; ++ RC4; ++ RC4_options; ++ RC4_set_key; ++ RSAPrivateKey_asn1_meth; ++ RSAPrivateKey_dup; ++ RSAPublicKey_dup; ++ RSA_PKCS1_SSLeay; ++ RSA_free; ++ RSA_generate_key; ++ RSA_new; ++ RSA_new_method; ++ RSA_print; ++ RSA_print_fp; ++ RSA_private_decrypt; ++ RSA_private_encrypt; ++ RSA_public_decrypt; ++ RSA_public_encrypt; ++ RSA_set_default_method; ++ RSA_sign; ++ RSA_sign_ASN1_OCTET_STRING; ++ RSA_size; ++ RSA_verify; ++ RSA_verify_ASN1_OCTET_STRING; ++ SHA; ++ SHA1; ++ SHA1_Final; ++ SHA1_Init; ++ SHA1_Update; ++ SHA_Final; ++ SHA_Init; ++ SHA_Update; ++ OpenSSL_add_all_algorithms; ++ OpenSSL_add_all_ciphers; ++ OpenSSL_add_all_digests; ++ TXT_DB_create_index; ++ TXT_DB_free; ++ TXT_DB_get_by_index; ++ TXT_DB_insert; ++ TXT_DB_read; ++ TXT_DB_write; ++ X509_ALGOR_free; ++ X509_ALGOR_new; ++ X509_ATTRIBUTE_free; ++ X509_ATTRIBUTE_new; ++ X509_CINF_free; ++ X509_CINF_new; ++ X509_CRL_INFO_free; ++ X509_CRL_INFO_new; ++ X509_CRL_add_ext; ++ X509_CRL_cmp; ++ X509_CRL_delete_ext; ++ X509_CRL_dup; ++ X509_CRL_free; ++ X509_CRL_get_ext; ++ X509_CRL_get_ext_by_NID; ++ X509_CRL_get_ext_by_OBJ; ++ X509_CRL_get_ext_by_critical; ++ X509_CRL_get_ext_count; ++ X509_CRL_new; ++ X509_CRL_sign; ++ X509_CRL_verify; ++ X509_EXTENSION_create_by_NID; ++ X509_EXTENSION_create_by_OBJ; ++ X509_EXTENSION_dup; ++ X509_EXTENSION_free; ++ X509_EXTENSION_get_critical; ++ X509_EXTENSION_get_data; ++ X509_EXTENSION_get_object; ++ X509_EXTENSION_new; ++ X509_EXTENSION_set_critical; ++ X509_EXTENSION_set_data; ++ X509_EXTENSION_set_object; ++ X509_INFO_free; ++ X509_INFO_new; ++ X509_LOOKUP_by_alias; ++ X509_LOOKUP_by_fingerprint; ++ X509_LOOKUP_by_issuer_serial; ++ X509_LOOKUP_by_subject; ++ X509_LOOKUP_ctrl; ++ X509_LOOKUP_file; ++ X509_LOOKUP_free; ++ X509_LOOKUP_hash_dir; ++ X509_LOOKUP_init; ++ X509_LOOKUP_new; ++ X509_LOOKUP_shutdown; ++ X509_NAME_ENTRY_create_by_NID; ++ X509_NAME_ENTRY_create_by_OBJ; ++ X509_NAME_ENTRY_dup; ++ X509_NAME_ENTRY_free; ++ X509_NAME_ENTRY_get_data; ++ X509_NAME_ENTRY_get_object; ++ X509_NAME_ENTRY_new; ++ X509_NAME_ENTRY_set_data; ++ X509_NAME_ENTRY_set_object; ++ X509_NAME_add_entry; ++ X509_NAME_cmp; ++ X509_NAME_delete_entry; ++ X509_NAME_digest; ++ X509_NAME_dup; ++ X509_NAME_entry_count; ++ X509_NAME_free; ++ X509_NAME_get_entry; ++ X509_NAME_get_index_by_NID; ++ X509_NAME_get_index_by_OBJ; ++ X509_NAME_get_text_by_NID; ++ X509_NAME_get_text_by_OBJ; ++ X509_NAME_hash; ++ X509_NAME_new; ++ X509_NAME_oneline; ++ X509_NAME_print; ++ X509_NAME_set; ++ X509_OBJECT_free_contents; ++ X509_OBJECT_retrieve_by_subject; ++ X509_OBJECT_up_ref_count; ++ X509_PKEY_free; ++ X509_PKEY_new; ++ X509_PUBKEY_free; ++ X509_PUBKEY_get; ++ X509_PUBKEY_new; ++ X509_PUBKEY_set; ++ X509_REQ_INFO_free; ++ X509_REQ_INFO_new; ++ X509_REQ_dup; ++ X509_REQ_free; ++ X509_REQ_get_pubkey; ++ X509_REQ_new; ++ X509_REQ_print; ++ X509_REQ_print_fp; ++ X509_REQ_set_pubkey; ++ X509_REQ_set_subject_name; ++ X509_REQ_set_version; ++ X509_REQ_sign; ++ X509_REQ_to_X509; ++ X509_REQ_verify; ++ X509_REVOKED_add_ext; ++ X509_REVOKED_delete_ext; ++ X509_REVOKED_free; ++ X509_REVOKED_get_ext; ++ X509_REVOKED_get_ext_by_NID; ++ X509_REVOKED_get_ext_by_OBJ; ++ X509_REVOKED_get_ext_by_critical; ++ X509_REVOKED_get_ext_by_critic; ++ X509_REVOKED_get_ext_count; ++ X509_REVOKED_new; ++ X509_SIG_free; ++ X509_SIG_new; ++ X509_STORE_CTX_cleanup; ++ X509_STORE_CTX_init; ++ X509_STORE_add_cert; ++ X509_STORE_add_lookup; ++ X509_STORE_free; ++ X509_STORE_get_by_subject; ++ X509_STORE_load_locations; ++ X509_STORE_new; ++ X509_STORE_set_default_paths; ++ X509_VAL_free; ++ X509_VAL_new; ++ X509_add_ext; ++ X509_asn1_meth; ++ X509_certificate_type; ++ X509_check_private_key; ++ X509_cmp_current_time; ++ X509_delete_ext; ++ X509_digest; ++ X509_dup; ++ X509_free; ++ X509_get_default_cert_area; ++ X509_get_default_cert_dir; ++ X509_get_default_cert_dir_env; ++ X509_get_default_cert_file; ++ X509_get_default_cert_file_env; ++ X509_get_default_private_dir; ++ X509_get_ext; ++ X509_get_ext_by_NID; ++ X509_get_ext_by_OBJ; ++ X509_get_ext_by_critical; ++ X509_get_ext_count; ++ X509_get_issuer_name; ++ X509_get_pubkey; ++ X509_get_pubkey_parameters; ++ X509_get_serialNumber; ++ X509_get_subject_name; ++ X509_gmtime_adj; ++ X509_issuer_and_serial_cmp; ++ X509_issuer_and_serial_hash; ++ X509_issuer_name_cmp; ++ X509_issuer_name_hash; ++ X509_load_cert_file; ++ X509_new; ++ X509_print; ++ X509_print_fp; ++ X509_set_issuer_name; ++ X509_set_notAfter; ++ X509_set_notBefore; ++ X509_set_pubkey; ++ X509_set_serialNumber; ++ X509_set_subject_name; ++ X509_set_version; ++ X509_sign; ++ X509_subject_name_cmp; ++ X509_subject_name_hash; ++ X509_to_X509_REQ; ++ X509_verify; ++ X509_verify_cert; ++ X509_verify_cert_error_string; ++ X509v3_add_ext; ++ X509v3_add_extension; ++ X509v3_add_netscape_extensions; ++ X509v3_add_standard_extensions; ++ X509v3_cleanup_extensions; ++ X509v3_data_type_by_NID; ++ X509v3_data_type_by_OBJ; ++ X509v3_delete_ext; ++ X509v3_get_ext; ++ X509v3_get_ext_by_NID; ++ X509v3_get_ext_by_OBJ; ++ X509v3_get_ext_by_critical; ++ X509v3_get_ext_count; ++ X509v3_pack_string; ++ X509v3_pack_type_by_NID; ++ X509v3_pack_type_by_OBJ; ++ X509v3_unpack_string; ++ _des_crypt; ++ a2d_ASN1_OBJECT; ++ a2i_ASN1_INTEGER; ++ a2i_ASN1_STRING; ++ asn1_Finish; ++ asn1_GetSequence; ++ bn_div_words; ++ bn_expand2; ++ bn_mul_add_words; ++ bn_mul_words; ++ BN_uadd; ++ BN_usub; ++ bn_sqr_words; ++ _ossl_old_crypt; ++ d2i_ASN1_BIT_STRING; ++ d2i_ASN1_BOOLEAN; ++ d2i_ASN1_HEADER; ++ d2i_ASN1_IA5STRING; ++ d2i_ASN1_INTEGER; ++ d2i_ASN1_OBJECT; ++ d2i_ASN1_OCTET_STRING; ++ d2i_ASN1_PRINTABLE; ++ d2i_ASN1_PRINTABLESTRING; ++ d2i_ASN1_SET; ++ d2i_ASN1_T61STRING; ++ d2i_ASN1_TYPE; ++ d2i_ASN1_UTCTIME; ++ d2i_ASN1_bytes; ++ d2i_ASN1_type_bytes; ++ d2i_DHparams; ++ d2i_DSAPrivateKey; ++ d2i_DSAPrivateKey_bio; ++ d2i_DSAPrivateKey_fp; ++ d2i_DSAPublicKey; ++ d2i_DSAparams; ++ d2i_NETSCAPE_SPKAC; ++ d2i_NETSCAPE_SPKI; ++ d2i_Netscape_RSA; ++ d2i_PKCS7; ++ d2i_PKCS7_DIGEST; ++ d2i_PKCS7_ENCRYPT; ++ d2i_PKCS7_ENC_CONTENT; ++ d2i_PKCS7_ENVELOPE; ++ d2i_PKCS7_ISSUER_AND_SERIAL; ++ d2i_PKCS7_RECIP_INFO; ++ d2i_PKCS7_SIGNED; ++ d2i_PKCS7_SIGNER_INFO; ++ d2i_PKCS7_SIGN_ENVELOPE; ++ d2i_PKCS7_bio; ++ d2i_PKCS7_fp; ++ d2i_PrivateKey; ++ d2i_PublicKey; ++ d2i_RSAPrivateKey; ++ d2i_RSAPrivateKey_bio; ++ d2i_RSAPrivateKey_fp; ++ d2i_RSAPublicKey; ++ d2i_X509; ++ d2i_X509_ALGOR; ++ d2i_X509_ATTRIBUTE; ++ d2i_X509_CINF; ++ d2i_X509_CRL; ++ d2i_X509_CRL_INFO; ++ d2i_X509_CRL_bio; ++ d2i_X509_CRL_fp; ++ d2i_X509_EXTENSION; ++ d2i_X509_NAME; ++ d2i_X509_NAME_ENTRY; ++ d2i_X509_PKEY; ++ d2i_X509_PUBKEY; ++ d2i_X509_REQ; ++ d2i_X509_REQ_INFO; ++ d2i_X509_REQ_bio; ++ d2i_X509_REQ_fp; ++ d2i_X509_REVOKED; ++ d2i_X509_SIG; ++ d2i_X509_VAL; ++ d2i_X509_bio; ++ d2i_X509_fp; ++ DES_cbc_cksum; ++ DES_cbc_encrypt; ++ DES_cblock_print_file; ++ DES_cfb64_encrypt; ++ DES_cfb_encrypt; ++ DES_decrypt3; ++ DES_ecb3_encrypt; ++ DES_ecb_encrypt; ++ DES_ede3_cbc_encrypt; ++ DES_ede3_cfb64_encrypt; ++ DES_ede3_ofb64_encrypt; ++ DES_enc_read; ++ DES_enc_write; ++ DES_encrypt1; ++ DES_encrypt2; ++ DES_encrypt3; ++ DES_fcrypt; ++ DES_is_weak_key; ++ DES_key_sched; ++ DES_ncbc_encrypt; ++ DES_ofb64_encrypt; ++ DES_ofb_encrypt; ++ DES_options; ++ DES_pcbc_encrypt; ++ DES_quad_cksum; ++ DES_random_key; ++ _ossl_old_des_random_seed; ++ _ossl_old_des_read_2passwords; ++ _ossl_old_des_read_password; ++ _ossl_old_des_read_pw; ++ _ossl_old_des_read_pw_string; ++ DES_set_key; ++ DES_set_odd_parity; ++ DES_string_to_2keys; ++ DES_string_to_key; ++ DES_xcbc_encrypt; ++ DES_xwhite_in2out; ++ fcrypt_body; ++ i2a_ASN1_INTEGER; ++ i2a_ASN1_OBJECT; ++ i2a_ASN1_STRING; ++ i2d_ASN1_BIT_STRING; ++ i2d_ASN1_BOOLEAN; ++ i2d_ASN1_HEADER; ++ i2d_ASN1_IA5STRING; ++ i2d_ASN1_INTEGER; ++ i2d_ASN1_OBJECT; ++ i2d_ASN1_OCTET_STRING; ++ i2d_ASN1_PRINTABLE; ++ i2d_ASN1_SET; ++ i2d_ASN1_TYPE; ++ i2d_ASN1_UTCTIME; ++ i2d_ASN1_bytes; ++ i2d_DHparams; ++ i2d_DSAPrivateKey; ++ i2d_DSAPrivateKey_bio; ++ i2d_DSAPrivateKey_fp; ++ i2d_DSAPublicKey; ++ i2d_DSAparams; ++ i2d_NETSCAPE_SPKAC; ++ i2d_NETSCAPE_SPKI; ++ i2d_Netscape_RSA; ++ i2d_PKCS7; ++ i2d_PKCS7_DIGEST; ++ i2d_PKCS7_ENCRYPT; ++ i2d_PKCS7_ENC_CONTENT; ++ i2d_PKCS7_ENVELOPE; ++ i2d_PKCS7_ISSUER_AND_SERIAL; ++ i2d_PKCS7_RECIP_INFO; ++ i2d_PKCS7_SIGNED; ++ i2d_PKCS7_SIGNER_INFO; ++ i2d_PKCS7_SIGN_ENVELOPE; ++ i2d_PKCS7_bio; ++ i2d_PKCS7_fp; ++ i2d_PrivateKey; ++ i2d_PublicKey; ++ i2d_RSAPrivateKey; ++ i2d_RSAPrivateKey_bio; ++ i2d_RSAPrivateKey_fp; ++ i2d_RSAPublicKey; ++ i2d_X509; ++ i2d_X509_ALGOR; ++ i2d_X509_ATTRIBUTE; ++ i2d_X509_CINF; ++ i2d_X509_CRL; ++ i2d_X509_CRL_INFO; ++ i2d_X509_CRL_bio; ++ i2d_X509_CRL_fp; ++ i2d_X509_EXTENSION; ++ i2d_X509_NAME; ++ i2d_X509_NAME_ENTRY; ++ i2d_X509_PKEY; ++ i2d_X509_PUBKEY; ++ i2d_X509_REQ; ++ i2d_X509_REQ_INFO; ++ i2d_X509_REQ_bio; ++ i2d_X509_REQ_fp; ++ i2d_X509_REVOKED; ++ i2d_X509_SIG; ++ i2d_X509_VAL; ++ i2d_X509_bio; ++ i2d_X509_fp; ++ idea_cbc_encrypt; ++ idea_cfb64_encrypt; ++ idea_ecb_encrypt; ++ idea_encrypt; ++ idea_ofb64_encrypt; ++ idea_options; ++ idea_set_decrypt_key; ++ idea_set_encrypt_key; ++ lh_delete; ++ lh_doall; ++ lh_doall_arg; ++ lh_free; ++ lh_insert; ++ lh_new; ++ lh_node_stats; ++ lh_node_stats_bio; ++ lh_node_usage_stats; ++ lh_node_usage_stats_bio; ++ lh_retrieve; ++ lh_stats; ++ lh_stats_bio; ++ lh_strhash; ++ sk_delete; ++ sk_delete_ptr; ++ sk_dup; ++ sk_find; ++ sk_free; ++ sk_insert; ++ sk_new; ++ sk_pop; ++ sk_pop_free; ++ sk_push; ++ sk_set_cmp_func; ++ sk_shift; ++ sk_unshift; ++ sk_zero; ++ BIO_f_nbio_test; ++ ASN1_TYPE_get; ++ ASN1_TYPE_set; ++ PKCS7_content_free; ++ ERR_load_PKCS7_strings; ++ X509_find_by_issuer_and_serial; ++ X509_find_by_subject; ++ PKCS7_ctrl; ++ PKCS7_set_type; ++ PKCS7_set_content; ++ PKCS7_SIGNER_INFO_set; ++ PKCS7_add_signer; ++ PKCS7_add_certificate; ++ PKCS7_add_crl; ++ PKCS7_content_new; ++ PKCS7_dataSign; ++ PKCS7_dataVerify; ++ PKCS7_dataInit; ++ PKCS7_add_signature; ++ PKCS7_cert_from_signer_info; ++ PKCS7_get_signer_info; ++ EVP_delete_alias; ++ EVP_mdc2; ++ PEM_read_bio_RSAPublicKey; ++ PEM_write_bio_RSAPublicKey; ++ d2i_RSAPublicKey_bio; ++ i2d_RSAPublicKey_bio; ++ PEM_read_RSAPublicKey; ++ PEM_write_RSAPublicKey; ++ d2i_RSAPublicKey_fp; ++ i2d_RSAPublicKey_fp; ++ BIO_copy_next_retry; ++ RSA_flags; ++ X509_STORE_add_crl; ++ X509_load_crl_file; ++ EVP_rc2_40_cbc; ++ EVP_rc4_40; ++ EVP_CIPHER_CTX_init; ++ HMAC; ++ HMAC_Init; ++ HMAC_Update; ++ HMAC_Final; ++ ERR_get_next_error_library; ++ EVP_PKEY_cmp_parameters; ++ HMAC_cleanup; ++ BIO_ptr_ctrl; ++ BIO_new_file_internal; ++ BIO_new_fp_internal; ++ BIO_s_file_internal; ++ BN_BLINDING_convert; ++ BN_BLINDING_invert; ++ BN_BLINDING_update; ++ RSA_blinding_on; ++ RSA_blinding_off; ++ i2t_ASN1_OBJECT; ++ BN_BLINDING_new; ++ BN_BLINDING_free; ++ EVP_cast5_cbc; ++ EVP_cast5_cfb64; ++ EVP_cast5_ecb; ++ EVP_cast5_ofb; ++ BF_decrypt; ++ CAST_set_key; ++ CAST_encrypt; ++ CAST_decrypt; ++ CAST_ecb_encrypt; ++ CAST_cbc_encrypt; ++ CAST_cfb64_encrypt; ++ CAST_ofb64_encrypt; ++ RC2_decrypt; ++ OBJ_create_objects; ++ BN_exp; ++ BN_mul_word; ++ BN_sub_word; ++ BN_dec2bn; ++ BN_bn2dec; ++ BIO_ghbn_ctrl; ++ CRYPTO_free_ex_data; ++ CRYPTO_get_ex_data; ++ CRYPTO_set_ex_data; ++ ERR_load_CRYPTO_strings; ++ ERR_load_CRYPTOlib_strings; ++ EVP_PKEY_bits; ++ MD5_Transform; ++ SHA1_Transform; ++ SHA_Transform; ++ X509_STORE_CTX_get_chain; ++ X509_STORE_CTX_get_current_cert; ++ X509_STORE_CTX_get_error; ++ X509_STORE_CTX_get_error_depth; ++ X509_STORE_CTX_get_ex_data; ++ X509_STORE_CTX_set_cert; ++ X509_STORE_CTX_set_chain; ++ X509_STORE_CTX_set_error; ++ X509_STORE_CTX_set_ex_data; ++ CRYPTO_dup_ex_data; ++ CRYPTO_get_new_lockid; ++ CRYPTO_new_ex_data; ++ RSA_set_ex_data; ++ RSA_get_ex_data; ++ RSA_get_ex_new_index; ++ RSA_padding_add_PKCS1_type_1; ++ RSA_padding_add_PKCS1_type_2; ++ RSA_padding_add_SSLv23; ++ RSA_padding_add_none; ++ RSA_padding_check_PKCS1_type_1; ++ RSA_padding_check_PKCS1_type_2; ++ RSA_padding_check_SSLv23; ++ RSA_padding_check_none; ++ bn_add_words; ++ d2i_Netscape_RSA_2; ++ CRYPTO_get_ex_new_index; ++ RIPEMD160_Init; ++ RIPEMD160_Update; ++ RIPEMD160_Final; ++ RIPEMD160; ++ RIPEMD160_Transform; ++ RC5_32_set_key; ++ RC5_32_ecb_encrypt; ++ RC5_32_encrypt; ++ RC5_32_decrypt; ++ RC5_32_cbc_encrypt; ++ RC5_32_cfb64_encrypt; ++ RC5_32_ofb64_encrypt; ++ BN_bn2mpi; ++ BN_mpi2bn; ++ ASN1_BIT_STRING_get_bit; ++ ASN1_BIT_STRING_set_bit; ++ BIO_get_ex_data; ++ BIO_get_ex_new_index; ++ BIO_set_ex_data; ++ X509v3_get_key_usage; ++ X509v3_set_key_usage; ++ a2i_X509v3_key_usage; ++ i2a_X509v3_key_usage; ++ EVP_PKEY_decrypt; ++ EVP_PKEY_encrypt; ++ PKCS7_RECIP_INFO_set; ++ PKCS7_add_recipient; ++ PKCS7_add_recipient_info; ++ PKCS7_set_cipher; ++ ASN1_TYPE_get_int_octetstring; ++ ASN1_TYPE_get_octetstring; ++ ASN1_TYPE_set_int_octetstring; ++ ASN1_TYPE_set_octetstring; ++ ASN1_UTCTIME_set_string; ++ ERR_add_error_data; ++ ERR_set_error_data; ++ EVP_CIPHER_asn1_to_param; ++ EVP_CIPHER_param_to_asn1; ++ EVP_CIPHER_get_asn1_iv; ++ EVP_CIPHER_set_asn1_iv; ++ EVP_rc5_32_12_16_cbc; ++ EVP_rc5_32_12_16_cfb64; ++ EVP_rc5_32_12_16_ecb; ++ EVP_rc5_32_12_16_ofb; ++ asn1_add_error; ++ d2i_ASN1_BMPSTRING; ++ i2d_ASN1_BMPSTRING; ++ BIO_f_ber; ++ BN_init; ++ COMP_CTX_new; ++ COMP_CTX_free; ++ COMP_CTX_compress_block; ++ COMP_CTX_expand_block; ++ X509_STORE_CTX_get_ex_new_index; ++ OBJ_NAME_add; ++ BIO_socket_nbio; ++ EVP_rc2_64_cbc; ++ OBJ_NAME_cleanup; ++ OBJ_NAME_get; ++ OBJ_NAME_init; ++ OBJ_NAME_new_index; ++ OBJ_NAME_remove; ++ BN_MONT_CTX_copy; ++ BIO_new_socks4a_connect; ++ BIO_s_socks4a_connect; ++ PROXY_set_connect_mode; ++ RAND_SSLeay; ++ RAND_set_rand_method; ++ RSA_memory_lock; ++ bn_sub_words; ++ bn_mul_normal; ++ bn_mul_comba8; ++ bn_mul_comba4; ++ bn_sqr_normal; ++ bn_sqr_comba8; ++ bn_sqr_comba4; ++ bn_cmp_words; ++ bn_mul_recursive; ++ bn_mul_part_recursive; ++ bn_sqr_recursive; ++ bn_mul_low_normal; ++ BN_RECP_CTX_init; ++ BN_RECP_CTX_new; ++ BN_RECP_CTX_free; ++ BN_RECP_CTX_set; ++ BN_mod_mul_reciprocal; ++ BN_mod_exp_recp; ++ BN_div_recp; ++ BN_CTX_init; ++ BN_MONT_CTX_init; ++ RAND_get_rand_method; ++ PKCS7_add_attribute; ++ PKCS7_add_signed_attribute; ++ PKCS7_digest_from_attributes; ++ PKCS7_get_attribute; ++ PKCS7_get_issuer_and_serial; ++ PKCS7_get_signed_attribute; ++ COMP_compress_block; ++ COMP_expand_block; ++ COMP_rle; ++ COMP_zlib; ++ ms_time_diff; ++ ms_time_new; ++ ms_time_free; ++ ms_time_cmp; ++ ms_time_get; ++ PKCS7_set_attributes; ++ PKCS7_set_signed_attributes; ++ X509_ATTRIBUTE_create; ++ X509_ATTRIBUTE_dup; ++ ASN1_GENERALIZEDTIME_check; ++ ASN1_GENERALIZEDTIME_print; ++ ASN1_GENERALIZEDTIME_set; ++ ASN1_GENERALIZEDTIME_set_string; ++ ASN1_TIME_print; ++ BASIC_CONSTRAINTS_free; ++ BASIC_CONSTRAINTS_new; ++ ERR_load_X509V3_strings; ++ NETSCAPE_CERT_SEQUENCE_free; ++ NETSCAPE_CERT_SEQUENCE_new; ++ OBJ_txt2obj; ++ PEM_read_NETSCAPE_CERT_SEQUENCE; ++ PEM_read_NS_CERT_SEQ; ++ PEM_read_bio_NETSCAPE_CERT_SEQUENCE; ++ PEM_read_bio_NS_CERT_SEQ; ++ PEM_write_NETSCAPE_CERT_SEQUENCE; ++ PEM_write_NS_CERT_SEQ; ++ PEM_write_bio_NETSCAPE_CERT_SEQUENCE; ++ PEM_write_bio_NS_CERT_SEQ; ++ X509V3_EXT_add; ++ X509V3_EXT_add_alias; ++ X509V3_EXT_add_conf; ++ X509V3_EXT_cleanup; ++ X509V3_EXT_conf; ++ X509V3_EXT_conf_nid; ++ X509V3_EXT_get; ++ X509V3_EXT_get_nid; ++ X509V3_EXT_print; ++ X509V3_EXT_print_fp; ++ X509V3_add_standard_extensions; ++ X509V3_add_value; ++ X509V3_add_value_bool; ++ X509V3_add_value_int; ++ X509V3_conf_free; ++ X509V3_get_value_bool; ++ X509V3_get_value_int; ++ X509V3_parse_list; ++ d2i_ASN1_GENERALIZEDTIME; ++ d2i_ASN1_TIME; ++ d2i_BASIC_CONSTRAINTS; ++ d2i_NETSCAPE_CERT_SEQUENCE; ++ d2i_ext_ku; ++ ext_ku_free; ++ ext_ku_new; ++ i2d_ASN1_GENERALIZEDTIME; ++ i2d_ASN1_TIME; ++ i2d_BASIC_CONSTRAINTS; ++ i2d_NETSCAPE_CERT_SEQUENCE; ++ i2d_ext_ku; ++ EVP_MD_CTX_copy; ++ i2d_ASN1_ENUMERATED; ++ d2i_ASN1_ENUMERATED; ++ ASN1_ENUMERATED_set; ++ ASN1_ENUMERATED_get; ++ BN_to_ASN1_ENUMERATED; ++ ASN1_ENUMERATED_to_BN; ++ i2a_ASN1_ENUMERATED; ++ a2i_ASN1_ENUMERATED; ++ i2d_GENERAL_NAME; ++ d2i_GENERAL_NAME; ++ GENERAL_NAME_new; ++ GENERAL_NAME_free; ++ GENERAL_NAMES_new; ++ GENERAL_NAMES_free; ++ d2i_GENERAL_NAMES; ++ i2d_GENERAL_NAMES; ++ i2v_GENERAL_NAMES; ++ i2s_ASN1_OCTET_STRING; ++ s2i_ASN1_OCTET_STRING; ++ X509V3_EXT_check_conf; ++ hex_to_string; ++ string_to_hex; ++ DES_ede3_cbcm_encrypt; ++ RSA_padding_add_PKCS1_OAEP; ++ RSA_padding_check_PKCS1_OAEP; ++ X509_CRL_print_fp; ++ X509_CRL_print; ++ i2v_GENERAL_NAME; ++ v2i_GENERAL_NAME; ++ i2d_PKEY_USAGE_PERIOD; ++ d2i_PKEY_USAGE_PERIOD; ++ PKEY_USAGE_PERIOD_new; ++ PKEY_USAGE_PERIOD_free; ++ v2i_GENERAL_NAMES; ++ i2s_ASN1_INTEGER; ++ X509V3_EXT_d2i; ++ name_cmp; ++ str_dup; ++ i2s_ASN1_ENUMERATED; ++ i2s_ASN1_ENUMERATED_TABLE; ++ BIO_s_log; ++ BIO_f_reliable; ++ PKCS7_dataFinal; ++ PKCS7_dataDecode; ++ X509V3_EXT_CRL_add_conf; ++ BN_set_params; ++ BN_get_params; ++ BIO_get_ex_num; ++ BIO_set_ex_free_func; ++ EVP_ripemd160; ++ ASN1_TIME_set; ++ i2d_AUTHORITY_KEYID; ++ d2i_AUTHORITY_KEYID; ++ AUTHORITY_KEYID_new; ++ AUTHORITY_KEYID_free; ++ ASN1_seq_unpack; ++ ASN1_seq_pack; ++ ASN1_unpack_string; ++ ASN1_pack_string; ++ PKCS12_pack_safebag; ++ PKCS12_MAKE_KEYBAG; ++ PKCS8_encrypt; ++ PKCS12_MAKE_SHKEYBAG; ++ PKCS12_pack_p7data; ++ PKCS12_pack_p7encdata; ++ PKCS12_add_localkeyid; ++ PKCS12_add_friendlyname_asc; ++ PKCS12_add_friendlyname_uni; ++ PKCS12_get_friendlyname; ++ PKCS12_pbe_crypt; ++ PKCS12_decrypt_d2i; ++ PKCS12_i2d_encrypt; ++ PKCS12_init; ++ PKCS12_key_gen_asc; ++ PKCS12_key_gen_uni; ++ PKCS12_gen_mac; ++ PKCS12_verify_mac; ++ PKCS12_set_mac; ++ PKCS12_setup_mac; ++ OPENSSL_asc2uni; ++ OPENSSL_uni2asc; ++ i2d_PKCS12_BAGS; ++ PKCS12_BAGS_new; ++ d2i_PKCS12_BAGS; ++ PKCS12_BAGS_free; ++ i2d_PKCS12; ++ d2i_PKCS12; ++ PKCS12_new; ++ PKCS12_free; ++ i2d_PKCS12_MAC_DATA; ++ PKCS12_MAC_DATA_new; ++ d2i_PKCS12_MAC_DATA; ++ PKCS12_MAC_DATA_free; ++ i2d_PKCS12_SAFEBAG; ++ PKCS12_SAFEBAG_new; ++ d2i_PKCS12_SAFEBAG; ++ PKCS12_SAFEBAG_free; ++ ERR_load_PKCS12_strings; ++ PKCS12_PBE_add; ++ PKCS8_add_keyusage; ++ PKCS12_get_attr_gen; ++ PKCS12_parse; ++ PKCS12_create; ++ i2d_PKCS12_bio; ++ i2d_PKCS12_fp; ++ d2i_PKCS12_bio; ++ d2i_PKCS12_fp; ++ i2d_PBEPARAM; ++ PBEPARAM_new; ++ d2i_PBEPARAM; ++ PBEPARAM_free; ++ i2d_PKCS8_PRIV_KEY_INFO; ++ PKCS8_PRIV_KEY_INFO_new; ++ d2i_PKCS8_PRIV_KEY_INFO; ++ PKCS8_PRIV_KEY_INFO_free; ++ EVP_PKCS82PKEY; ++ EVP_PKEY2PKCS8; ++ PKCS8_set_broken; ++ EVP_PBE_ALGOR_CipherInit; ++ EVP_PBE_alg_add; ++ PKCS5_pbe_set; ++ EVP_PBE_cleanup; ++ i2d_SXNET; ++ d2i_SXNET; ++ SXNET_new; ++ SXNET_free; ++ i2d_SXNETID; ++ d2i_SXNETID; ++ SXNETID_new; ++ SXNETID_free; ++ DSA_SIG_new; ++ DSA_SIG_free; ++ DSA_do_sign; ++ DSA_do_verify; ++ d2i_DSA_SIG; ++ i2d_DSA_SIG; ++ i2d_ASN1_VISIBLESTRING; ++ d2i_ASN1_VISIBLESTRING; ++ i2d_ASN1_UTF8STRING; ++ d2i_ASN1_UTF8STRING; ++ i2d_DIRECTORYSTRING; ++ d2i_DIRECTORYSTRING; ++ i2d_DISPLAYTEXT; ++ d2i_DISPLAYTEXT; ++ d2i_ASN1_SET_OF_X509; ++ i2d_ASN1_SET_OF_X509; ++ i2d_PBKDF2PARAM; ++ PBKDF2PARAM_new; ++ d2i_PBKDF2PARAM; ++ PBKDF2PARAM_free; ++ i2d_PBE2PARAM; ++ PBE2PARAM_new; ++ d2i_PBE2PARAM; ++ PBE2PARAM_free; ++ d2i_ASN1_SET_OF_GENERAL_NAME; ++ i2d_ASN1_SET_OF_GENERAL_NAME; ++ d2i_ASN1_SET_OF_SXNETID; ++ i2d_ASN1_SET_OF_SXNETID; ++ d2i_ASN1_SET_OF_POLICYQUALINFO; ++ i2d_ASN1_SET_OF_POLICYQUALINFO; ++ d2i_ASN1_SET_OF_POLICYINFO; ++ i2d_ASN1_SET_OF_POLICYINFO; ++ SXNET_add_id_asc; ++ SXNET_add_id_ulong; ++ SXNET_add_id_INTEGER; ++ SXNET_get_id_asc; ++ SXNET_get_id_ulong; ++ SXNET_get_id_INTEGER; ++ X509V3_set_conf_lhash; ++ i2d_CERTIFICATEPOLICIES; ++ CERTIFICATEPOLICIES_new; ++ CERTIFICATEPOLICIES_free; ++ d2i_CERTIFICATEPOLICIES; ++ i2d_POLICYINFO; ++ POLICYINFO_new; ++ d2i_POLICYINFO; ++ POLICYINFO_free; ++ i2d_POLICYQUALINFO; ++ POLICYQUALINFO_new; ++ d2i_POLICYQUALINFO; ++ POLICYQUALINFO_free; ++ i2d_USERNOTICE; ++ USERNOTICE_new; ++ d2i_USERNOTICE; ++ USERNOTICE_free; ++ i2d_NOTICEREF; ++ NOTICEREF_new; ++ d2i_NOTICEREF; ++ NOTICEREF_free; ++ X509V3_get_string; ++ X509V3_get_section; ++ X509V3_string_free; ++ X509V3_section_free; ++ X509V3_set_ctx; ++ s2i_ASN1_INTEGER; ++ CRYPTO_set_locked_mem_functions; ++ CRYPTO_get_locked_mem_functions; ++ CRYPTO_malloc_locked; ++ CRYPTO_free_locked; ++ BN_mod_exp2_mont; ++ ERR_get_error_line_data; ++ ERR_peek_error_line_data; ++ PKCS12_PBE_keyivgen; ++ X509_ALGOR_dup; ++ d2i_ASN1_SET_OF_DIST_POINT; ++ i2d_ASN1_SET_OF_DIST_POINT; ++ i2d_CRL_DIST_POINTS; ++ CRL_DIST_POINTS_new; ++ CRL_DIST_POINTS_free; ++ d2i_CRL_DIST_POINTS; ++ i2d_DIST_POINT; ++ DIST_POINT_new; ++ d2i_DIST_POINT; ++ DIST_POINT_free; ++ i2d_DIST_POINT_NAME; ++ DIST_POINT_NAME_new; ++ DIST_POINT_NAME_free; ++ d2i_DIST_POINT_NAME; ++ X509V3_add_value_uchar; ++ d2i_ASN1_SET_OF_X509_ATTRIBUTE; ++ i2d_ASN1_SET_OF_ASN1_TYPE; ++ d2i_ASN1_SET_OF_X509_EXTENSION; ++ d2i_ASN1_SET_OF_X509_NAME_ENTRY; ++ d2i_ASN1_SET_OF_ASN1_TYPE; ++ i2d_ASN1_SET_OF_X509_ATTRIBUTE; ++ i2d_ASN1_SET_OF_X509_EXTENSION; ++ i2d_ASN1_SET_OF_X509_NAME_ENTRY; ++ X509V3_EXT_i2d; ++ X509V3_EXT_val_prn; ++ X509V3_EXT_add_list; ++ EVP_CIPHER_type; ++ EVP_PBE_CipherInit; ++ X509V3_add_value_bool_nf; ++ d2i_ASN1_UINTEGER; ++ sk_value; ++ sk_num; ++ sk_set; ++ i2d_ASN1_SET_OF_X509_REVOKED; ++ sk_sort; ++ d2i_ASN1_SET_OF_X509_REVOKED; ++ i2d_ASN1_SET_OF_X509_ALGOR; ++ i2d_ASN1_SET_OF_X509_CRL; ++ d2i_ASN1_SET_OF_X509_ALGOR; ++ d2i_ASN1_SET_OF_X509_CRL; ++ i2d_ASN1_SET_OF_PKCS7_SIGNER_INFO; ++ i2d_ASN1_SET_OF_PKCS7_RECIP_INFO; ++ d2i_ASN1_SET_OF_PKCS7_SIGNER_INFO; ++ d2i_ASN1_SET_OF_PKCS7_RECIP_INFO; ++ PKCS5_PBE_add; ++ PEM_write_bio_PKCS8; ++ i2d_PKCS8_fp; ++ PEM_read_bio_PKCS8_PRIV_KEY_INFO; ++ PEM_read_bio_P8_PRIV_KEY_INFO; ++ d2i_PKCS8_bio; ++ d2i_PKCS8_PRIV_KEY_INFO_fp; ++ PEM_write_bio_PKCS8_PRIV_KEY_INFO; ++ PEM_write_bio_P8_PRIV_KEY_INFO; ++ PEM_read_PKCS8; ++ d2i_PKCS8_PRIV_KEY_INFO_bio; ++ d2i_PKCS8_fp; ++ PEM_write_PKCS8; ++ PEM_read_PKCS8_PRIV_KEY_INFO; ++ PEM_read_P8_PRIV_KEY_INFO; ++ PEM_read_bio_PKCS8; ++ PEM_write_PKCS8_PRIV_KEY_INFO; ++ PEM_write_P8_PRIV_KEY_INFO; ++ PKCS5_PBE_keyivgen; ++ i2d_PKCS8_bio; ++ i2d_PKCS8_PRIV_KEY_INFO_fp; ++ i2d_PKCS8_PRIV_KEY_INFO_bio; ++ BIO_s_bio; ++ PKCS5_pbe2_set; ++ PKCS5_PBKDF2_HMAC_SHA1; ++ PKCS5_v2_PBE_keyivgen; ++ PEM_write_bio_PKCS8PrivateKey; ++ PEM_write_PKCS8PrivateKey; ++ BIO_ctrl_get_read_request; ++ BIO_ctrl_pending; ++ BIO_ctrl_wpending; ++ BIO_new_bio_pair; ++ BIO_ctrl_get_write_guarantee; ++ CRYPTO_num_locks; ++ CONF_load_bio; ++ CONF_load_fp; ++ i2d_ASN1_SET_OF_ASN1_OBJECT; ++ d2i_ASN1_SET_OF_ASN1_OBJECT; ++ PKCS7_signatureVerify; ++ RSA_set_method; ++ RSA_get_method; ++ RSA_get_default_method; ++ RSA_check_key; ++ OBJ_obj2txt; ++ DSA_dup_DH; ++ X509_REQ_get_extensions; ++ X509_REQ_set_extension_nids; ++ BIO_nwrite; ++ X509_REQ_extension_nid; ++ BIO_nread; ++ X509_REQ_get_extension_nids; ++ BIO_nwrite0; ++ X509_REQ_add_extensions_nid; ++ BIO_nread0; ++ X509_REQ_add_extensions; ++ BIO_new_mem_buf; ++ DH_set_ex_data; ++ DH_set_method; ++ DSA_OpenSSL; ++ DH_get_ex_data; ++ DH_get_ex_new_index; ++ DSA_new_method; ++ DH_new_method; ++ DH_OpenSSL; ++ DSA_get_ex_new_index; ++ DH_get_default_method; ++ DSA_set_ex_data; ++ DH_set_default_method; ++ DSA_get_ex_data; ++ X509V3_EXT_REQ_add_conf; ++ NETSCAPE_SPKI_print; ++ NETSCAPE_SPKI_set_pubkey; ++ NETSCAPE_SPKI_b64_encode; ++ NETSCAPE_SPKI_get_pubkey; ++ NETSCAPE_SPKI_b64_decode; ++ UTF8_putc; ++ UTF8_getc; ++ RSA_null_method; ++ ASN1_tag2str; ++ BIO_ctrl_reset_read_request; ++ DISPLAYTEXT_new; ++ ASN1_GENERALIZEDTIME_free; ++ X509_REVOKED_get_ext_d2i; ++ X509_set_ex_data; ++ X509_reject_set_bit_asc; ++ X509_NAME_add_entry_by_txt; ++ X509_NAME_add_entry_by_NID; ++ X509_PURPOSE_get0; ++ PEM_read_X509_AUX; ++ d2i_AUTHORITY_INFO_ACCESS; ++ PEM_write_PUBKEY; ++ ACCESS_DESCRIPTION_new; ++ X509_CERT_AUX_free; ++ d2i_ACCESS_DESCRIPTION; ++ X509_trust_clear; ++ X509_TRUST_add; ++ ASN1_VISIBLESTRING_new; ++ X509_alias_set1; ++ ASN1_PRINTABLESTRING_free; ++ EVP_PKEY_get1_DSA; ++ ASN1_BMPSTRING_new; ++ ASN1_mbstring_copy; ++ ASN1_UTF8STRING_new; ++ DSA_get_default_method; ++ i2d_ASN1_SET_OF_ACCESS_DESCRIPTION; ++ ASN1_T61STRING_free; ++ DSA_set_method; ++ X509_get_ex_data; ++ ASN1_STRING_type; ++ X509_PURPOSE_get_by_sname; ++ ASN1_TIME_free; ++ ASN1_OCTET_STRING_cmp; ++ ASN1_BIT_STRING_new; ++ X509_get_ext_d2i; ++ PEM_read_bio_X509_AUX; ++ ASN1_STRING_set_default_mask_asc; ++ ASN1_STRING_set_def_mask_asc; ++ PEM_write_bio_RSA_PUBKEY; ++ ASN1_INTEGER_cmp; ++ d2i_RSA_PUBKEY_fp; ++ X509_trust_set_bit_asc; ++ PEM_write_bio_DSA_PUBKEY; ++ X509_STORE_CTX_free; ++ EVP_PKEY_set1_DSA; ++ i2d_DSA_PUBKEY_fp; ++ X509_load_cert_crl_file; ++ ASN1_TIME_new; ++ i2d_RSA_PUBKEY; ++ X509_STORE_CTX_purpose_inherit; ++ PEM_read_RSA_PUBKEY; ++ d2i_X509_AUX; ++ i2d_DSA_PUBKEY; ++ X509_CERT_AUX_print; ++ PEM_read_DSA_PUBKEY; ++ i2d_RSA_PUBKEY_bio; ++ ASN1_BIT_STRING_num_asc; ++ i2d_PUBKEY; ++ ASN1_UTCTIME_free; ++ DSA_set_default_method; ++ X509_PURPOSE_get_by_id; ++ ACCESS_DESCRIPTION_free; ++ PEM_read_bio_PUBKEY; ++ ASN1_STRING_set_by_NID; ++ X509_PURPOSE_get_id; ++ DISPLAYTEXT_free; ++ OTHERNAME_new; ++ X509_CERT_AUX_new; ++ X509_TRUST_cleanup; ++ X509_NAME_add_entry_by_OBJ; ++ X509_CRL_get_ext_d2i; ++ X509_PURPOSE_get0_name; ++ PEM_read_PUBKEY; ++ i2d_DSA_PUBKEY_bio; ++ i2d_OTHERNAME; ++ ASN1_OCTET_STRING_free; ++ ASN1_BIT_STRING_set_asc; ++ X509_get_ex_new_index; ++ ASN1_STRING_TABLE_cleanup; ++ X509_TRUST_get_by_id; ++ X509_PURPOSE_get_trust; ++ ASN1_STRING_length; ++ d2i_ASN1_SET_OF_ACCESS_DESCRIPTION; ++ ASN1_PRINTABLESTRING_new; ++ X509V3_get_d2i; ++ ASN1_ENUMERATED_free; ++ i2d_X509_CERT_AUX; ++ X509_STORE_CTX_set_trust; ++ ASN1_STRING_set_default_mask; ++ X509_STORE_CTX_new; ++ EVP_PKEY_get1_RSA; ++ DIRECTORYSTRING_free; ++ PEM_write_X509_AUX; ++ ASN1_OCTET_STRING_set; ++ d2i_DSA_PUBKEY_fp; ++ d2i_RSA_PUBKEY; ++ X509_TRUST_get0_name; ++ X509_TRUST_get0; ++ AUTHORITY_INFO_ACCESS_free; ++ ASN1_IA5STRING_new; ++ d2i_DSA_PUBKEY; ++ X509_check_purpose; ++ ASN1_ENUMERATED_new; ++ d2i_RSA_PUBKEY_bio; ++ d2i_PUBKEY; ++ X509_TRUST_get_trust; ++ X509_TRUST_get_flags; ++ ASN1_BMPSTRING_free; ++ ASN1_T61STRING_new; ++ ASN1_UTCTIME_new; ++ i2d_AUTHORITY_INFO_ACCESS; ++ EVP_PKEY_set1_RSA; ++ X509_STORE_CTX_set_purpose; ++ ASN1_IA5STRING_free; ++ PEM_write_bio_X509_AUX; ++ X509_PURPOSE_get_count; ++ CRYPTO_add_info; ++ X509_NAME_ENTRY_create_by_txt; ++ ASN1_STRING_get_default_mask; ++ X509_alias_get0; ++ ASN1_STRING_data; ++ i2d_ACCESS_DESCRIPTION; ++ X509_trust_set_bit; ++ ASN1_BIT_STRING_free; ++ PEM_read_bio_RSA_PUBKEY; ++ X509_add1_reject_object; ++ X509_check_trust; ++ PEM_read_bio_DSA_PUBKEY; ++ X509_PURPOSE_add; ++ ASN1_STRING_TABLE_get; ++ ASN1_UTF8STRING_free; ++ d2i_DSA_PUBKEY_bio; ++ PEM_write_RSA_PUBKEY; ++ d2i_OTHERNAME; ++ X509_reject_set_bit; ++ PEM_write_DSA_PUBKEY; ++ X509_PURPOSE_get0_sname; ++ EVP_PKEY_set1_DH; ++ ASN1_OCTET_STRING_dup; ++ ASN1_BIT_STRING_set; ++ X509_TRUST_get_count; ++ ASN1_INTEGER_free; ++ OTHERNAME_free; ++ i2d_RSA_PUBKEY_fp; ++ ASN1_INTEGER_dup; ++ d2i_X509_CERT_AUX; ++ PEM_write_bio_PUBKEY; ++ ASN1_VISIBLESTRING_free; ++ X509_PURPOSE_cleanup; ++ ASN1_mbstring_ncopy; ++ ASN1_GENERALIZEDTIME_new; ++ EVP_PKEY_get1_DH; ++ ASN1_OCTET_STRING_new; ++ ASN1_INTEGER_new; ++ i2d_X509_AUX; ++ ASN1_BIT_STRING_name_print; ++ X509_cmp; ++ ASN1_STRING_length_set; ++ DIRECTORYSTRING_new; ++ X509_add1_trust_object; ++ PKCS12_newpass; ++ SMIME_write_PKCS7; ++ SMIME_read_PKCS7; ++ DES_set_key_checked; ++ PKCS7_verify; ++ PKCS7_encrypt; ++ DES_set_key_unchecked; ++ SMIME_crlf_copy; ++ i2d_ASN1_PRINTABLESTRING; ++ PKCS7_get0_signers; ++ PKCS7_decrypt; ++ SMIME_text; ++ PKCS7_simple_smimecap; ++ PKCS7_get_smimecap; ++ PKCS7_sign; ++ PKCS7_add_attrib_smimecap; ++ CRYPTO_dbg_set_options; ++ CRYPTO_remove_all_info; ++ CRYPTO_get_mem_debug_functions; ++ CRYPTO_is_mem_check_on; ++ CRYPTO_set_mem_debug_functions; ++ CRYPTO_pop_info; ++ CRYPTO_push_info_; ++ CRYPTO_set_mem_debug_options; ++ PEM_write_PKCS8PrivateKey_nid; ++ PEM_write_bio_PKCS8PrivateKey_nid; ++ PEM_write_bio_PKCS8PrivKey_nid; ++ d2i_PKCS8PrivateKey_bio; ++ ASN1_NULL_free; ++ d2i_ASN1_NULL; ++ ASN1_NULL_new; ++ i2d_PKCS8PrivateKey_bio; ++ i2d_PKCS8PrivateKey_fp; ++ i2d_ASN1_NULL; ++ i2d_PKCS8PrivateKey_nid_fp; ++ d2i_PKCS8PrivateKey_fp; ++ i2d_PKCS8PrivateKey_nid_bio; ++ i2d_PKCS8PrivateKeyInfo_fp; ++ i2d_PKCS8PrivateKeyInfo_bio; ++ PEM_cb; ++ i2d_PrivateKey_fp; ++ d2i_PrivateKey_bio; ++ d2i_PrivateKey_fp; ++ i2d_PrivateKey_bio; ++ X509_reject_clear; ++ X509_TRUST_set_default; ++ d2i_AutoPrivateKey; ++ X509_ATTRIBUTE_get0_type; ++ X509_ATTRIBUTE_set1_data; ++ X509at_get_attr; ++ X509at_get_attr_count; ++ X509_ATTRIBUTE_create_by_NID; ++ X509_ATTRIBUTE_set1_object; ++ X509_ATTRIBUTE_count; ++ X509_ATTRIBUTE_create_by_OBJ; ++ X509_ATTRIBUTE_get0_object; ++ X509at_get_attr_by_NID; ++ X509at_add1_attr; ++ X509_ATTRIBUTE_get0_data; ++ X509at_delete_attr; ++ X509at_get_attr_by_OBJ; ++ RAND_add; ++ BIO_number_written; ++ BIO_number_read; ++ X509_STORE_CTX_get1_chain; ++ ERR_load_RAND_strings; ++ RAND_pseudo_bytes; ++ X509_REQ_get_attr_by_NID; ++ X509_REQ_get_attr; ++ X509_REQ_add1_attr_by_NID; ++ X509_REQ_get_attr_by_OBJ; ++ X509at_add1_attr_by_NID; ++ X509_REQ_add1_attr_by_OBJ; ++ X509_REQ_get_attr_count; ++ X509_REQ_add1_attr; ++ X509_REQ_delete_attr; ++ X509at_add1_attr_by_OBJ; ++ X509_REQ_add1_attr_by_txt; ++ X509_ATTRIBUTE_create_by_txt; ++ X509at_add1_attr_by_txt; ++ BN_pseudo_rand; ++ BN_is_prime_fasttest; ++ BN_CTX_end; ++ BN_CTX_start; ++ BN_CTX_get; ++ EVP_PKEY2PKCS8_broken; ++ ASN1_STRING_TABLE_add; ++ CRYPTO_dbg_get_options; ++ AUTHORITY_INFO_ACCESS_new; ++ CRYPTO_get_mem_debug_options; ++ DES_crypt; ++ PEM_write_bio_X509_REQ_NEW; ++ PEM_write_X509_REQ_NEW; ++ BIO_callback_ctrl; ++ RAND_egd; ++ RAND_status; ++ bn_dump1; ++ DES_check_key_parity; ++ lh_num_items; ++ RAND_event; ++ DSO_new; ++ DSO_new_method; ++ DSO_free; ++ DSO_flags; ++ DSO_up; ++ DSO_set_default_method; ++ DSO_get_default_method; ++ DSO_get_method; ++ DSO_set_method; ++ DSO_load; ++ DSO_bind_var; ++ DSO_METHOD_null; ++ DSO_METHOD_openssl; ++ DSO_METHOD_dlfcn; ++ DSO_METHOD_win32; ++ ERR_load_DSO_strings; ++ DSO_METHOD_dl; ++ NCONF_load; ++ NCONF_load_fp; ++ NCONF_new; ++ NCONF_get_string; ++ NCONF_free; ++ NCONF_get_number; ++ CONF_dump_fp; ++ NCONF_load_bio; ++ NCONF_dump_fp; ++ NCONF_get_section; ++ NCONF_dump_bio; ++ CONF_dump_bio; ++ NCONF_free_data; ++ CONF_set_default_method; ++ ERR_error_string_n; ++ BIO_snprintf; ++ DSO_ctrl; ++ i2d_ASN1_SET_OF_ASN1_INTEGER; ++ i2d_ASN1_SET_OF_PKCS12_SAFEBAG; ++ i2d_ASN1_SET_OF_PKCS7; ++ BIO_vfree; ++ d2i_ASN1_SET_OF_ASN1_INTEGER; ++ d2i_ASN1_SET_OF_PKCS12_SAFEBAG; ++ ASN1_UTCTIME_get; ++ X509_REQ_digest; ++ X509_CRL_digest; ++ d2i_ASN1_SET_OF_PKCS7; ++ EVP_CIPHER_CTX_set_key_length; ++ EVP_CIPHER_CTX_ctrl; ++ BN_mod_exp_mont_word; ++ RAND_egd_bytes; ++ X509_REQ_get1_email; ++ X509_get1_email; ++ X509_email_free; ++ i2d_RSA_NET; ++ d2i_RSA_NET_2; ++ d2i_RSA_NET; ++ DSO_bind_func; ++ CRYPTO_get_new_dynlockid; ++ sk_new_null; ++ CRYPTO_set_dynlock_destroy_callback; ++ CRYPTO_set_dynlock_destroy_cb; ++ CRYPTO_destroy_dynlockid; ++ CRYPTO_set_dynlock_size; ++ CRYPTO_set_dynlock_create_callback; ++ CRYPTO_set_dynlock_create_cb; ++ CRYPTO_set_dynlock_lock_callback; ++ CRYPTO_set_dynlock_lock_cb; ++ CRYPTO_get_dynlock_lock_callback; ++ CRYPTO_get_dynlock_lock_cb; ++ CRYPTO_get_dynlock_destroy_callback; ++ CRYPTO_get_dynlock_destroy_cb; ++ CRYPTO_get_dynlock_value; ++ CRYPTO_get_dynlock_create_callback; ++ CRYPTO_get_dynlock_create_cb; ++ c2i_ASN1_BIT_STRING; ++ i2c_ASN1_BIT_STRING; ++ RAND_poll; ++ c2i_ASN1_INTEGER; ++ i2c_ASN1_INTEGER; ++ BIO_dump_indent; ++ ASN1_parse_dump; ++ c2i_ASN1_OBJECT; ++ X509_NAME_print_ex_fp; ++ ASN1_STRING_print_ex_fp; ++ X509_NAME_print_ex; ++ ASN1_STRING_print_ex; ++ MD4; ++ MD4_Transform; ++ MD4_Final; ++ MD4_Update; ++ MD4_Init; ++ EVP_md4; ++ i2d_PUBKEY_bio; ++ i2d_PUBKEY_fp; ++ d2i_PUBKEY_bio; ++ ASN1_STRING_to_UTF8; ++ BIO_vprintf; ++ BIO_vsnprintf; ++ d2i_PUBKEY_fp; ++ X509_cmp_time; ++ X509_STORE_CTX_set_time; ++ X509_STORE_CTX_get1_issuer; ++ X509_OBJECT_retrieve_match; ++ X509_OBJECT_idx_by_subject; ++ X509_STORE_CTX_set_flags; ++ X509_STORE_CTX_trusted_stack; ++ X509_time_adj; ++ X509_check_issued; ++ ASN1_UTCTIME_cmp_time_t; ++ DES_set_weak_key_flag; ++ DES_check_key; ++ DES_rw_mode; ++ RSA_PKCS1_RSAref; ++ X509_keyid_set1; ++ BIO_next; ++ DSO_METHOD_vms; ++ BIO_f_linebuffer; ++ BN_bntest_rand; ++ OPENSSL_issetugid; ++ BN_rand_range; ++ ERR_load_ENGINE_strings; ++ ENGINE_set_DSA; ++ ENGINE_get_finish_function; ++ ENGINE_get_default_RSA; ++ ENGINE_get_BN_mod_exp; ++ DSA_get_default_openssl_method; ++ ENGINE_set_DH; ++ ENGINE_set_def_BN_mod_exp_crt; ++ ENGINE_set_default_BN_mod_exp_crt; ++ ENGINE_init; ++ DH_get_default_openssl_method; ++ RSA_set_default_openssl_method; ++ ENGINE_finish; ++ ENGINE_load_public_key; ++ ENGINE_get_DH; ++ ENGINE_ctrl; ++ ENGINE_get_init_function; ++ ENGINE_set_init_function; ++ ENGINE_set_default_DSA; ++ ENGINE_get_name; ++ ENGINE_get_last; ++ ENGINE_get_prev; ++ ENGINE_get_default_DH; ++ ENGINE_get_RSA; ++ ENGINE_set_default; ++ ENGINE_get_RAND; ++ ENGINE_get_first; ++ ENGINE_by_id; ++ ENGINE_set_finish_function; ++ ENGINE_get_def_BN_mod_exp_crt; ++ ENGINE_get_default_BN_mod_exp_crt; ++ RSA_get_default_openssl_method; ++ ENGINE_set_RSA; ++ ENGINE_load_private_key; ++ ENGINE_set_default_RAND; ++ ENGINE_set_BN_mod_exp; ++ ENGINE_remove; ++ ENGINE_free; ++ ENGINE_get_BN_mod_exp_crt; ++ ENGINE_get_next; ++ ENGINE_set_name; ++ ENGINE_get_default_DSA; ++ ENGINE_set_default_BN_mod_exp; ++ ENGINE_set_default_RSA; ++ ENGINE_get_default_RAND; ++ ENGINE_get_default_BN_mod_exp; ++ ENGINE_set_RAND; ++ ENGINE_set_id; ++ ENGINE_set_BN_mod_exp_crt; ++ ENGINE_set_default_DH; ++ ENGINE_new; ++ ENGINE_get_id; ++ DSA_set_default_openssl_method; ++ ENGINE_add; ++ DH_set_default_openssl_method; ++ ENGINE_get_DSA; ++ ENGINE_get_ctrl_function; ++ ENGINE_set_ctrl_function; ++ BN_pseudo_rand_range; ++ X509_STORE_CTX_set_verify_cb; ++ ERR_load_COMP_strings; ++ PKCS12_item_decrypt_d2i; ++ ASN1_UTF8STRING_it; ++ ENGINE_unregister_ciphers; ++ ENGINE_get_ciphers; ++ d2i_OCSP_BASICRESP; ++ KRB5_CHECKSUM_it; ++ EC_POINT_add; ++ ASN1_item_ex_i2d; ++ OCSP_CERTID_it; ++ d2i_OCSP_RESPBYTES; ++ X509V3_add1_i2d; ++ PKCS7_ENVELOPE_it; ++ UI_add_input_boolean; ++ ENGINE_unregister_RSA; ++ X509V3_EXT_nconf; ++ ASN1_GENERALSTRING_free; ++ d2i_OCSP_CERTSTATUS; ++ X509_REVOKED_set_serialNumber; ++ X509_print_ex; ++ OCSP_ONEREQ_get1_ext_d2i; ++ ENGINE_register_all_RAND; ++ ENGINE_load_dynamic; ++ PBKDF2PARAM_it; ++ EXTENDED_KEY_USAGE_new; ++ EC_GROUP_clear_free; ++ OCSP_sendreq_bio; ++ ASN1_item_digest; ++ OCSP_BASICRESP_delete_ext; ++ OCSP_SIGNATURE_it; ++ X509_CRL_it; ++ OCSP_BASICRESP_add_ext; ++ KRB5_ENCKEY_it; ++ UI_method_set_closer; ++ X509_STORE_set_purpose; ++ i2d_ASN1_GENERALSTRING; ++ OCSP_response_status; ++ i2d_OCSP_SERVICELOC; ++ ENGINE_get_digest_engine; ++ EC_GROUP_set_curve_GFp; ++ OCSP_REQUEST_get_ext_by_OBJ; ++ _ossl_old_des_random_key; ++ ASN1_T61STRING_it; ++ EC_GROUP_method_of; ++ i2d_KRB5_APREQ; ++ _ossl_old_des_encrypt; ++ ASN1_PRINTABLE_new; ++ HMAC_Init_ex; ++ d2i_KRB5_AUTHENT; ++ OCSP_archive_cutoff_new; ++ EC_POINT_set_Jprojective_coordinates_GFp; ++ EC_POINT_set_Jproj_coords_GFp; ++ _ossl_old_des_is_weak_key; ++ OCSP_BASICRESP_get_ext_by_OBJ; ++ EC_POINT_oct2point; ++ OCSP_SINGLERESP_get_ext_count; ++ UI_ctrl; ++ _shadow_DES_rw_mode; ++ asn1_do_adb; ++ ASN1_template_i2d; ++ ENGINE_register_DH; ++ UI_construct_prompt; ++ X509_STORE_set_trust; ++ UI_dup_input_string; ++ d2i_KRB5_APREQ; ++ EVP_MD_CTX_copy_ex; ++ OCSP_request_is_signed; ++ i2d_OCSP_REQINFO; ++ KRB5_ENCKEY_free; ++ OCSP_resp_get0; ++ GENERAL_NAME_it; ++ ASN1_GENERALIZEDTIME_it; ++ X509_STORE_set_flags; ++ EC_POINT_set_compressed_coordinates_GFp; ++ EC_POINT_set_compr_coords_GFp; ++ OCSP_response_status_str; ++ d2i_OCSP_REVOKEDINFO; ++ OCSP_basic_add1_cert; ++ ERR_get_implementation; ++ EVP_CipherFinal_ex; ++ OCSP_CERTSTATUS_new; ++ CRYPTO_cleanup_all_ex_data; ++ OCSP_resp_find; ++ BN_nnmod; ++ X509_CRL_sort; ++ X509_REVOKED_set_revocationDate; ++ ENGINE_register_RAND; ++ OCSP_SERVICELOC_new; ++ EC_POINT_set_affine_coordinates_GFp; ++ EC_POINT_set_affine_coords_GFp; ++ _ossl_old_des_options; ++ SXNET_it; ++ UI_dup_input_boolean; ++ PKCS12_add_CSPName_asc; ++ EC_POINT_is_at_infinity; ++ ENGINE_load_cryptodev; ++ DSO_convert_filename; ++ POLICYQUALINFO_it; ++ ENGINE_register_ciphers; ++ BN_mod_lshift_quick; ++ DSO_set_filename; ++ ASN1_item_free; ++ KRB5_TKTBODY_free; ++ AUTHORITY_KEYID_it; ++ KRB5_APREQBODY_new; ++ X509V3_EXT_REQ_add_nconf; ++ ENGINE_ctrl_cmd_string; ++ i2d_OCSP_RESPDATA; ++ EVP_MD_CTX_init; ++ EXTENDED_KEY_USAGE_free; ++ PKCS7_ATTR_SIGN_it; ++ UI_add_error_string; ++ KRB5_CHECKSUM_free; ++ OCSP_REQUEST_get_ext; ++ ENGINE_load_ubsec; ++ ENGINE_register_all_digests; ++ PKEY_USAGE_PERIOD_it; ++ PKCS12_unpack_authsafes; ++ ASN1_item_unpack; ++ NETSCAPE_SPKAC_it; ++ X509_REVOKED_it; ++ ASN1_STRING_encode; ++ EVP_aes_128_ecb; ++ KRB5_AUTHENT_free; ++ OCSP_BASICRESP_get_ext_by_critical; ++ OCSP_BASICRESP_get_ext_by_crit; ++ OCSP_cert_status_str; ++ d2i_OCSP_REQUEST; ++ UI_dup_info_string; ++ _ossl_old_des_xwhite_in2out; ++ PKCS12_it; ++ OCSP_SINGLERESP_get_ext_by_critical; ++ OCSP_SINGLERESP_get_ext_by_crit; ++ OCSP_CERTSTATUS_free; ++ _ossl_old_des_crypt; ++ ASN1_item_i2d; ++ EVP_DecryptFinal_ex; ++ ENGINE_load_openssl; ++ ENGINE_get_cmd_defns; ++ ENGINE_set_load_privkey_function; ++ ENGINE_set_load_privkey_fn; ++ EVP_EncryptFinal_ex; ++ ENGINE_set_default_digests; ++ X509_get0_pubkey_bitstr; ++ asn1_ex_i2c; ++ ENGINE_register_RSA; ++ ENGINE_unregister_DSA; ++ _ossl_old_des_key_sched; ++ X509_EXTENSION_it; ++ i2d_KRB5_AUTHENT; ++ SXNETID_it; ++ d2i_OCSP_SINGLERESP; ++ EDIPARTYNAME_new; ++ PKCS12_certbag2x509; ++ _ossl_old_des_ofb64_encrypt; ++ d2i_EXTENDED_KEY_USAGE; ++ ERR_print_errors_cb; ++ ENGINE_set_ciphers; ++ d2i_KRB5_APREQBODY; ++ UI_method_get_flusher; ++ X509_PUBKEY_it; ++ _ossl_old_des_enc_read; ++ PKCS7_ENCRYPT_it; ++ i2d_OCSP_RESPONSE; ++ EC_GROUP_get_cofactor; ++ PKCS12_unpack_p7data; ++ d2i_KRB5_AUTHDATA; ++ OCSP_copy_nonce; ++ KRB5_AUTHDATA_new; ++ OCSP_RESPDATA_new; ++ EC_GFp_mont_method; ++ OCSP_REVOKEDINFO_free; ++ UI_get_ex_data; ++ KRB5_APREQBODY_free; ++ EC_GROUP_get0_generator; ++ UI_get_default_method; ++ X509V3_set_nconf; ++ PKCS12_item_i2d_encrypt; ++ X509_add1_ext_i2d; ++ PKCS7_SIGNER_INFO_it; ++ KRB5_PRINCNAME_new; ++ PKCS12_SAFEBAG_it; ++ EC_GROUP_get_order; ++ d2i_OCSP_RESPID; ++ OCSP_request_verify; ++ NCONF_get_number_e; ++ _ossl_old_des_decrypt3; ++ X509_signature_print; ++ OCSP_SINGLERESP_free; ++ ENGINE_load_builtin_engines; ++ i2d_OCSP_ONEREQ; ++ OCSP_REQUEST_add_ext; ++ OCSP_RESPBYTES_new; ++ EVP_MD_CTX_create; ++ OCSP_resp_find_status; ++ X509_ALGOR_it; ++ ASN1_TIME_it; ++ OCSP_request_set1_name; ++ OCSP_ONEREQ_get_ext_count; ++ UI_get0_result; ++ PKCS12_AUTHSAFES_it; ++ EVP_aes_256_ecb; ++ PKCS12_pack_authsafes; ++ ASN1_IA5STRING_it; ++ UI_get_input_flags; ++ EC_GROUP_set_generator; ++ _ossl_old_des_string_to_2keys; ++ OCSP_CERTID_free; ++ X509_CERT_AUX_it; ++ CERTIFICATEPOLICIES_it; ++ _ossl_old_des_ede3_cbc_encrypt; ++ RAND_set_rand_engine; ++ DSO_get_loaded_filename; ++ X509_ATTRIBUTE_it; ++ OCSP_ONEREQ_get_ext_by_NID; ++ PKCS12_decrypt_skey; ++ KRB5_AUTHENT_it; ++ UI_dup_error_string; ++ RSAPublicKey_it; ++ i2d_OCSP_REQUEST; ++ PKCS12_x509crl2certbag; ++ OCSP_SERVICELOC_it; ++ ASN1_item_sign; ++ X509_CRL_set_issuer_name; ++ OBJ_NAME_do_all_sorted; ++ i2d_OCSP_BASICRESP; ++ i2d_OCSP_RESPBYTES; ++ PKCS12_unpack_p7encdata; ++ HMAC_CTX_init; ++ ENGINE_get_digest; ++ OCSP_RESPONSE_print; ++ KRB5_TKTBODY_it; ++ ACCESS_DESCRIPTION_it; ++ PKCS7_ISSUER_AND_SERIAL_it; ++ PBE2PARAM_it; ++ PKCS12_certbag2x509crl; ++ PKCS7_SIGNED_it; ++ ENGINE_get_cipher; ++ i2d_OCSP_CRLID; ++ OCSP_SINGLERESP_new; ++ ENGINE_cmd_is_executable; ++ RSA_up_ref; ++ ASN1_GENERALSTRING_it; ++ ENGINE_register_DSA; ++ X509V3_EXT_add_nconf_sk; ++ ENGINE_set_load_pubkey_function; ++ PKCS8_decrypt; ++ PEM_bytes_read_bio; ++ DIRECTORYSTRING_it; ++ d2i_OCSP_CRLID; ++ EC_POINT_is_on_curve; ++ CRYPTO_set_locked_mem_ex_functions; ++ CRYPTO_set_locked_mem_ex_funcs; ++ d2i_KRB5_CHECKSUM; ++ ASN1_item_dup; ++ X509_it; ++ BN_mod_add; ++ KRB5_AUTHDATA_free; ++ _ossl_old_des_cbc_cksum; ++ ASN1_item_verify; ++ CRYPTO_set_mem_ex_functions; ++ EC_POINT_get_Jprojective_coordinates_GFp; ++ EC_POINT_get_Jproj_coords_GFp; ++ ZLONG_it; ++ CRYPTO_get_locked_mem_ex_functions; ++ CRYPTO_get_locked_mem_ex_funcs; ++ ASN1_TIME_check; ++ UI_get0_user_data; ++ HMAC_CTX_cleanup; ++ DSA_up_ref; ++ _ossl_old_des_ede3_cfb64_encrypt; ++ _ossl_odes_ede3_cfb64_encrypt; ++ ASN1_BMPSTRING_it; ++ ASN1_tag2bit; ++ UI_method_set_flusher; ++ X509_ocspid_print; ++ KRB5_ENCDATA_it; ++ ENGINE_get_load_pubkey_function; ++ UI_add_user_data; ++ OCSP_REQUEST_delete_ext; ++ UI_get_method; ++ OCSP_ONEREQ_free; ++ ASN1_PRINTABLESTRING_it; ++ X509_CRL_set_nextUpdate; ++ OCSP_REQUEST_it; ++ OCSP_BASICRESP_it; ++ AES_ecb_encrypt; ++ BN_mod_sqr; ++ NETSCAPE_CERT_SEQUENCE_it; ++ GENERAL_NAMES_it; ++ AUTHORITY_INFO_ACCESS_it; ++ ASN1_FBOOLEAN_it; ++ UI_set_ex_data; ++ _ossl_old_des_string_to_key; ++ ENGINE_register_all_RSA; ++ d2i_KRB5_PRINCNAME; ++ OCSP_RESPBYTES_it; ++ X509_CINF_it; ++ ENGINE_unregister_digests; ++ d2i_EDIPARTYNAME; ++ d2i_OCSP_SERVICELOC; ++ ENGINE_get_digests; ++ _ossl_old_des_set_odd_parity; ++ OCSP_RESPDATA_free; ++ d2i_KRB5_TICKET; ++ OTHERNAME_it; ++ EVP_MD_CTX_cleanup; ++ d2i_ASN1_GENERALSTRING; ++ X509_CRL_set_version; ++ BN_mod_sub; ++ OCSP_SINGLERESP_get_ext_by_NID; ++ ENGINE_get_ex_new_index; ++ OCSP_REQUEST_free; ++ OCSP_REQUEST_add1_ext_i2d; ++ X509_VAL_it; ++ EC_POINTs_make_affine; ++ EC_POINT_mul; ++ X509V3_EXT_add_nconf; ++ X509_TRUST_set; ++ X509_CRL_add1_ext_i2d; ++ _ossl_old_des_fcrypt; ++ DISPLAYTEXT_it; ++ X509_CRL_set_lastUpdate; ++ OCSP_BASICRESP_free; ++ OCSP_BASICRESP_add1_ext_i2d; ++ d2i_KRB5_AUTHENTBODY; ++ CRYPTO_set_ex_data_implementation; ++ CRYPTO_set_ex_data_impl; ++ KRB5_ENCDATA_new; ++ DSO_up_ref; ++ OCSP_crl_reason_str; ++ UI_get0_result_string; ++ ASN1_GENERALSTRING_new; ++ X509_SIG_it; ++ ERR_set_implementation; ++ ERR_load_EC_strings; ++ UI_get0_action_string; ++ OCSP_ONEREQ_get_ext; ++ EC_POINT_method_of; ++ i2d_KRB5_APREQBODY; ++ _ossl_old_des_ecb3_encrypt; ++ CRYPTO_get_mem_ex_functions; ++ ENGINE_get_ex_data; ++ UI_destroy_method; ++ ASN1_item_i2d_bio; ++ OCSP_ONEREQ_get_ext_by_OBJ; ++ ASN1_primitive_new; ++ ASN1_PRINTABLE_it; ++ EVP_aes_192_ecb; ++ OCSP_SIGNATURE_new; ++ LONG_it; ++ ASN1_VISIBLESTRING_it; ++ OCSP_SINGLERESP_add1_ext_i2d; ++ d2i_OCSP_CERTID; ++ ASN1_item_d2i_fp; ++ CRL_DIST_POINTS_it; ++ GENERAL_NAME_print; ++ OCSP_SINGLERESP_delete_ext; ++ PKCS12_SAFEBAGS_it; ++ d2i_OCSP_SIGNATURE; ++ OCSP_request_add1_nonce; ++ ENGINE_set_cmd_defns; ++ OCSP_SERVICELOC_free; ++ EC_GROUP_free; ++ ASN1_BIT_STRING_it; ++ X509_REQ_it; ++ _ossl_old_des_cbc_encrypt; ++ ERR_unload_strings; ++ PKCS7_SIGN_ENVELOPE_it; ++ EDIPARTYNAME_free; ++ OCSP_REQINFO_free; ++ EC_GROUP_new_curve_GFp; ++ OCSP_REQUEST_get1_ext_d2i; ++ PKCS12_item_pack_safebag; ++ asn1_ex_c2i; ++ ENGINE_register_digests; ++ i2d_OCSP_REVOKEDINFO; ++ asn1_enc_restore; ++ UI_free; ++ UI_new_method; ++ EVP_EncryptInit_ex; ++ X509_pubkey_digest; ++ EC_POINT_invert; ++ OCSP_basic_sign; ++ i2d_OCSP_RESPID; ++ OCSP_check_nonce; ++ ENGINE_ctrl_cmd; ++ d2i_KRB5_ENCKEY; ++ OCSP_parse_url; ++ OCSP_SINGLERESP_get_ext; ++ OCSP_CRLID_free; ++ OCSP_BASICRESP_get1_ext_d2i; ++ RSAPrivateKey_it; ++ ENGINE_register_all_DH; ++ i2d_EDIPARTYNAME; ++ EC_POINT_get_affine_coordinates_GFp; ++ EC_POINT_get_affine_coords_GFp; ++ OCSP_CRLID_new; ++ ENGINE_get_flags; ++ OCSP_ONEREQ_it; ++ UI_process; ++ ASN1_INTEGER_it; ++ EVP_CipherInit_ex; ++ UI_get_string_type; ++ ENGINE_unregister_DH; ++ ENGINE_register_all_DSA; ++ OCSP_ONEREQ_get_ext_by_critical; ++ bn_dup_expand; ++ OCSP_cert_id_new; ++ BASIC_CONSTRAINTS_it; ++ BN_mod_add_quick; ++ EC_POINT_new; ++ EVP_MD_CTX_destroy; ++ OCSP_RESPBYTES_free; ++ EVP_aes_128_cbc; ++ OCSP_SINGLERESP_get1_ext_d2i; ++ EC_POINT_free; ++ DH_up_ref; ++ X509_NAME_ENTRY_it; ++ UI_get_ex_new_index; ++ BN_mod_sub_quick; ++ OCSP_ONEREQ_add_ext; ++ OCSP_request_sign; ++ EVP_DigestFinal_ex; ++ ENGINE_set_digests; ++ OCSP_id_issuer_cmp; ++ OBJ_NAME_do_all; ++ EC_POINTs_mul; ++ ENGINE_register_complete; ++ X509V3_EXT_nconf_nid; ++ ASN1_SEQUENCE_it; ++ UI_set_default_method; ++ RAND_query_egd_bytes; ++ UI_method_get_writer; ++ UI_OpenSSL; ++ PEM_def_callback; ++ ENGINE_cleanup; ++ DIST_POINT_it; ++ OCSP_SINGLERESP_it; ++ d2i_KRB5_TKTBODY; ++ EC_POINT_cmp; ++ OCSP_REVOKEDINFO_new; ++ i2d_OCSP_CERTSTATUS; ++ OCSP_basic_add1_nonce; ++ ASN1_item_ex_d2i; ++ BN_mod_lshift1_quick; ++ UI_set_method; ++ OCSP_id_get0_info; ++ BN_mod_sqrt; ++ EC_GROUP_copy; ++ KRB5_ENCDATA_free; ++ _ossl_old_des_cfb_encrypt; ++ OCSP_SINGLERESP_get_ext_by_OBJ; ++ OCSP_cert_to_id; ++ OCSP_RESPID_new; ++ OCSP_RESPDATA_it; ++ d2i_OCSP_RESPDATA; ++ ENGINE_register_all_complete; ++ OCSP_check_validity; ++ PKCS12_BAGS_it; ++ OCSP_url_svcloc_new; ++ ASN1_template_free; ++ OCSP_SINGLERESP_add_ext; ++ KRB5_AUTHENTBODY_it; ++ X509_supported_extension; ++ i2d_KRB5_AUTHDATA; ++ UI_method_get_opener; ++ ENGINE_set_ex_data; ++ OCSP_REQUEST_print; ++ CBIGNUM_it; ++ KRB5_TICKET_new; ++ KRB5_APREQ_new; ++ EC_GROUP_get_curve_GFp; ++ KRB5_ENCKEY_new; ++ ASN1_template_d2i; ++ _ossl_old_des_quad_cksum; ++ OCSP_single_get0_status; ++ BN_swap; ++ POLICYINFO_it; ++ ENGINE_set_destroy_function; ++ asn1_enc_free; ++ OCSP_RESPID_it; ++ EC_GROUP_new; ++ EVP_aes_256_cbc; ++ i2d_KRB5_PRINCNAME; ++ _ossl_old_des_encrypt2; ++ _ossl_old_des_encrypt3; ++ PKCS8_PRIV_KEY_INFO_it; ++ OCSP_REQINFO_it; ++ PBEPARAM_it; ++ KRB5_AUTHENTBODY_new; ++ X509_CRL_add0_revoked; ++ EDIPARTYNAME_it; ++ NETSCAPE_SPKI_it; ++ UI_get0_test_string; ++ ENGINE_get_cipher_engine; ++ ENGINE_register_all_ciphers; ++ EC_POINT_copy; ++ BN_kronecker; ++ _ossl_old_des_ede3_ofb64_encrypt; ++ _ossl_odes_ede3_ofb64_encrypt; ++ UI_method_get_reader; ++ OCSP_BASICRESP_get_ext_count; ++ ASN1_ENUMERATED_it; ++ UI_set_result; ++ i2d_KRB5_TICKET; ++ X509_print_ex_fp; ++ EVP_CIPHER_CTX_set_padding; ++ d2i_OCSP_RESPONSE; ++ ASN1_UTCTIME_it; ++ _ossl_old_des_enc_write; ++ OCSP_RESPONSE_new; ++ AES_set_encrypt_key; ++ OCSP_resp_count; ++ KRB5_CHECKSUM_new; ++ ENGINE_load_cswift; ++ OCSP_onereq_get0_id; ++ ENGINE_set_default_ciphers; ++ NOTICEREF_it; ++ X509V3_EXT_CRL_add_nconf; ++ OCSP_REVOKEDINFO_it; ++ AES_encrypt; ++ OCSP_REQUEST_new; ++ ASN1_ANY_it; ++ CRYPTO_ex_data_new_class; ++ _ossl_old_des_ncbc_encrypt; ++ i2d_KRB5_TKTBODY; ++ EC_POINT_clear_free; ++ AES_decrypt; ++ asn1_enc_init; ++ UI_get_result_maxsize; ++ OCSP_CERTID_new; ++ ENGINE_unregister_RAND; ++ UI_method_get_closer; ++ d2i_KRB5_ENCDATA; ++ OCSP_request_onereq_count; ++ OCSP_basic_verify; ++ KRB5_AUTHENTBODY_free; ++ ASN1_item_d2i; ++ ASN1_primitive_free; ++ i2d_EXTENDED_KEY_USAGE; ++ i2d_OCSP_SIGNATURE; ++ asn1_enc_save; ++ ENGINE_load_nuron; ++ _ossl_old_des_pcbc_encrypt; ++ PKCS12_MAC_DATA_it; ++ OCSP_accept_responses_new; ++ asn1_do_lock; ++ PKCS7_ATTR_VERIFY_it; ++ KRB5_APREQBODY_it; ++ i2d_OCSP_SINGLERESP; ++ ASN1_item_ex_new; ++ UI_add_verify_string; ++ _ossl_old_des_set_key; ++ KRB5_PRINCNAME_it; ++ EVP_DecryptInit_ex; ++ i2d_OCSP_CERTID; ++ ASN1_item_d2i_bio; ++ EC_POINT_dbl; ++ asn1_get_choice_selector; ++ i2d_KRB5_CHECKSUM; ++ ENGINE_set_table_flags; ++ AES_options; ++ ENGINE_load_chil; ++ OCSP_id_cmp; ++ OCSP_BASICRESP_new; ++ OCSP_REQUEST_get_ext_by_NID; ++ KRB5_APREQ_it; ++ ENGINE_get_destroy_function; ++ CONF_set_nconf; ++ ASN1_PRINTABLE_free; ++ OCSP_BASICRESP_get_ext_by_NID; ++ DIST_POINT_NAME_it; ++ X509V3_extensions_print; ++ _ossl_old_des_cfb64_encrypt; ++ X509_REVOKED_add1_ext_i2d; ++ _ossl_old_des_ofb_encrypt; ++ KRB5_TKTBODY_new; ++ ASN1_OCTET_STRING_it; ++ ERR_load_UI_strings; ++ i2d_KRB5_ENCKEY; ++ ASN1_template_new; ++ OCSP_SIGNATURE_free; ++ ASN1_item_i2d_fp; ++ KRB5_PRINCNAME_free; ++ PKCS7_RECIP_INFO_it; ++ EXTENDED_KEY_USAGE_it; ++ EC_GFp_simple_method; ++ EC_GROUP_precompute_mult; ++ OCSP_request_onereq_get0; ++ UI_method_set_writer; ++ KRB5_AUTHENT_new; ++ X509_CRL_INFO_it; ++ DSO_set_name_converter; ++ AES_set_decrypt_key; ++ PKCS7_DIGEST_it; ++ PKCS12_x5092certbag; ++ EVP_DigestInit_ex; ++ i2a_ACCESS_DESCRIPTION; ++ OCSP_RESPONSE_it; ++ PKCS7_ENC_CONTENT_it; ++ OCSP_request_add0_id; ++ EC_POINT_make_affine; ++ DSO_get_filename; ++ OCSP_CERTSTATUS_it; ++ OCSP_request_add1_cert; ++ UI_get0_output_string; ++ UI_dup_verify_string; ++ BN_mod_lshift; ++ KRB5_AUTHDATA_it; ++ asn1_set_choice_selector; ++ OCSP_basic_add1_status; ++ OCSP_RESPID_free; ++ asn1_get_field_ptr; ++ UI_add_input_string; ++ OCSP_CRLID_it; ++ i2d_KRB5_AUTHENTBODY; ++ OCSP_REQUEST_get_ext_count; ++ ENGINE_load_atalla; ++ X509_NAME_it; ++ USERNOTICE_it; ++ OCSP_REQINFO_new; ++ OCSP_BASICRESP_get_ext; ++ CRYPTO_get_ex_data_implementation; ++ CRYPTO_get_ex_data_impl; ++ ASN1_item_pack; ++ i2d_KRB5_ENCDATA; ++ X509_PURPOSE_set; ++ X509_REQ_INFO_it; ++ UI_method_set_opener; ++ ASN1_item_ex_free; ++ ASN1_BOOLEAN_it; ++ ENGINE_get_table_flags; ++ UI_create_method; ++ OCSP_ONEREQ_add1_ext_i2d; ++ _shadow_DES_check_key; ++ d2i_OCSP_REQINFO; ++ UI_add_info_string; ++ UI_get_result_minsize; ++ ASN1_NULL_it; ++ BN_mod_lshift1; ++ d2i_OCSP_ONEREQ; ++ OCSP_ONEREQ_new; ++ KRB5_TICKET_it; ++ EVP_aes_192_cbc; ++ KRB5_TICKET_free; ++ UI_new; ++ OCSP_response_create; ++ _ossl_old_des_xcbc_encrypt; ++ PKCS7_it; ++ OCSP_REQUEST_get_ext_by_critical; ++ OCSP_REQUEST_get_ext_by_crit; ++ ENGINE_set_flags; ++ _ossl_old_des_ecb_encrypt; ++ OCSP_response_get1_basic; ++ EVP_Digest; ++ OCSP_ONEREQ_delete_ext; ++ ASN1_TBOOLEAN_it; ++ ASN1_item_new; ++ ASN1_TIME_to_generalizedtime; ++ BIGNUM_it; ++ AES_cbc_encrypt; ++ ENGINE_get_load_privkey_function; ++ ENGINE_get_load_privkey_fn; ++ OCSP_RESPONSE_free; ++ UI_method_set_reader; ++ i2d_ASN1_T61STRING; ++ EC_POINT_set_to_infinity; ++ ERR_load_OCSP_strings; ++ EC_POINT_point2oct; ++ KRB5_APREQ_free; ++ ASN1_OBJECT_it; ++ OCSP_crlID_new; ++ OCSP_crlID2_new; ++ CONF_modules_load_file; ++ CONF_imodule_set_usr_data; ++ ENGINE_set_default_string; ++ CONF_module_get_usr_data; ++ ASN1_add_oid_module; ++ CONF_modules_finish; ++ OPENSSL_config; ++ CONF_modules_unload; ++ CONF_imodule_get_value; ++ CONF_module_set_usr_data; ++ CONF_parse_list; ++ CONF_module_add; ++ CONF_get1_default_config_file; ++ CONF_imodule_get_flags; ++ CONF_imodule_get_module; ++ CONF_modules_load; ++ CONF_imodule_get_name; ++ ERR_peek_top_error; ++ CONF_imodule_get_usr_data; ++ CONF_imodule_set_flags; ++ ENGINE_add_conf_module; ++ ERR_peek_last_error_line; ++ ERR_peek_last_error_line_data; ++ ERR_peek_last_error; ++ DES_read_2passwords; ++ DES_read_password; ++ UI_UTIL_read_pw; ++ UI_UTIL_read_pw_string; ++ ENGINE_load_aep; ++ ENGINE_load_sureware; ++ OPENSSL_add_all_algorithms_noconf; ++ OPENSSL_add_all_algo_noconf; ++ OPENSSL_add_all_algorithms_conf; ++ OPENSSL_add_all_algo_conf; ++ OPENSSL_load_builtin_modules; ++ AES_ofb128_encrypt; ++ AES_ctr128_encrypt; ++ AES_cfb128_encrypt; ++ ENGINE_load_4758cca; ++ _ossl_096_des_random_seed; ++ EVP_aes_256_ofb; ++ EVP_aes_192_ofb; ++ EVP_aes_128_cfb128; ++ EVP_aes_256_cfb128; ++ EVP_aes_128_ofb; ++ EVP_aes_192_cfb128; ++ CONF_modules_free; ++ NCONF_default; ++ OPENSSL_no_config; ++ NCONF_WIN32; ++ ASN1_UNIVERSALSTRING_new; ++ EVP_des_ede_ecb; ++ i2d_ASN1_UNIVERSALSTRING; ++ ASN1_UNIVERSALSTRING_free; ++ ASN1_UNIVERSALSTRING_it; ++ d2i_ASN1_UNIVERSALSTRING; ++ EVP_des_ede3_ecb; ++ X509_REQ_print_ex; ++ ENGINE_up_ref; ++ BUF_MEM_grow_clean; ++ CRYPTO_realloc_clean; ++ BUF_strlcat; ++ BIO_indent; ++ BUF_strlcpy; ++ OpenSSLDie; ++ OPENSSL_cleanse; ++ ENGINE_setup_bsd_cryptodev; ++ ERR_release_err_state_table; ++ EVP_aes_128_cfb8; ++ FIPS_corrupt_rsa; ++ FIPS_selftest_des; ++ EVP_aes_128_cfb1; ++ EVP_aes_192_cfb8; ++ FIPS_mode_set; ++ FIPS_selftest_dsa; ++ EVP_aes_256_cfb8; ++ FIPS_allow_md5; ++ DES_ede3_cfb_encrypt; ++ EVP_des_ede3_cfb8; ++ FIPS_rand_seeded; ++ AES_cfbr_encrypt_block; ++ AES_cfb8_encrypt; ++ FIPS_rand_seed; ++ FIPS_corrupt_des; ++ EVP_aes_192_cfb1; ++ FIPS_selftest_aes; ++ FIPS_set_prng_key; ++ EVP_des_cfb8; ++ FIPS_corrupt_dsa; ++ FIPS_test_mode; ++ FIPS_rand_method; ++ EVP_aes_256_cfb1; ++ ERR_load_FIPS_strings; ++ FIPS_corrupt_aes; ++ FIPS_selftest_sha1; ++ FIPS_selftest_rsa; ++ FIPS_corrupt_sha1; ++ EVP_des_cfb1; ++ FIPS_dsa_check; ++ AES_cfb1_encrypt; ++ EVP_des_ede3_cfb1; ++ FIPS_rand_check; ++ FIPS_md5_allowed; ++ FIPS_mode; ++ FIPS_selftest_failed; ++ sk_is_sorted; ++ X509_check_ca; ++ HMAC_CTX_set_flags; ++ d2i_PROXY_CERT_INFO_EXTENSION; ++ PROXY_POLICY_it; ++ i2d_PROXY_POLICY; ++ i2d_PROXY_CERT_INFO_EXTENSION; ++ d2i_PROXY_POLICY; ++ PROXY_CERT_INFO_EXTENSION_new; ++ PROXY_CERT_INFO_EXTENSION_free; ++ PROXY_CERT_INFO_EXTENSION_it; ++ PROXY_POLICY_free; ++ PROXY_POLICY_new; ++ BN_MONT_CTX_set_locked; ++ FIPS_selftest_rng; ++ EVP_sha384; ++ EVP_sha512; ++ EVP_sha224; ++ EVP_sha256; ++ FIPS_selftest_hmac; ++ FIPS_corrupt_rng; ++ BN_mod_exp_mont_consttime; ++ RSA_X931_hash_id; ++ RSA_padding_check_X931; ++ RSA_verify_PKCS1_PSS; ++ RSA_padding_add_X931; ++ RSA_padding_add_PKCS1_PSS; ++ PKCS1_MGF1; ++ BN_X931_generate_Xpq; ++ RSA_X931_generate_key; ++ BN_X931_derive_prime; ++ BN_X931_generate_prime; ++ RSA_X931_derive; ++ BIO_new_dgram; ++ BN_get0_nist_prime_384; ++ ERR_set_mark; ++ X509_STORE_CTX_set0_crls; ++ ENGINE_set_STORE; ++ ENGINE_register_ECDSA; ++ STORE_meth_set_list_start_fn; ++ STORE_method_set_list_start_function; ++ BN_BLINDING_invert_ex; ++ NAME_CONSTRAINTS_free; ++ STORE_ATTR_INFO_set_number; ++ BN_BLINDING_get_thread_id; ++ X509_STORE_CTX_set0_param; ++ POLICY_MAPPING_it; ++ STORE_parse_attrs_start; ++ POLICY_CONSTRAINTS_free; ++ EVP_PKEY_add1_attr_by_NID; ++ BN_nist_mod_192; ++ EC_GROUP_get_trinomial_basis; ++ STORE_set_method; ++ GENERAL_SUBTREE_free; ++ NAME_CONSTRAINTS_it; ++ ECDH_get_default_method; ++ PKCS12_add_safe; ++ EC_KEY_new_by_curve_name; ++ STORE_meth_get_update_store_fn; ++ STORE_method_get_update_store_function; ++ ENGINE_register_ECDH; ++ SHA512_Update; ++ i2d_ECPrivateKey; ++ BN_get0_nist_prime_192; ++ STORE_modify_certificate; ++ EC_POINT_set_affine_coordinates_GF2m; ++ EC_POINT_set_affine_coords_GF2m; ++ BN_GF2m_mod_exp_arr; ++ STORE_ATTR_INFO_modify_number; ++ X509_keyid_get0; ++ ENGINE_load_gmp; ++ pitem_new; ++ BN_GF2m_mod_mul_arr; ++ STORE_list_public_key_endp; ++ o2i_ECPublicKey; ++ EC_KEY_copy; ++ BIO_dump_fp; ++ X509_policy_node_get0_parent; ++ EC_GROUP_check_discriminant; ++ i2o_ECPublicKey; ++ EC_KEY_precompute_mult; ++ a2i_IPADDRESS; ++ STORE_meth_set_initialise_fn; ++ STORE_method_set_initialise_function; ++ X509_STORE_CTX_set_depth; ++ X509_VERIFY_PARAM_inherit; ++ EC_POINT_point2bn; ++ STORE_ATTR_INFO_set_dn; ++ X509_policy_tree_get0_policies; ++ EC_GROUP_new_curve_GF2m; ++ STORE_destroy_method; ++ ENGINE_unregister_STORE; ++ EVP_PKEY_get1_EC_KEY; ++ STORE_ATTR_INFO_get0_number; ++ ENGINE_get_default_ECDH; ++ EC_KEY_get_conv_form; ++ ASN1_OCTET_STRING_NDEF_it; ++ STORE_delete_public_key; ++ STORE_get_public_key; ++ STORE_modify_arbitrary; ++ ENGINE_get_static_state; ++ pqueue_iterator; ++ ECDSA_SIG_new; ++ OPENSSL_DIR_end; ++ BN_GF2m_mod_sqr; ++ EC_POINT_bn2point; ++ X509_VERIFY_PARAM_set_depth; ++ EC_KEY_set_asn1_flag; ++ STORE_get_method; ++ EC_KEY_get_key_method_data; ++ ECDSA_sign_ex; ++ STORE_parse_attrs_end; ++ EC_GROUP_get_point_conversion_form; ++ EC_GROUP_get_point_conv_form; ++ STORE_method_set_store_function; ++ STORE_ATTR_INFO_in; ++ PEM_read_bio_ECPKParameters; ++ EC_GROUP_get_pentanomial_basis; ++ EVP_PKEY_add1_attr_by_txt; ++ BN_BLINDING_set_flags; ++ X509_VERIFY_PARAM_set1_policies; ++ X509_VERIFY_PARAM_set1_name; ++ X509_VERIFY_PARAM_set_purpose; ++ STORE_get_number; ++ ECDSA_sign_setup; ++ BN_GF2m_mod_solve_quad_arr; ++ EC_KEY_up_ref; ++ POLICY_MAPPING_free; ++ BN_GF2m_mod_div; ++ X509_VERIFY_PARAM_set_flags; ++ EC_KEY_free; ++ STORE_meth_set_list_next_fn; ++ STORE_method_set_list_next_function; ++ PEM_write_bio_ECPrivateKey; ++ d2i_EC_PUBKEY; ++ STORE_meth_get_generate_fn; ++ STORE_method_get_generate_function; ++ STORE_meth_set_list_end_fn; ++ STORE_method_set_list_end_function; ++ pqueue_print; ++ EC_GROUP_have_precompute_mult; ++ EC_KEY_print_fp; ++ BN_GF2m_mod_arr; ++ PEM_write_bio_X509_CERT_PAIR; ++ EVP_PKEY_cmp; ++ X509_policy_level_node_count; ++ STORE_new_engine; ++ STORE_list_public_key_start; ++ X509_VERIFY_PARAM_new; ++ ECDH_get_ex_data; ++ EVP_PKEY_get_attr; ++ ECDSA_do_sign; ++ ENGINE_unregister_ECDH; ++ ECDH_OpenSSL; ++ EC_KEY_set_conv_form; ++ EC_POINT_dup; ++ GENERAL_SUBTREE_new; ++ STORE_list_crl_endp; ++ EC_get_builtin_curves; ++ X509_policy_node_get0_qualifiers; ++ X509_pcy_node_get0_qualifiers; ++ STORE_list_crl_end; ++ EVP_PKEY_set1_EC_KEY; ++ BN_GF2m_mod_sqrt_arr; ++ i2d_ECPrivateKey_bio; ++ ECPKParameters_print_fp; ++ pqueue_find; ++ ECDSA_SIG_free; ++ PEM_write_bio_ECPKParameters; ++ STORE_method_set_ctrl_function; ++ STORE_list_public_key_end; ++ EC_KEY_set_private_key; ++ pqueue_peek; ++ STORE_get_arbitrary; ++ STORE_store_crl; ++ X509_policy_node_get0_policy; ++ PKCS12_add_safes; ++ BN_BLINDING_convert_ex; ++ X509_policy_tree_free; ++ OPENSSL_ia32cap_loc; ++ BN_GF2m_poly2arr; ++ STORE_ctrl; ++ STORE_ATTR_INFO_compare; ++ BN_get0_nist_prime_224; ++ i2d_ECParameters; ++ i2d_ECPKParameters; ++ BN_GENCB_call; ++ d2i_ECPKParameters; ++ STORE_meth_set_generate_fn; ++ STORE_method_set_generate_function; ++ ENGINE_set_ECDH; ++ NAME_CONSTRAINTS_new; ++ SHA256_Init; ++ EC_KEY_get0_public_key; ++ PEM_write_bio_EC_PUBKEY; ++ STORE_ATTR_INFO_set_cstr; ++ STORE_list_crl_next; ++ STORE_ATTR_INFO_in_range; ++ ECParameters_print; ++ STORE_meth_set_delete_fn; ++ STORE_method_set_delete_function; ++ STORE_list_certificate_next; ++ ASN1_generate_nconf; ++ BUF_memdup; ++ BN_GF2m_mod_mul; ++ STORE_meth_get_list_next_fn; ++ STORE_method_get_list_next_function; ++ STORE_ATTR_INFO_get0_dn; ++ STORE_list_private_key_next; ++ EC_GROUP_set_seed; ++ X509_VERIFY_PARAM_set_trust; ++ STORE_ATTR_INFO_free; ++ STORE_get_private_key; ++ EVP_PKEY_get_attr_count; ++ STORE_ATTR_INFO_new; ++ EC_GROUP_get_curve_GF2m; ++ STORE_meth_set_revoke_fn; ++ STORE_method_set_revoke_function; ++ STORE_store_number; ++ BN_is_prime_ex; ++ STORE_revoke_public_key; ++ X509_STORE_CTX_get0_param; ++ STORE_delete_arbitrary; ++ PEM_read_X509_CERT_PAIR; ++ X509_STORE_set_depth; ++ ECDSA_get_ex_data; ++ SHA224; ++ BIO_dump_indent_fp; ++ EC_KEY_set_group; ++ BUF_strndup; ++ STORE_list_certificate_start; ++ BN_GF2m_mod; ++ X509_REQ_check_private_key; ++ EC_GROUP_get_seed_len; ++ ERR_load_STORE_strings; ++ PEM_read_bio_EC_PUBKEY; ++ STORE_list_private_key_end; ++ i2d_EC_PUBKEY; ++ ECDSA_get_default_method; ++ ASN1_put_eoc; ++ X509_STORE_CTX_get_explicit_policy; ++ X509_STORE_CTX_get_expl_policy; ++ X509_VERIFY_PARAM_table_cleanup; ++ STORE_modify_private_key; ++ X509_VERIFY_PARAM_free; ++ EC_METHOD_get_field_type; ++ EC_GFp_nist_method; ++ STORE_meth_set_modify_fn; ++ STORE_method_set_modify_function; ++ STORE_parse_attrs_next; ++ ENGINE_load_padlock; ++ EC_GROUP_set_curve_name; ++ X509_CERT_PAIR_it; ++ STORE_meth_get_revoke_fn; ++ STORE_method_get_revoke_function; ++ STORE_method_set_get_function; ++ STORE_modify_number; ++ STORE_method_get_store_function; ++ STORE_store_private_key; ++ BN_GF2m_mod_sqr_arr; ++ RSA_setup_blinding; ++ BIO_s_datagram; ++ STORE_Memory; ++ sk_find_ex; ++ EC_GROUP_set_curve_GF2m; ++ ENGINE_set_default_ECDSA; ++ POLICY_CONSTRAINTS_new; ++ BN_GF2m_mod_sqrt; ++ ECDH_set_default_method; ++ EC_KEY_generate_key; ++ SHA384_Update; ++ BN_GF2m_arr2poly; ++ STORE_method_get_get_function; ++ STORE_meth_set_cleanup_fn; ++ STORE_method_set_cleanup_function; ++ EC_GROUP_check; ++ d2i_ECPrivateKey_bio; ++ EC_KEY_insert_key_method_data; ++ STORE_meth_get_lock_store_fn; ++ STORE_method_get_lock_store_function; ++ X509_VERIFY_PARAM_get_depth; ++ SHA224_Final; ++ STORE_meth_set_update_store_fn; ++ STORE_method_set_update_store_function; ++ SHA224_Update; ++ d2i_ECPrivateKey; ++ ASN1_item_ndef_i2d; ++ STORE_delete_private_key; ++ ERR_pop_to_mark; ++ ENGINE_register_all_STORE; ++ X509_policy_level_get0_node; ++ i2d_PKCS7_NDEF; ++ EC_GROUP_get_degree; ++ ASN1_generate_v3; ++ STORE_ATTR_INFO_modify_cstr; ++ X509_policy_tree_level_count; ++ BN_GF2m_add; ++ EC_KEY_get0_group; ++ STORE_generate_crl; ++ STORE_store_public_key; ++ X509_CERT_PAIR_free; ++ STORE_revoke_private_key; ++ BN_nist_mod_224; ++ SHA512_Final; ++ STORE_ATTR_INFO_modify_dn; ++ STORE_meth_get_initialise_fn; ++ STORE_method_get_initialise_function; ++ STORE_delete_number; ++ i2d_EC_PUBKEY_bio; ++ BIO_dgram_non_fatal_error; ++ EC_GROUP_get_asn1_flag; ++ STORE_ATTR_INFO_in_ex; ++ STORE_list_crl_start; ++ ECDH_get_ex_new_index; ++ STORE_meth_get_modify_fn; ++ STORE_method_get_modify_function; ++ v2i_ASN1_BIT_STRING; ++ STORE_store_certificate; ++ OBJ_bsearch_ex; ++ X509_STORE_CTX_set_default; ++ STORE_ATTR_INFO_set_sha1str; ++ BN_GF2m_mod_inv; ++ BN_GF2m_mod_exp; ++ STORE_modify_public_key; ++ STORE_meth_get_list_start_fn; ++ STORE_method_get_list_start_function; ++ EC_GROUP_get0_seed; ++ STORE_store_arbitrary; ++ STORE_meth_set_unlock_store_fn; ++ STORE_method_set_unlock_store_function; ++ BN_GF2m_mod_div_arr; ++ ENGINE_set_ECDSA; ++ STORE_create_method; ++ ECPKParameters_print; ++ EC_KEY_get0_private_key; ++ PEM_write_EC_PUBKEY; ++ X509_VERIFY_PARAM_set1; ++ ECDH_set_method; ++ v2i_GENERAL_NAME_ex; ++ ECDH_set_ex_data; ++ STORE_generate_key; ++ BN_nist_mod_521; ++ X509_policy_tree_get0_level; ++ EC_GROUP_set_point_conversion_form; ++ EC_GROUP_set_point_conv_form; ++ PEM_read_EC_PUBKEY; ++ i2d_ECDSA_SIG; ++ ECDSA_OpenSSL; ++ STORE_delete_crl; ++ EC_KEY_get_enc_flags; ++ ASN1_const_check_infinite_end; ++ EVP_PKEY_delete_attr; ++ ECDSA_set_default_method; ++ EC_POINT_set_compressed_coordinates_GF2m; ++ EC_POINT_set_compr_coords_GF2m; ++ EC_GROUP_cmp; ++ STORE_revoke_certificate; ++ BN_get0_nist_prime_256; ++ STORE_meth_get_delete_fn; ++ STORE_method_get_delete_function; ++ SHA224_Init; ++ PEM_read_ECPrivateKey; ++ SHA512_Init; ++ STORE_parse_attrs_endp; ++ BN_set_negative; ++ ERR_load_ECDSA_strings; ++ EC_GROUP_get_basis_type; ++ STORE_list_public_key_next; ++ i2v_ASN1_BIT_STRING; ++ STORE_OBJECT_free; ++ BN_nist_mod_384; ++ i2d_X509_CERT_PAIR; ++ PEM_write_ECPKParameters; ++ ECDH_compute_key; ++ STORE_ATTR_INFO_get0_sha1str; ++ ENGINE_register_all_ECDH; ++ pqueue_pop; ++ STORE_ATTR_INFO_get0_cstr; ++ POLICY_CONSTRAINTS_it; ++ STORE_get_ex_new_index; ++ EVP_PKEY_get_attr_by_OBJ; ++ X509_VERIFY_PARAM_add0_policy; ++ BN_GF2m_mod_solve_quad; ++ SHA256; ++ i2d_ECPrivateKey_fp; ++ X509_policy_tree_get0_user_policies; ++ X509_pcy_tree_get0_usr_policies; ++ OPENSSL_DIR_read; ++ ENGINE_register_all_ECDSA; ++ X509_VERIFY_PARAM_lookup; ++ EC_POINT_get_affine_coordinates_GF2m; ++ EC_POINT_get_affine_coords_GF2m; ++ EC_GROUP_dup; ++ ENGINE_get_default_ECDSA; ++ EC_KEY_new; ++ SHA256_Transform; ++ EC_KEY_set_enc_flags; ++ ECDSA_verify; ++ EC_POINT_point2hex; ++ ENGINE_get_STORE; ++ SHA512; ++ STORE_get_certificate; ++ ECDSA_do_sign_ex; ++ ECDSA_do_verify; ++ d2i_ECPrivateKey_fp; ++ STORE_delete_certificate; ++ SHA512_Transform; ++ X509_STORE_set1_param; ++ STORE_method_get_ctrl_function; ++ STORE_free; ++ PEM_write_ECPrivateKey; ++ STORE_meth_get_unlock_store_fn; ++ STORE_method_get_unlock_store_function; ++ STORE_get_ex_data; ++ EC_KEY_set_public_key; ++ PEM_read_ECPKParameters; ++ X509_CERT_PAIR_new; ++ ENGINE_register_STORE; ++ RSA_generate_key_ex; ++ DSA_generate_parameters_ex; ++ ECParameters_print_fp; ++ X509V3_NAME_from_section; ++ EVP_PKEY_add1_attr; ++ STORE_modify_crl; ++ STORE_list_private_key_start; ++ POLICY_MAPPINGS_it; ++ GENERAL_SUBTREE_it; ++ EC_GROUP_get_curve_name; ++ PEM_write_X509_CERT_PAIR; ++ BIO_dump_indent_cb; ++ d2i_X509_CERT_PAIR; ++ STORE_list_private_key_endp; ++ asn1_const_Finish; ++ i2d_EC_PUBKEY_fp; ++ BN_nist_mod_256; ++ X509_VERIFY_PARAM_add0_table; ++ pqueue_free; ++ BN_BLINDING_create_param; ++ ECDSA_size; ++ d2i_EC_PUBKEY_bio; ++ BN_get0_nist_prime_521; ++ STORE_ATTR_INFO_modify_sha1str; ++ BN_generate_prime_ex; ++ EC_GROUP_new_by_curve_name; ++ SHA256_Final; ++ DH_generate_parameters_ex; ++ PEM_read_bio_ECPrivateKey; ++ STORE_meth_get_cleanup_fn; ++ STORE_method_get_cleanup_function; ++ ENGINE_get_ECDH; ++ d2i_ECDSA_SIG; ++ BN_is_prime_fasttest_ex; ++ ECDSA_sign; ++ X509_policy_check; ++ EVP_PKEY_get_attr_by_NID; ++ STORE_set_ex_data; ++ ENGINE_get_ECDSA; ++ EVP_ecdsa; ++ BN_BLINDING_get_flags; ++ PKCS12_add_cert; ++ STORE_OBJECT_new; ++ ERR_load_ECDH_strings; ++ EC_KEY_dup; ++ EVP_CIPHER_CTX_rand_key; ++ ECDSA_set_method; ++ a2i_IPADDRESS_NC; ++ d2i_ECParameters; ++ STORE_list_certificate_end; ++ STORE_get_crl; ++ X509_POLICY_NODE_print; ++ SHA384_Init; ++ EC_GF2m_simple_method; ++ ECDSA_set_ex_data; ++ SHA384_Final; ++ PKCS7_set_digest; ++ EC_KEY_print; ++ STORE_meth_set_lock_store_fn; ++ STORE_method_set_lock_store_function; ++ ECDSA_get_ex_new_index; ++ SHA384; ++ POLICY_MAPPING_new; ++ STORE_list_certificate_endp; ++ X509_STORE_CTX_get0_policy_tree; ++ EC_GROUP_set_asn1_flag; ++ EC_KEY_check_key; ++ d2i_EC_PUBKEY_fp; ++ PKCS7_set0_type_other; ++ PEM_read_bio_X509_CERT_PAIR; ++ pqueue_next; ++ STORE_meth_get_list_end_fn; ++ STORE_method_get_list_end_function; ++ EVP_PKEY_add1_attr_by_OBJ; ++ X509_VERIFY_PARAM_set_time; ++ pqueue_new; ++ ENGINE_set_default_ECDH; ++ STORE_new_method; ++ PKCS12_add_key; ++ DSO_merge; ++ EC_POINT_hex2point; ++ BIO_dump_cb; ++ SHA256_Update; ++ pqueue_insert; ++ pitem_free; ++ BN_GF2m_mod_inv_arr; ++ ENGINE_unregister_ECDSA; ++ BN_BLINDING_set_thread_id; ++ get_rfc3526_prime_8192; ++ X509_VERIFY_PARAM_clear_flags; ++ get_rfc2409_prime_1024; ++ DH_check_pub_key; ++ get_rfc3526_prime_2048; ++ get_rfc3526_prime_6144; ++ get_rfc3526_prime_1536; ++ get_rfc3526_prime_3072; ++ get_rfc3526_prime_4096; ++ get_rfc2409_prime_768; ++ X509_VERIFY_PARAM_get_flags; ++ EVP_CIPHER_CTX_new; ++ EVP_CIPHER_CTX_free; ++ Camellia_cbc_encrypt; ++ Camellia_cfb128_encrypt; ++ Camellia_cfb1_encrypt; ++ Camellia_cfb8_encrypt; ++ Camellia_ctr128_encrypt; ++ Camellia_cfbr_encrypt_block; ++ Camellia_decrypt; ++ Camellia_ecb_encrypt; ++ Camellia_encrypt; ++ Camellia_ofb128_encrypt; ++ Camellia_set_key; ++ EVP_camellia_128_cbc; ++ EVP_camellia_128_cfb128; ++ EVP_camellia_128_cfb1; ++ EVP_camellia_128_cfb8; ++ EVP_camellia_128_ecb; ++ EVP_camellia_128_ofb; ++ EVP_camellia_192_cbc; ++ EVP_camellia_192_cfb128; ++ EVP_camellia_192_cfb1; ++ EVP_camellia_192_cfb8; ++ EVP_camellia_192_ecb; ++ EVP_camellia_192_ofb; ++ EVP_camellia_256_cbc; ++ EVP_camellia_256_cfb128; ++ EVP_camellia_256_cfb1; ++ EVP_camellia_256_cfb8; ++ EVP_camellia_256_ecb; ++ EVP_camellia_256_ofb; ++ a2i_ipadd; ++ ASIdentifiers_free; ++ i2d_ASIdOrRange; ++ EVP_CIPHER_block_size; ++ v3_asid_is_canonical; ++ IPAddressChoice_free; ++ EVP_CIPHER_CTX_set_app_data; ++ BIO_set_callback_arg; ++ v3_addr_add_prefix; ++ IPAddressOrRange_it; ++ BIO_set_flags; ++ ASIdentifiers_it; ++ v3_addr_get_range; ++ BIO_method_type; ++ v3_addr_inherits; ++ IPAddressChoice_it; ++ AES_ige_encrypt; ++ v3_addr_add_range; ++ EVP_CIPHER_CTX_nid; ++ d2i_ASRange; ++ v3_addr_add_inherit; ++ v3_asid_add_id_or_range; ++ v3_addr_validate_resource_set; ++ EVP_CIPHER_iv_length; ++ EVP_MD_type; ++ v3_asid_canonize; ++ IPAddressRange_free; ++ v3_asid_add_inherit; ++ EVP_CIPHER_CTX_key_length; ++ IPAddressRange_new; ++ ASIdOrRange_new; ++ EVP_MD_size; ++ EVP_MD_CTX_test_flags; ++ BIO_clear_flags; ++ i2d_ASRange; ++ IPAddressRange_it; ++ IPAddressChoice_new; ++ ASIdentifierChoice_new; ++ ASRange_free; ++ EVP_MD_pkey_type; ++ EVP_MD_CTX_clear_flags; ++ IPAddressFamily_free; ++ i2d_IPAddressFamily; ++ IPAddressOrRange_new; ++ EVP_CIPHER_flags; ++ v3_asid_validate_resource_set; ++ d2i_IPAddressRange; ++ AES_bi_ige_encrypt; ++ BIO_get_callback; ++ IPAddressOrRange_free; ++ v3_addr_subset; ++ d2i_IPAddressFamily; ++ v3_asid_subset; ++ BIO_test_flags; ++ i2d_ASIdentifierChoice; ++ ASRange_it; ++ d2i_ASIdentifiers; ++ ASRange_new; ++ d2i_IPAddressChoice; ++ v3_addr_get_afi; ++ EVP_CIPHER_key_length; ++ EVP_Cipher; ++ i2d_IPAddressOrRange; ++ ASIdOrRange_it; ++ EVP_CIPHER_nid; ++ i2d_IPAddressChoice; ++ EVP_CIPHER_CTX_block_size; ++ ASIdentifiers_new; ++ v3_addr_validate_path; ++ IPAddressFamily_new; ++ EVP_MD_CTX_set_flags; ++ v3_addr_is_canonical; ++ i2d_IPAddressRange; ++ IPAddressFamily_it; ++ v3_asid_inherits; ++ EVP_CIPHER_CTX_cipher; ++ EVP_CIPHER_CTX_get_app_data; ++ EVP_MD_block_size; ++ EVP_CIPHER_CTX_flags; ++ v3_asid_validate_path; ++ d2i_IPAddressOrRange; ++ v3_addr_canonize; ++ ASIdentifierChoice_it; ++ EVP_MD_CTX_md; ++ d2i_ASIdentifierChoice; ++ BIO_method_name; ++ EVP_CIPHER_CTX_iv_length; ++ ASIdOrRange_free; ++ ASIdentifierChoice_free; ++ BIO_get_callback_arg; ++ BIO_set_callback; ++ d2i_ASIdOrRange; ++ i2d_ASIdentifiers; ++ SEED_decrypt; ++ SEED_encrypt; ++ SEED_cbc_encrypt; ++ EVP_seed_ofb; ++ SEED_cfb128_encrypt; ++ SEED_ofb128_encrypt; ++ EVP_seed_cbc; ++ SEED_ecb_encrypt; ++ EVP_seed_ecb; ++ SEED_set_key; ++ EVP_seed_cfb128; ++ X509_EXTENSIONS_it; ++ X509_get1_ocsp; ++ OCSP_REQ_CTX_free; ++ i2d_X509_EXTENSIONS; ++ OCSP_sendreq_nbio; ++ OCSP_sendreq_new; ++ d2i_X509_EXTENSIONS; ++ X509_ALGORS_it; ++ X509_ALGOR_get0; ++ X509_ALGOR_set0; ++ AES_unwrap_key; ++ AES_wrap_key; ++ X509at_get0_data_by_OBJ; ++ ASN1_TYPE_set1; ++ ASN1_STRING_set0; ++ i2d_X509_ALGORS; ++ BIO_f_zlib; ++ COMP_zlib_cleanup; ++ d2i_X509_ALGORS; ++ CMS_ReceiptRequest_free; ++ PEM_write_CMS; ++ CMS_add0_CertificateChoices; ++ CMS_unsigned_add1_attr_by_OBJ; ++ ERR_load_CMS_strings; ++ CMS_sign_receipt; ++ i2d_CMS_ContentInfo; ++ CMS_signed_delete_attr; ++ d2i_CMS_bio; ++ CMS_unsigned_get_attr_by_NID; ++ CMS_verify; ++ SMIME_read_CMS; ++ CMS_decrypt_set1_key; ++ CMS_SignerInfo_get0_algs; ++ CMS_add1_cert; ++ CMS_set_detached; ++ CMS_encrypt; ++ CMS_EnvelopedData_create; ++ CMS_uncompress; ++ CMS_add0_crl; ++ CMS_SignerInfo_verify_content; ++ CMS_unsigned_get0_data_by_OBJ; ++ PEM_write_bio_CMS; ++ CMS_unsigned_get_attr; ++ CMS_RecipientInfo_ktri_cert_cmp; ++ CMS_RecipientInfo_ktri_get0_algs; ++ CMS_RecipInfo_ktri_get0_algs; ++ CMS_ContentInfo_free; ++ CMS_final; ++ CMS_add_simple_smimecap; ++ CMS_SignerInfo_verify; ++ CMS_data; ++ CMS_ContentInfo_it; ++ d2i_CMS_ReceiptRequest; ++ CMS_compress; ++ CMS_digest_create; ++ CMS_SignerInfo_cert_cmp; ++ CMS_SignerInfo_sign; ++ CMS_data_create; ++ i2d_CMS_bio; ++ CMS_EncryptedData_set1_key; ++ CMS_decrypt; ++ int_smime_write_ASN1; ++ CMS_unsigned_delete_attr; ++ CMS_unsigned_get_attr_count; ++ CMS_add_smimecap; ++ PEM_read_CMS; ++ CMS_signed_get_attr_by_OBJ; ++ d2i_CMS_ContentInfo; ++ CMS_add_standard_smimecap; ++ CMS_ContentInfo_new; ++ CMS_RecipientInfo_type; ++ CMS_get0_type; ++ CMS_is_detached; ++ CMS_sign; ++ CMS_signed_add1_attr; ++ CMS_unsigned_get_attr_by_OBJ; ++ SMIME_write_CMS; ++ CMS_EncryptedData_decrypt; ++ CMS_get0_RecipientInfos; ++ CMS_add0_RevocationInfoChoice; ++ CMS_decrypt_set1_pkey; ++ CMS_SignerInfo_set1_signer_cert; ++ CMS_get0_signers; ++ CMS_ReceiptRequest_get0_values; ++ CMS_signed_get0_data_by_OBJ; ++ CMS_get0_SignerInfos; ++ CMS_add0_cert; ++ CMS_EncryptedData_encrypt; ++ CMS_digest_verify; ++ CMS_set1_signers_certs; ++ CMS_signed_get_attr; ++ CMS_RecipientInfo_set0_key; ++ CMS_SignedData_init; ++ CMS_RecipientInfo_kekri_get0_id; ++ CMS_verify_receipt; ++ CMS_ReceiptRequest_it; ++ PEM_read_bio_CMS; ++ CMS_get1_crls; ++ CMS_add0_recipient_key; ++ SMIME_read_ASN1; ++ CMS_ReceiptRequest_new; ++ CMS_get0_content; ++ CMS_get1_ReceiptRequest; ++ CMS_signed_add1_attr_by_OBJ; ++ CMS_RecipientInfo_kekri_id_cmp; ++ CMS_add1_ReceiptRequest; ++ CMS_SignerInfo_get0_signer_id; ++ CMS_unsigned_add1_attr_by_NID; ++ CMS_unsigned_add1_attr; ++ CMS_signed_get_attr_by_NID; ++ CMS_get1_certs; ++ CMS_signed_add1_attr_by_NID; ++ CMS_unsigned_add1_attr_by_txt; ++ CMS_dataFinal; ++ CMS_RecipientInfo_ktri_get0_signer_id; ++ CMS_RecipInfo_ktri_get0_sigr_id; ++ i2d_CMS_ReceiptRequest; ++ CMS_add1_recipient_cert; ++ CMS_dataInit; ++ CMS_signed_add1_attr_by_txt; ++ CMS_RecipientInfo_decrypt; ++ CMS_signed_get_attr_count; ++ CMS_get0_eContentType; ++ CMS_set1_eContentType; ++ CMS_ReceiptRequest_create0; ++ CMS_add1_signer; ++ CMS_RecipientInfo_set0_pkey; ++ ENGINE_set_load_ssl_client_cert_function; ++ ENGINE_set_ld_ssl_clnt_cert_fn; ++ ENGINE_get_ssl_client_cert_function; ++ ENGINE_get_ssl_client_cert_fn; ++ ENGINE_load_ssl_client_cert; ++ ENGINE_load_capi; ++ OPENSSL_isservice; ++ FIPS_dsa_sig_decode; ++ EVP_CIPHER_CTX_clear_flags; ++ FIPS_rand_status; ++ FIPS_rand_set_key; ++ CRYPTO_set_mem_info_functions; ++ RSA_X931_generate_key_ex; ++ int_ERR_set_state_func; ++ int_EVP_MD_set_engine_callbacks; ++ int_CRYPTO_set_do_dynlock_callback; ++ FIPS_rng_stick; ++ EVP_CIPHER_CTX_set_flags; ++ BN_X931_generate_prime_ex; ++ FIPS_selftest_check; ++ FIPS_rand_set_dt; ++ CRYPTO_dbg_pop_info; ++ FIPS_dsa_free; ++ RSA_X931_derive_ex; ++ FIPS_rsa_new; ++ FIPS_rand_bytes; ++ fips_cipher_test; ++ EVP_CIPHER_CTX_test_flags; ++ CRYPTO_malloc_debug_init; ++ CRYPTO_dbg_push_info; ++ FIPS_corrupt_rsa_keygen; ++ FIPS_dh_new; ++ FIPS_corrupt_dsa_keygen; ++ FIPS_dh_free; ++ fips_pkey_signature_test; ++ EVP_add_alg_module; ++ int_RAND_init_engine_callbacks; ++ int_EVP_CIPHER_set_engine_callbacks; ++ int_EVP_MD_init_engine_callbacks; ++ FIPS_rand_test_mode; ++ FIPS_rand_reset; ++ FIPS_dsa_new; ++ int_RAND_set_callbacks; ++ BN_X931_derive_prime_ex; ++ int_ERR_lib_init; ++ int_EVP_CIPHER_init_engine_callbacks; ++ FIPS_rsa_free; ++ FIPS_dsa_sig_encode; ++ CRYPTO_dbg_remove_all_info; ++ OPENSSL_init; ++ CRYPTO_strdup; ++ JPAKE_STEP3A_process; ++ JPAKE_STEP1_release; ++ JPAKE_get_shared_key; ++ JPAKE_STEP3B_init; ++ JPAKE_STEP1_generate; ++ JPAKE_STEP1_init; ++ JPAKE_STEP3B_process; ++ JPAKE_STEP2_generate; ++ JPAKE_CTX_new; ++ JPAKE_CTX_free; ++ JPAKE_STEP3B_release; ++ JPAKE_STEP3A_release; ++ JPAKE_STEP2_process; ++ JPAKE_STEP3B_generate; ++ JPAKE_STEP1_process; ++ JPAKE_STEP3A_generate; ++ JPAKE_STEP2_release; ++ JPAKE_STEP3A_init; ++ ERR_load_JPAKE_strings; ++ JPAKE_STEP2_init; ++ pqueue_size; ++ i2d_TS_ACCURACY; ++ i2d_TS_MSG_IMPRINT_fp; ++ i2d_TS_MSG_IMPRINT; ++ EVP_PKEY_print_public; ++ EVP_PKEY_CTX_new; ++ i2d_TS_TST_INFO; ++ EVP_PKEY_asn1_find; ++ DSO_METHOD_beos; ++ TS_CONF_load_cert; ++ TS_REQ_get_ext; ++ EVP_PKEY_sign_init; ++ ASN1_item_print; ++ TS_TST_INFO_set_nonce; ++ TS_RESP_dup; ++ ENGINE_register_pkey_meths; ++ EVP_PKEY_asn1_add0; ++ PKCS7_add0_attrib_signing_time; ++ i2d_TS_TST_INFO_fp; ++ BIO_asn1_get_prefix; ++ TS_TST_INFO_set_time; ++ EVP_PKEY_meth_set_decrypt; ++ EVP_PKEY_set_type_str; ++ EVP_PKEY_CTX_get_keygen_info; ++ TS_REQ_set_policy_id; ++ d2i_TS_RESP_fp; ++ ENGINE_get_pkey_asn1_meth_engine; ++ ENGINE_get_pkey_asn1_meth_eng; ++ WHIRLPOOL_Init; ++ TS_RESP_set_status_info; ++ EVP_PKEY_keygen; ++ EVP_DigestSignInit; ++ TS_ACCURACY_set_millis; ++ TS_REQ_dup; ++ GENERAL_NAME_dup; ++ ASN1_SEQUENCE_ANY_it; ++ WHIRLPOOL; ++ X509_STORE_get1_crls; ++ ENGINE_get_pkey_asn1_meth; ++ EVP_PKEY_asn1_new; ++ BIO_new_NDEF; ++ ENGINE_get_pkey_meth; ++ TS_MSG_IMPRINT_set_algo; ++ i2d_TS_TST_INFO_bio; ++ TS_TST_INFO_set_ordering; ++ TS_TST_INFO_get_ext_by_OBJ; ++ CRYPTO_THREADID_set_pointer; ++ TS_CONF_get_tsa_section; ++ SMIME_write_ASN1; ++ TS_RESP_CTX_set_signer_key; ++ EVP_PKEY_encrypt_old; ++ EVP_PKEY_encrypt_init; ++ CRYPTO_THREADID_cpy; ++ ASN1_PCTX_get_cert_flags; ++ i2d_ESS_SIGNING_CERT; ++ TS_CONF_load_key; ++ i2d_ASN1_SEQUENCE_ANY; ++ d2i_TS_MSG_IMPRINT_bio; ++ EVP_PKEY_asn1_set_public; ++ b2i_PublicKey_bio; ++ BIO_asn1_set_prefix; ++ EVP_PKEY_new_mac_key; ++ BIO_new_CMS; ++ CRYPTO_THREADID_cmp; ++ TS_REQ_ext_free; ++ EVP_PKEY_asn1_set_free; ++ EVP_PKEY_get0_asn1; ++ d2i_NETSCAPE_X509; ++ EVP_PKEY_verify_recover_init; ++ EVP_PKEY_CTX_set_data; ++ EVP_PKEY_keygen_init; ++ TS_RESP_CTX_set_status_info; ++ TS_MSG_IMPRINT_get_algo; ++ TS_REQ_print_bio; ++ EVP_PKEY_CTX_ctrl_str; ++ EVP_PKEY_get_default_digest_nid; ++ PEM_write_bio_PKCS7_stream; ++ TS_MSG_IMPRINT_print_bio; ++ BN_asc2bn; ++ TS_REQ_get_policy_id; ++ ENGINE_set_default_pkey_asn1_meths; ++ ENGINE_set_def_pkey_asn1_meths; ++ d2i_TS_ACCURACY; ++ DSO_global_lookup; ++ TS_CONF_set_tsa_name; ++ i2d_ASN1_SET_ANY; ++ ENGINE_load_gost; ++ WHIRLPOOL_BitUpdate; ++ ASN1_PCTX_get_flags; ++ TS_TST_INFO_get_ext_by_NID; ++ TS_RESP_new; ++ ESS_CERT_ID_dup; ++ TS_STATUS_INFO_dup; ++ TS_REQ_delete_ext; ++ EVP_DigestVerifyFinal; ++ EVP_PKEY_print_params; ++ i2d_CMS_bio_stream; ++ TS_REQ_get_msg_imprint; ++ OBJ_find_sigid_by_algs; ++ TS_TST_INFO_get_serial; ++ TS_REQ_get_nonce; ++ X509_PUBKEY_set0_param; ++ EVP_PKEY_CTX_set0_keygen_info; ++ DIST_POINT_set_dpname; ++ i2d_ISSUING_DIST_POINT; ++ ASN1_SET_ANY_it; ++ EVP_PKEY_CTX_get_data; ++ TS_STATUS_INFO_print_bio; ++ EVP_PKEY_derive_init; ++ d2i_TS_TST_INFO; ++ EVP_PKEY_asn1_add_alias; ++ d2i_TS_RESP_bio; ++ OTHERNAME_cmp; ++ GENERAL_NAME_set0_value; ++ PKCS7_RECIP_INFO_get0_alg; ++ TS_RESP_CTX_new; ++ TS_RESP_set_tst_info; ++ PKCS7_final; ++ EVP_PKEY_base_id; ++ TS_RESP_CTX_set_signer_cert; ++ TS_REQ_set_msg_imprint; ++ EVP_PKEY_CTX_ctrl; ++ TS_CONF_set_digests; ++ d2i_TS_MSG_IMPRINT; ++ EVP_PKEY_meth_set_ctrl; ++ TS_REQ_get_ext_by_NID; ++ PKCS5_pbe_set0_algor; ++ BN_BLINDING_thread_id; ++ TS_ACCURACY_new; ++ X509_CRL_METHOD_free; ++ ASN1_PCTX_get_nm_flags; ++ EVP_PKEY_meth_set_sign; ++ CRYPTO_THREADID_current; ++ EVP_PKEY_decrypt_init; ++ NETSCAPE_X509_free; ++ i2b_PVK_bio; ++ EVP_PKEY_print_private; ++ GENERAL_NAME_get0_value; ++ b2i_PVK_bio; ++ ASN1_UTCTIME_adj; ++ TS_TST_INFO_new; ++ EVP_MD_do_all_sorted; ++ TS_CONF_set_default_engine; ++ TS_ACCURACY_set_seconds; ++ TS_TST_INFO_get_time; ++ PKCS8_pkey_get0; ++ EVP_PKEY_asn1_get0; ++ OBJ_add_sigid; ++ PKCS7_SIGNER_INFO_sign; ++ EVP_PKEY_paramgen_init; ++ EVP_PKEY_sign; ++ OBJ_sigid_free; ++ EVP_PKEY_meth_set_init; ++ d2i_ESS_ISSUER_SERIAL; ++ ISSUING_DIST_POINT_new; ++ ASN1_TIME_adj; ++ TS_OBJ_print_bio; ++ EVP_PKEY_meth_set_verify_recover; ++ EVP_PKEY_meth_set_vrfy_recover; ++ TS_RESP_get_status_info; ++ CMS_stream; ++ EVP_PKEY_CTX_set_cb; ++ PKCS7_to_TS_TST_INFO; ++ ASN1_PCTX_get_oid_flags; ++ TS_TST_INFO_add_ext; ++ EVP_PKEY_meth_set_derive; ++ i2d_TS_RESP_fp; ++ i2d_TS_MSG_IMPRINT_bio; ++ TS_RESP_CTX_set_accuracy; ++ TS_REQ_set_nonce; ++ ESS_CERT_ID_new; ++ ENGINE_pkey_asn1_find_str; ++ TS_REQ_get_ext_count; ++ BUF_reverse; ++ TS_TST_INFO_print_bio; ++ d2i_ISSUING_DIST_POINT; ++ ENGINE_get_pkey_meths; ++ i2b_PrivateKey_bio; ++ i2d_TS_RESP; ++ b2i_PublicKey; ++ TS_VERIFY_CTX_cleanup; ++ TS_STATUS_INFO_free; ++ TS_RESP_verify_token; ++ OBJ_bsearch_ex_; ++ ASN1_bn_print; ++ EVP_PKEY_asn1_get_count; ++ ENGINE_register_pkey_asn1_meths; ++ ASN1_PCTX_set_nm_flags; ++ EVP_DigestVerifyInit; ++ ENGINE_set_default_pkey_meths; ++ TS_TST_INFO_get_policy_id; ++ TS_REQ_get_cert_req; ++ X509_CRL_set_meth_data; ++ PKCS8_pkey_set0; ++ ASN1_STRING_copy; ++ d2i_TS_TST_INFO_fp; ++ X509_CRL_match; ++ EVP_PKEY_asn1_set_private; ++ TS_TST_INFO_get_ext_d2i; ++ TS_RESP_CTX_add_policy; ++ d2i_TS_RESP; ++ TS_CONF_load_certs; ++ TS_TST_INFO_get_msg_imprint; ++ ERR_load_TS_strings; ++ TS_TST_INFO_get_version; ++ EVP_PKEY_CTX_dup; ++ EVP_PKEY_meth_set_verify; ++ i2b_PublicKey_bio; ++ TS_CONF_set_certs; ++ EVP_PKEY_asn1_get0_info; ++ TS_VERIFY_CTX_free; ++ TS_REQ_get_ext_by_critical; ++ TS_RESP_CTX_set_serial_cb; ++ X509_CRL_get_meth_data; ++ TS_RESP_CTX_set_time_cb; ++ TS_MSG_IMPRINT_get_msg; ++ TS_TST_INFO_ext_free; ++ TS_REQ_get_version; ++ TS_REQ_add_ext; ++ EVP_PKEY_CTX_set_app_data; ++ OBJ_bsearch_; ++ EVP_PKEY_meth_set_verifyctx; ++ i2d_PKCS7_bio_stream; ++ CRYPTO_THREADID_set_numeric; ++ PKCS7_sign_add_signer; ++ d2i_TS_TST_INFO_bio; ++ TS_TST_INFO_get_ordering; ++ TS_RESP_print_bio; ++ TS_TST_INFO_get_exts; ++ HMAC_CTX_copy; ++ PKCS5_pbe2_set_iv; ++ ENGINE_get_pkey_asn1_meths; ++ b2i_PrivateKey; ++ EVP_PKEY_CTX_get_app_data; ++ TS_REQ_set_cert_req; ++ CRYPTO_THREADID_set_callback; ++ TS_CONF_set_serial; ++ TS_TST_INFO_free; ++ d2i_TS_REQ_fp; ++ TS_RESP_verify_response; ++ i2d_ESS_ISSUER_SERIAL; ++ TS_ACCURACY_get_seconds; ++ EVP_CIPHER_do_all; ++ b2i_PrivateKey_bio; ++ OCSP_CERTID_dup; ++ X509_PUBKEY_get0_param; ++ TS_MSG_IMPRINT_dup; ++ PKCS7_print_ctx; ++ i2d_TS_REQ_bio; ++ EVP_whirlpool; ++ EVP_PKEY_asn1_set_param; ++ EVP_PKEY_meth_set_encrypt; ++ ASN1_PCTX_set_flags; ++ i2d_ESS_CERT_ID; ++ TS_VERIFY_CTX_new; ++ TS_RESP_CTX_set_extension_cb; ++ ENGINE_register_all_pkey_meths; ++ TS_RESP_CTX_set_status_info_cond; ++ TS_RESP_CTX_set_stat_info_cond; ++ EVP_PKEY_verify; ++ WHIRLPOOL_Final; ++ X509_CRL_METHOD_new; ++ EVP_DigestSignFinal; ++ TS_RESP_CTX_set_def_policy; ++ NETSCAPE_X509_it; ++ TS_RESP_create_response; ++ PKCS7_SIGNER_INFO_get0_algs; ++ TS_TST_INFO_get_nonce; ++ EVP_PKEY_decrypt_old; ++ TS_TST_INFO_set_policy_id; ++ TS_CONF_set_ess_cert_id_chain; ++ EVP_PKEY_CTX_get0_pkey; ++ d2i_TS_REQ; ++ EVP_PKEY_asn1_find_str; ++ BIO_f_asn1; ++ ESS_SIGNING_CERT_new; ++ EVP_PBE_find; ++ X509_CRL_get0_by_cert; ++ EVP_PKEY_derive; ++ i2d_TS_REQ; ++ TS_TST_INFO_delete_ext; ++ ESS_ISSUER_SERIAL_free; ++ ASN1_PCTX_set_str_flags; ++ ENGINE_get_pkey_asn1_meth_str; ++ TS_CONF_set_signer_key; ++ TS_ACCURACY_get_millis; ++ TS_RESP_get_token; ++ TS_ACCURACY_dup; ++ ENGINE_register_all_pkey_asn1_meths; ++ ENGINE_reg_all_pkey_asn1_meths; ++ X509_CRL_set_default_method; ++ CRYPTO_THREADID_hash; ++ CMS_ContentInfo_print_ctx; ++ TS_RESP_free; ++ ISSUING_DIST_POINT_free; ++ ESS_ISSUER_SERIAL_new; ++ CMS_add1_crl; ++ PKCS7_add1_attrib_digest; ++ TS_RESP_CTX_add_md; ++ TS_TST_INFO_dup; ++ ENGINE_set_pkey_asn1_meths; ++ PEM_write_bio_Parameters; ++ TS_TST_INFO_get_accuracy; ++ X509_CRL_get0_by_serial; ++ TS_TST_INFO_set_version; ++ TS_RESP_CTX_get_tst_info; ++ TS_RESP_verify_signature; ++ CRYPTO_THREADID_get_callback; ++ TS_TST_INFO_get_tsa; ++ TS_STATUS_INFO_new; ++ EVP_PKEY_CTX_get_cb; ++ TS_REQ_get_ext_d2i; ++ GENERAL_NAME_set0_othername; ++ TS_TST_INFO_get_ext_count; ++ TS_RESP_CTX_get_request; ++ i2d_NETSCAPE_X509; ++ ENGINE_get_pkey_meth_engine; ++ EVP_PKEY_meth_set_signctx; ++ EVP_PKEY_asn1_copy; ++ ASN1_TYPE_cmp; ++ EVP_CIPHER_do_all_sorted; ++ EVP_PKEY_CTX_free; ++ ISSUING_DIST_POINT_it; ++ d2i_TS_MSG_IMPRINT_fp; ++ X509_STORE_get1_certs; ++ EVP_PKEY_CTX_get_operation; ++ d2i_ESS_SIGNING_CERT; ++ TS_CONF_set_ordering; ++ EVP_PBE_alg_add_type; ++ TS_REQ_set_version; ++ EVP_PKEY_get0; ++ BIO_asn1_set_suffix; ++ i2d_TS_STATUS_INFO; ++ EVP_MD_do_all; ++ TS_TST_INFO_set_accuracy; ++ PKCS7_add_attrib_content_type; ++ ERR_remove_thread_state; ++ EVP_PKEY_meth_add0; ++ TS_TST_INFO_set_tsa; ++ EVP_PKEY_meth_new; ++ WHIRLPOOL_Update; ++ TS_CONF_set_accuracy; ++ ASN1_PCTX_set_oid_flags; ++ ESS_SIGNING_CERT_dup; ++ d2i_TS_REQ_bio; ++ X509_time_adj_ex; ++ TS_RESP_CTX_add_flags; ++ d2i_TS_STATUS_INFO; ++ TS_MSG_IMPRINT_set_msg; ++ BIO_asn1_get_suffix; ++ TS_REQ_free; ++ EVP_PKEY_meth_free; ++ TS_REQ_get_exts; ++ TS_RESP_CTX_set_clock_precision_digits; ++ TS_RESP_CTX_set_clk_prec_digits; ++ TS_RESP_CTX_add_failure_info; ++ i2d_TS_RESP_bio; ++ EVP_PKEY_CTX_get0_peerkey; ++ PEM_write_bio_CMS_stream; ++ TS_REQ_new; ++ TS_MSG_IMPRINT_new; ++ EVP_PKEY_meth_find; ++ EVP_PKEY_id; ++ TS_TST_INFO_set_serial; ++ a2i_GENERAL_NAME; ++ TS_CONF_set_crypto_device; ++ EVP_PKEY_verify_init; ++ TS_CONF_set_policies; ++ ASN1_PCTX_new; ++ ESS_CERT_ID_free; ++ ENGINE_unregister_pkey_meths; ++ TS_MSG_IMPRINT_free; ++ TS_VERIFY_CTX_init; ++ PKCS7_stream; ++ TS_RESP_CTX_set_certs; ++ TS_CONF_set_def_policy; ++ ASN1_GENERALIZEDTIME_adj; ++ NETSCAPE_X509_new; ++ TS_ACCURACY_free; ++ TS_RESP_get_tst_info; ++ EVP_PKEY_derive_set_peer; ++ PEM_read_bio_Parameters; ++ TS_CONF_set_clock_precision_digits; ++ TS_CONF_set_clk_prec_digits; ++ ESS_ISSUER_SERIAL_dup; ++ TS_ACCURACY_get_micros; ++ ASN1_PCTX_get_str_flags; ++ NAME_CONSTRAINTS_check; ++ ASN1_BIT_STRING_check; ++ X509_check_akid; ++ ENGINE_unregister_pkey_asn1_meths; ++ ENGINE_unreg_pkey_asn1_meths; ++ ASN1_PCTX_free; ++ PEM_write_bio_ASN1_stream; ++ i2d_ASN1_bio_stream; ++ TS_X509_ALGOR_print_bio; ++ EVP_PKEY_meth_set_cleanup; ++ EVP_PKEY_asn1_free; ++ ESS_SIGNING_CERT_free; ++ TS_TST_INFO_set_msg_imprint; ++ GENERAL_NAME_cmp; ++ d2i_ASN1_SET_ANY; ++ ENGINE_set_pkey_meths; ++ i2d_TS_REQ_fp; ++ d2i_ASN1_SEQUENCE_ANY; ++ GENERAL_NAME_get0_otherName; ++ d2i_ESS_CERT_ID; ++ OBJ_find_sigid_algs; ++ EVP_PKEY_meth_set_keygen; ++ PKCS5_PBKDF2_HMAC; ++ EVP_PKEY_paramgen; ++ EVP_PKEY_meth_set_paramgen; ++ BIO_new_PKCS7; ++ EVP_PKEY_verify_recover; ++ TS_ext_print_bio; ++ TS_ASN1_INTEGER_print_bio; ++ check_defer; ++ DSO_pathbyaddr; ++ EVP_PKEY_set_type; ++ TS_ACCURACY_set_micros; ++ TS_REQ_to_TS_VERIFY_CTX; ++ EVP_PKEY_meth_set_copy; ++ ASN1_PCTX_set_cert_flags; ++ TS_TST_INFO_get_ext; ++ EVP_PKEY_asn1_set_ctrl; ++ TS_TST_INFO_get_ext_by_critical; ++ EVP_PKEY_CTX_new_id; ++ TS_REQ_get_ext_by_OBJ; ++ TS_CONF_set_signer_cert; ++ X509_NAME_hash_old; ++ ASN1_TIME_set_string; ++ EVP_MD_flags; ++ TS_RESP_CTX_free; ++ DSAparams_dup; ++ DHparams_dup; ++ OCSP_REQ_CTX_add1_header; ++ OCSP_REQ_CTX_set1_req; ++ X509_STORE_set_verify_cb; ++ X509_STORE_CTX_get0_current_crl; ++ X509_STORE_CTX_get0_parent_ctx; ++ X509_STORE_CTX_get0_current_issuer; ++ X509_STORE_CTX_get0_cur_issuer; ++ X509_issuer_name_hash_old; ++ X509_subject_name_hash_old; ++ EVP_CIPHER_CTX_copy; ++ UI_method_get_prompt_constructor; ++ UI_method_get_prompt_constructr; ++ UI_method_set_prompt_constructor; ++ UI_method_set_prompt_constructr; ++ EVP_read_pw_string_min; ++ CRYPTO_cts128_encrypt; ++ CRYPTO_cts128_decrypt_block; ++ CRYPTO_cfb128_1_encrypt; ++ CRYPTO_cbc128_encrypt; ++ CRYPTO_ctr128_encrypt; ++ CRYPTO_ofb128_encrypt; ++ CRYPTO_cts128_decrypt; ++ CRYPTO_cts128_encrypt_block; ++ CRYPTO_cbc128_decrypt; ++ CRYPTO_cfb128_encrypt; ++ CRYPTO_cfb128_8_encrypt; ++ ++ local: ++ *; ++}; ++ ++ ++OPENSSL_1.0.1 { ++ global: ++ SSL_renegotiate_abbreviated; ++ TLSv1_1_method; ++ TLSv1_1_client_method; ++ TLSv1_1_server_method; ++ SSL_CTX_set_srp_client_pwd_callback; ++ SSL_CTX_set_srp_client_pwd_cb; ++ SSL_get_srp_g; ++ SSL_CTX_set_srp_username_callback; ++ SSL_CTX_set_srp_un_cb; ++ SSL_get_srp_userinfo; ++ SSL_set_srp_server_param; ++ SSL_set_srp_server_param_pw; ++ SSL_get_srp_N; ++ SSL_get_srp_username; ++ SSL_CTX_set_srp_password; ++ SSL_CTX_set_srp_strength; ++ SSL_CTX_set_srp_verify_param_callback; ++ SSL_CTX_set_srp_vfy_param_cb; ++ SSL_CTX_set_srp_cb_arg; ++ SSL_CTX_set_srp_username; ++ SSL_CTX_SRP_CTX_init; ++ SSL_SRP_CTX_init; ++ SRP_Calc_A_param; ++ SRP_generate_server_master_secret; ++ SRP_gen_server_master_secret; ++ SSL_CTX_SRP_CTX_free; ++ SRP_generate_client_master_secret; ++ SRP_gen_client_master_secret; ++ SSL_srp_server_param_with_username; ++ SSL_srp_server_param_with_un; ++ SSL_SRP_CTX_free; ++ SSL_set_debug; ++ SSL_SESSION_get0_peer; ++ TLSv1_2_client_method; ++ SSL_SESSION_set1_id_context; ++ TLSv1_2_server_method; ++ SSL_cache_hit; ++ SSL_get0_kssl_ctx; ++ SSL_set0_kssl_ctx; ++ SSL_set_state; ++ SSL_CIPHER_get_id; ++ TLSv1_2_method; ++ kssl_ctx_get0_client_princ; ++ SSL_export_keying_material; ++ SSL_set_tlsext_use_srtp; ++ SSL_CTX_set_next_protos_advertised_cb; ++ SSL_CTX_set_next_protos_adv_cb; ++ SSL_get0_next_proto_negotiated; ++ SSL_get_selected_srtp_profile; ++ SSL_CTX_set_tlsext_use_srtp; ++ SSL_select_next_proto; ++ SSL_get_srtp_profiles; ++ SSL_CTX_set_next_proto_select_cb; ++ SSL_CTX_set_next_proto_sel_cb; ++ SSL_SESSION_get_compress_id; ++ ++ SRP_VBASE_get_by_user; ++ SRP_Calc_server_key; ++ SRP_create_verifier; ++ SRP_create_verifier_BN; ++ SRP_Calc_u; ++ SRP_VBASE_free; ++ SRP_Calc_client_key; ++ SRP_get_default_gN; ++ SRP_Calc_x; ++ SRP_Calc_B; ++ SRP_VBASE_new; ++ SRP_check_known_gN_param; ++ SRP_Calc_A; ++ SRP_Verify_A_mod_N; ++ SRP_VBASE_init; ++ SRP_Verify_B_mod_N; ++ EC_KEY_set_public_key_affine_coordinates; ++ EC_KEY_set_pub_key_aff_coords; ++ EVP_aes_192_ctr; ++ EVP_PKEY_meth_get0_info; ++ EVP_PKEY_meth_copy; ++ ERR_add_error_vdata; ++ EVP_aes_128_ctr; ++ EVP_aes_256_ctr; ++ EC_GFp_nistp224_method; ++ EC_KEY_get_flags; ++ RSA_padding_add_PKCS1_PSS_mgf1; ++ EVP_aes_128_xts; ++ EVP_aes_256_xts; ++ EVP_aes_128_gcm; ++ EC_KEY_clear_flags; ++ EC_KEY_set_flags; ++ EVP_aes_256_ccm; ++ RSA_verify_PKCS1_PSS_mgf1; ++ EVP_aes_128_ccm; ++ EVP_aes_192_gcm; ++ X509_ALGOR_set_md; ++ RAND_init_fips; ++ EVP_aes_256_gcm; ++ EVP_aes_192_ccm; ++ CMAC_CTX_copy; ++ CMAC_CTX_free; ++ CMAC_CTX_get0_cipher_ctx; ++ CMAC_CTX_cleanup; ++ CMAC_Init; ++ CMAC_Update; ++ CMAC_resume; ++ CMAC_CTX_new; ++ CMAC_Final; ++ CRYPTO_ctr128_encrypt_ctr32; ++ CRYPTO_gcm128_release; ++ CRYPTO_ccm128_decrypt_ccm64; ++ CRYPTO_ccm128_encrypt; ++ CRYPTO_gcm128_encrypt; ++ CRYPTO_xts128_encrypt; ++ EVP_rc4_hmac_md5; ++ CRYPTO_nistcts128_decrypt_block; ++ CRYPTO_gcm128_setiv; ++ CRYPTO_nistcts128_encrypt; ++ EVP_aes_128_cbc_hmac_sha1; ++ CRYPTO_gcm128_tag; ++ CRYPTO_ccm128_encrypt_ccm64; ++ ENGINE_load_rdrand; ++ CRYPTO_ccm128_setiv; ++ CRYPTO_nistcts128_encrypt_block; ++ CRYPTO_gcm128_aad; ++ CRYPTO_ccm128_init; ++ CRYPTO_nistcts128_decrypt; ++ CRYPTO_gcm128_new; ++ CRYPTO_ccm128_tag; ++ CRYPTO_ccm128_decrypt; ++ CRYPTO_ccm128_aad; ++ CRYPTO_gcm128_init; ++ CRYPTO_gcm128_decrypt; ++ ENGINE_load_rsax; ++ CRYPTO_gcm128_decrypt_ctr32; ++ CRYPTO_gcm128_encrypt_ctr32; ++ CRYPTO_gcm128_finish; ++ EVP_aes_256_cbc_hmac_sha1; ++ PKCS5_pbkdf2_set; ++ CMS_add0_recipient_password; ++ CMS_decrypt_set1_password; ++ CMS_RecipientInfo_set0_password; ++ RAND_set_fips_drbg_type; ++ X509_REQ_sign_ctx; ++ RSA_PSS_PARAMS_new; ++ X509_CRL_sign_ctx; ++ X509_signature_dump; ++ d2i_RSA_PSS_PARAMS; ++ RSA_PSS_PARAMS_it; ++ RSA_PSS_PARAMS_free; ++ X509_sign_ctx; ++ i2d_RSA_PSS_PARAMS; ++ ASN1_item_sign_ctx; ++ EC_GFp_nistp521_method; ++ EC_GFp_nistp256_method; ++ OPENSSL_stderr; ++ OPENSSL_cpuid_setup; ++ OPENSSL_showfatal; ++ BIO_new_dgram_sctp; ++ BIO_dgram_sctp_msg_waiting; ++ BIO_dgram_sctp_wait_for_dry; ++ BIO_s_datagram_sctp; ++ BIO_dgram_is_sctp; ++ BIO_dgram_sctp_notification_cb; ++} OPENSSL_1.0.0; ++ ++OPENSSL_1.0.1d { ++ global: ++ CRYPTO_memcmp; ++} OPENSSL_1.0.1; ++ ++OPENSSL_1.0.2 { ++ global: ++ SSL_CTX_set_alpn_protos; ++ SSL_set_alpn_protos; ++ SSL_CTX_set_alpn_select_cb; ++ SSL_get0_alpn_selected; ++ SSL_CTX_set_custom_cli_ext; ++ SSL_CTX_set_custom_srv_ext; ++ SSL_CTX_set_srv_supp_data; ++ SSL_CTX_set_cli_supp_data; ++ SSL_set_cert_cb; ++ SSL_CTX_use_serverinfo; ++ SSL_CTX_use_serverinfo_file; ++ SSL_CTX_set_cert_cb; ++ SSL_CTX_get0_param; ++ SSL_get0_param; ++ SSL_certs_clear; ++ DTLSv1_2_method; ++ DTLSv1_2_server_method; ++ DTLSv1_2_client_method; ++ DTLS_method; ++ DTLS_server_method; ++ DTLS_client_method; ++ SSL_CTX_get_ssl_method; ++ SSL_CTX_get0_certificate; ++ SSL_CTX_get0_privatekey; ++ SSL_COMP_set0_compression_methods; ++ SSL_COMP_free_compression_methods; ++ SSL_CIPHER_find; ++ SSL_is_server; ++ SSL_CONF_CTX_new; ++ SSL_CONF_CTX_finish; ++ SSL_CONF_CTX_free; ++ SSL_CONF_CTX_set_flags; ++ SSL_CONF_CTX_clear_flags; ++ SSL_CONF_CTX_set1_prefix; ++ SSL_CONF_CTX_set_ssl; ++ SSL_CONF_CTX_set_ssl_ctx; ++ SSL_CONF_cmd; ++ SSL_CONF_cmd_argv; ++ SSL_CONF_cmd_value_type; ++ SSL_trace; ++ SSL_CIPHER_standard_name; ++ SSL_get_tlsa_record_byname; ++ ASN1_TIME_diff; ++ BIO_hex_string; ++ CMS_RecipientInfo_get0_pkey_ctx; ++ CMS_RecipientInfo_encrypt; ++ CMS_SignerInfo_get0_pkey_ctx; ++ CMS_SignerInfo_get0_md_ctx; ++ CMS_SignerInfo_get0_signature; ++ CMS_RecipientInfo_kari_get0_alg; ++ CMS_RecipientInfo_kari_get0_reks; ++ CMS_RecipientInfo_kari_get0_orig_id; ++ CMS_RecipientInfo_kari_orig_id_cmp; ++ CMS_RecipientEncryptedKey_get0_id; ++ CMS_RecipientEncryptedKey_cert_cmp; ++ CMS_RecipientInfo_kari_set0_pkey; ++ CMS_RecipientInfo_kari_get0_ctx; ++ CMS_RecipientInfo_kari_decrypt; ++ CMS_SharedInfo_encode; ++ DH_compute_key_padded; ++ d2i_DHxparams; ++ i2d_DHxparams; ++ DH_get_1024_160; ++ DH_get_2048_224; ++ DH_get_2048_256; ++ DH_KDF_X9_42; ++ ECDH_KDF_X9_62; ++ ECDSA_METHOD_new; ++ ECDSA_METHOD_free; ++ ECDSA_METHOD_set_app_data; ++ ECDSA_METHOD_get_app_data; ++ ECDSA_METHOD_set_sign; ++ ECDSA_METHOD_set_sign_setup; ++ ECDSA_METHOD_set_verify; ++ ECDSA_METHOD_set_flags; ++ ECDSA_METHOD_set_name; ++ EVP_des_ede3_wrap; ++ EVP_aes_128_wrap; ++ EVP_aes_192_wrap; ++ EVP_aes_256_wrap; ++ EVP_aes_128_cbc_hmac_sha256; ++ EVP_aes_256_cbc_hmac_sha256; ++ CRYPTO_128_wrap; ++ CRYPTO_128_unwrap; ++ OCSP_REQ_CTX_nbio; ++ OCSP_REQ_CTX_new; ++ OCSP_set_max_response_length; ++ OCSP_REQ_CTX_i2d; ++ OCSP_REQ_CTX_nbio_d2i; ++ OCSP_REQ_CTX_get0_mem_bio; ++ OCSP_REQ_CTX_http; ++ RSA_padding_add_PKCS1_OAEP_mgf1; ++ RSA_padding_check_PKCS1_OAEP_mgf1; ++ RSA_OAEP_PARAMS_free; ++ RSA_OAEP_PARAMS_it; ++ RSA_OAEP_PARAMS_new; ++ SSL_get_sigalgs; ++ SSL_get_shared_sigalgs; ++ SSL_check_chain; ++ X509_chain_up_ref; ++ X509_http_nbio; ++ X509_CRL_http_nbio; ++ X509_REVOKED_dup; ++ i2d_re_X509_tbs; ++ X509_get0_signature; ++ X509_get_signature_nid; ++ X509_CRL_diff; ++ X509_chain_check_suiteb; ++ X509_CRL_check_suiteb; ++ X509_check_host; ++ X509_check_email; ++ X509_check_ip; ++ X509_check_ip_asc; ++ X509_STORE_set_lookup_crls_cb; ++ X509_STORE_CTX_get0_store; ++ X509_VERIFY_PARAM_set1_host; ++ X509_VERIFY_PARAM_add1_host; ++ X509_VERIFY_PARAM_set_hostflags; ++ X509_VERIFY_PARAM_get0_peername; ++ X509_VERIFY_PARAM_set1_email; ++ X509_VERIFY_PARAM_set1_ip; ++ X509_VERIFY_PARAM_set1_ip_asc; ++ X509_VERIFY_PARAM_get0_name; ++ X509_VERIFY_PARAM_get_count; ++ X509_VERIFY_PARAM_get0; ++ X509V3_EXT_free; ++ EC_GROUP_get_mont_data; ++ EC_curve_nid2nist; ++ EC_curve_nist2nid; ++ PEM_write_bio_DHxparams; ++ PEM_write_DHxparams; ++ SSL_CTX_add_client_custom_ext; ++ SSL_CTX_add_server_custom_ext; ++ SSL_extension_supported; ++ BUF_strnlen; ++ sk_deep_copy; ++ SSL_test_functions; ++ ++ local: ++ *; ++} OPENSSL_1.0.1d; ++ ++OPENSSL_1.0.2g { ++ global: ++ SRP_VBASE_get1_by_user; ++ SRP_user_pwd_free; ++} OPENSSL_1.0.2; ++ +Index: openssl-1.0.2~beta1.obsolete.0.0498436515490575/engines/openssl.ld +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ openssl-1.0.2~beta1.obsolete.0.0498436515490575/engines/openssl.ld 2014-02-24 21:02:30.000000000 +0100 +@@ -0,0 +1,10 @@ ++OPENSSL_1.0.0 { ++ global: ++ bind_engine; ++ v_check; ++ OPENSSL_init; ++ OPENSSL_finish; ++ local: ++ *; ++}; ++ +Index: openssl-1.0.2~beta1.obsolete.0.0498436515490575/engines/ccgost/openssl.ld +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ openssl-1.0.2~beta1.obsolete.0.0498436515490575/engines/ccgost/openssl.ld 2014-02-24 21:02:30.000000000 +0100 +@@ -0,0 +1,10 @@ ++OPENSSL_1.0.0 { ++ global: ++ bind_engine; ++ v_check; ++ OPENSSL_init; ++ OPENSSL_finish; ++ local: ++ *; ++}; ++ diff --git a/meta-digi-dey/recipes-connectivity/openssl/openssl_%.bbappend b/meta-digi-dey/recipes-connectivity/openssl/openssl_%.bbappend index 5f35df7c2..22b25fbc0 100644 --- a/meta-digi-dey/recipes-connectivity/openssl/openssl_%.bbappend +++ b/meta-digi-dey/recipes-connectivity/openssl/openssl_%.bbappend @@ -6,8 +6,14 @@ CRYPTOCHIP_COMMON_PATCHES = " \ file://0003-Modify-openssl.cnf-to-automatically-load-the-cryptoc.patch \ " +SRC_URI_remove = " \ + file://debian1.0.2/version-script.patch \ + file://debian1.0.2/soname.patch \ +" + SRC_URI += " \ file://0001-cryptodev-Fix-issue-with-signature-generation.patch \ file://0002-cryptodev-allow-copying-EVP-contexts.patch \ ${@bb.utils.contains("MACHINE_FEATURES", "cryptochip", "${CRYPTOCHIP_COMMON_PATCHES}", "", d)} \ + file://version-script.patch \ " From 06f193f01156a608d3468939bf92480f3c59688d Mon Sep 17 00:00:00 2001 From: fgilmar Date: Tue, 9 Oct 2018 09:03:46 +0200 Subject: [PATCH 23/30] AWS Greengrass: add new recipe for AWS Greengrass core 1.6.0 https://jira.digi.com/browse/DEL-6189 Signed-off-by: fgilmar --- .../greengrass/greengrass_1.6.0.bb | 205 ++++++++++++++++++ 1 file changed, 205 insertions(+) create mode 100644 meta-digi-dey/recipes-aws/greengrass/greengrass_1.6.0.bb diff --git a/meta-digi-dey/recipes-aws/greengrass/greengrass_1.6.0.bb b/meta-digi-dey/recipes-aws/greengrass/greengrass_1.6.0.bb new file mode 100644 index 000000000..f1180322d --- /dev/null +++ b/meta-digi-dey/recipes-aws/greengrass/greengrass_1.6.0.bb @@ -0,0 +1,205 @@ +# Copyright (C) 2018, Digi International Inc. + +SUMMARY = "AWS IoT Greengrass core" +HOMEPAGE = "https://aws.amazon.com/greengrass/" +# +# The package includes different licenses: +# +# [Apache-2.0] +# ggc/core/LICENSE/attributions/github_aws_aws_sdk_go_License.txt +# ggc/core/LICENSE/attributions/github_coreos_go_systemd_License.txt +# ggc/core/LICENSE/attributions/github_docker_docker_License.txt +# ggc/core/LICENSE/attributions/github_docker_go_units_License.txt +# ggc/core/LICENSE/attributions/github_go_ini_ini_License.txt +# ggc/core/LICENSE/attributions/github_jmespath_go_jmespath_License.txt +# ggc/core/LICENSE/attributions/github_opencontainers_runc_License.txt +# ggc/core/LICENSE/attributions/github_opencontainers_runtime_spec_License.txt +# ggc/core/LICENSE/attributions/github_pquerna_ffjson_License.txt +# ggc/core/LICENSE/attributions/github_vishvananda_netlink_License.txt +# [BSD-2-Clause] +# ggc/core/LICENSE/attributions/github_godbus_dbus_License.txt +# ggc/core/LICENSE/attributions/github_huin_gobinarytest_License.txt +# ggc/core/LICENSE/attributions/github_seccomp_libseccomp_golang_License.txt +# ggc/core/LICENSE/attributions/github_syndtr_gocapability_License.txt +# [BSD-3-Clause] +# ggc/core/LICENSE/attributions/github_fsnotify_fsnotify_License.txt +# ggc/core/LICENSE/attributions/github_golang_protobuf_License.txt +# ggc/core/LICENSE/attributions/github_jeffallen_mqtt_License.txt +# ggc/core/LICENSE/attributions/Golang_License.txt +# [ECLIPSE] +# ggc/core/LICENSE/attributions/github_paho_mqtt_License.txt +# [MIT] +# ggc/core/LICENSE/attributions/github_huin_mqtt_License.txt +# ggc/core/LICENSE/attributions/github_mattn_go_sqlite3_License.txt +# ggc/core/LICENSE/attributions/github_nu7hatch_gouuid_License.txt +# ggc/core/LICENSE/attributions/github_Sirupsen_logrus_License.txt +# ggc/core/LICENSE/attributions/github_urfave_cli_License.txt +# [Proprietary] +# ggc/core/LICENSE/Greengrass AWS SW License (IoT additiona) vr6.txt +# [Copyright-Only Decication] +# ggc/core/LICENSE/attributions/libb64_sourceforge_License.txt + +LICENSE = "Apache-2.0 | BSD-2-Clause | BSD-3-Clause | MIT | PD | Proprietary" +LIC_FILES_CHKSUM = " \ + file://ggc/core/LICENSE/attributions/curl_haxx_se_License.txt;md5=3b77a99e8530d6c9ccc9aab9a7436f99 \ + file://ggc/core/LICENSE/attributions/github_aws_aws_sdk_go_License.txt;md5=d273d63619c9aeaf15cdaf76422c4f87 \ + file://ggc/core/LICENSE/attributions/github_coreos_go_systemd_License.txt;md5=715f3348ed8b9bf4fac3b08133384a4d \ + file://ggc/core/LICENSE/attributions/github_docker_docker_License.txt;md5=bba4ee48af378e39b452d742d29c710b \ + file://ggc/core/LICENSE/attributions/github_docker_go_units_License.txt;md5=bb99db20f1c48c2c4952c27c72855e36 \ + file://ggc/core/LICENSE/attributions/github_fsnotify_fsnotify_License.txt;md5=c38914c9a7ab03bb2b96d4baaee10769 \ + file://ggc/core/LICENSE/attributions/github_godbus_dbus_License.txt;md5=b03a62440372a9acf9692ad365932c87 \ + file://ggc/core/LICENSE/attributions/github_go_ini_ini_License.txt;md5=715f3348ed8b9bf4fac3b08133384a4d \ + file://ggc/core/LICENSE/attributions/github_golang_protobuf_License.txt;md5=16fe162f7848190010b6ec7bfaac030a \ + file://ggc/core/LICENSE/attributions/github_huin_gobinarytest_License.txt;md5=f2b3138d9d314bccf5297dea7e3e6d14 \ + file://ggc/core/LICENSE/attributions/github_huin_mqtt_License.txt;md5=12fd125064676697934b7d8c09bed0e8 \ + file://ggc/core/LICENSE/attributions/github_jeffallen_mqtt_License.txt;md5=b7269d52765d477e10f319c19d8a9d33 \ + file://ggc/core/LICENSE/attributions/github_jmespath_go_jmespath_License.txt;md5=640d33f0070c9dc3a194d2ed7db02974 \ + file://ggc/core/LICENSE/attributions/github_mattn_go_sqlite3_License.txt;md5=948f36a2300ac729e60416063190f664 \ + file://ggc/core/LICENSE/attributions/github_nu7hatch_gouuid_License.txt;md5=6b18748dcc29fda05fa5aaef44d517fd \ + file://ggc/core/LICENSE/attributions/github_opencontainers_runc_License.txt;md5=587c01b2dcc5dc3b4bed51b918c64731 \ + file://ggc/core/LICENSE/attributions/github_opencontainers_runtime_spec_License.txt;md5=ef95ed297310c3d09ba16c06d5e161a5 \ + file://ggc/core/LICENSE/attributions/github_paho_mqtt_License.txt;md5=655315b482a5955efb91d34de332ee48 \ + file://ggc/core/LICENSE/attributions/github_pquerna_ffjson_License.txt;md5=d273d63619c9aeaf15cdaf76422c4f87 \ + file://ggc/core/LICENSE/attributions/github_seccomp_libseccomp_golang_License.txt;md5=9205c4c469bfb9d3a63f346539ee445b \ + file://ggc/core/LICENSE/attributions/github_Sirupsen_logrus_License.txt;md5=29baae91637760ae68feb57ca93e5a0a \ + file://ggc/core/LICENSE/attributions/github_syndtr_gocapability_License.txt;md5=321f58fa53a0b1bb9a887f14660d436b \ + file://ggc/core/LICENSE/attributions/github_urfave_cli_License.txt;md5=f1f14a2449300559aed90bedc36a71ed \ + file://ggc/core/LICENSE/attributions/github_vishvananda_netlink_License.txt;md5=c95fd0efd62139c155e956a448df8fd6 \ + file://ggc/core/LICENSE/attributions/Golang_License.txt;md5=3d7ed06383c65a3161b36c6a0b0b98f5 \ + file://ggc/core/LICENSE/attributions/libb64_sourceforge_License.txt;md5=0f8f14bb84b17652f29aad01072e545f \ + file://ggc/core/LICENSE/attributions/sqlite_org_License.txt;md5=380e2694a297aa32879ca2ae9c6c029b\ +" + +# Bitbake does not support spaces in filenames, but GG License does have spaces, +# so workaround the problem by renaming the file before using it. +GG_LIC_FILENAME = "Greengrass AWS SW License (IoT additional) vr6.txt" +GG_LIC_FILENAME_NOSPACES = "${@d.getVar('GG_LIC_FILENAME', True).replace(' ','_')}" +LIC_FILES_CHKSUM += "file://ggc/core/LICENSE/${GG_LIC_FILENAME_NOSPACES};md5=7df5bf535d02b2f83c260250fe330b6c" + +SRC_URI = " \ + http:///not/exist/greengrass-linux-armv7l-${PV}.tar.gz \ + file://greengrass-init \ +" +SRC_URI[md5sum] = "93ae820af2bf2527bafdb34598d174ed" +SRC_URI[sha256sum] ="8fe99ba17917df2e192b7065e400e2dc85c4a0fbf7654fa0d141642cde92d88f" + +GG_TARBALL_LOCAL_PATH ?= "" + +# The tarball is only available for downloading after registration, so provide +# a PREMIRROR to a local directory that can be configured in the project's +# local.conf file using GG_TARBALL_LOCAL_PATH variable. +python() { + gg_tarball_local_path = d.getVar('GG_TARBALL_LOCAL_PATH', True) + if gg_tarball_local_path: + premirrors = d.getVar('PREMIRRORS', True) + d.setVar('PREMIRRORS', "http:///not/exist/greengrass.* file://%s \\n %s" % (gg_tarball_local_path, premirrors)) +} + +S = "${WORKDIR}/${BPN}" + +inherit aws-iot update-rc.d useradd + +GG_USESYSTEMD = "${@bb.utils.contains('DISTRO_FEATURES', 'systemd', 'yes', 'no', d)}" + +# Rename GG license file +do_unpack[postfuncs] += "rename_license" +rename_license() { + cd ${S}/ggc/core/LICENSE/ + mv "${GG_LIC_FILENAME}" "${GG_LIC_FILENAME_NOSPACES}" +} + +# Disable tasks not needed for the binary package +do_configure[noexec] = "1" +do_compile[noexec] = "1" + +do_install() { + install -d ${D}/${BPN} + tar --no-same-owner --exclude='./patches' --exclude='./.pc' -cpf - -C ${S} . \ + | tar --no-same-owner -xpf - -C ${D}/${BPN} + + # Install wrapper bootscript to launch Greengrass core on boot + install -d ${D}${sysconfdir}/init.d + install -m 0755 ${WORKDIR}/greengrass-init ${D}${sysconfdir}/init.d/greengrass + sed -i -e "s,##GG_INSTALL_DIR##,/${BPN},g" ${D}${sysconfdir}/init.d/greengrass + + # If certificates do exist, install them and update the config file + if [ -f "${AWS_IOT_CERTS_DIR}/${AWS_GGCORE_ROOT_CA}" ] && \ + [ -f "${AWS_IOT_CERTS_DIR}/${AWS_GGCORE_CERTIFICATE}" ] && \ + [ -f "${AWS_IOT_CERTS_DIR}/${AWS_GGCORE_PRIVATE_KEY}" ]; then + install -m 0644 "${AWS_IOT_CERTS_DIR}/${AWS_GGCORE_ROOT_CA}" \ + "${AWS_IOT_CERTS_DIR}/${AWS_GGCORE_CERTIFICATE}" \ + "${AWS_IOT_CERTS_DIR}/${AWS_GGCORE_PRIVATE_KEY}" \ + ${D}/${BPN}/certs/ + sed -i -e "s,\[ROOT_CA_PEM_HERE],${AWS_GGCORE_ROOT_CA},g" \ + -e "s,\[CLOUD_PEM_CRT_HERE],${AWS_GGCORE_CERTIFICATE},g" \ + -e "s,\[CLOUD_PEM_KEY_HERE],${AWS_GGCORE_PRIVATE_KEY},g" \ + ${D}/${BPN}/config/config.json + fi + + # Configure the rest of GG Core parameters + [ -n "${AWS_GGCORE_THING_ARN}" ] && sed -i -e "s,\[THING_ARN_HERE],${AWS_GGCORE_THING_ARN},g" ${D}/${BPN}/config/config.json + if [ -n "${AWS_GGCORE_IOT_HOST}" ]; then + AWS_GGCORE_HOST_PREFIX="$(echo ${AWS_GGCORE_IOT_HOST} | sed -e 's,\([^.]\+\)\.iot.*,\1,g')" + AWS_GGCORE_REGION="$(echo ${AWS_GGCORE_IOT_HOST} | sed -e 's,.*.iot\.\([^.]\+\)\..*,\1,g')" + [ -n "${AWS_GGCORE_HOST_PREFIX}" ] && sed -i -e "s,\[HOST_PREFIX_HERE],${AWS_GGCORE_HOST_PREFIX},g" ${D}/${BPN}/config/config.json + [ -n "${AWS_GGCORE_REGION}" ] && sed -i -e "s,\[AWS_REGION_HERE],${AWS_GGCORE_REGION},g" ${D}/${BPN}/config/config.json + fi + + # Configure whether to use systemd or not + sed -i -e "/useSystemd/{s,\[yes|no],${GG_USESYSTEMD},g}" ${D}/${BPN}/config/config.json +} + +pkg_postinst_${PN}() { + # Enable protection for hardlinks and symlinks + if ! grep -qs 'protected_.*links' $D${sysconfdir}/sysctl.conf; then + cat >> $D${sysconfdir}/sysctl.conf <<-_EOF_ + # Greengrass: protect hardlinks/symlinks + fs.protected_hardlinks = 1 + fs.protected_symlinks = 1 + _EOF_ + fi + + # Customize '/etc/fstab' + if [ -f "$D${sysconfdir}/fstab" ]; then + # Disable TMPFS /var/volatile + sed -i -e '\#^tmpfs[[:blank:]]\+/var/volatile#s,^,#,g' $D${sysconfdir}/fstab + + # Mount a cgroup hierarchy with all available subsystems + if ! grep -qs '^cgroup' $D${sysconfdir}/fstab; then + cat >> $D${sysconfdir}/fstab <<-_EOF_ + # Greengrass: mount cgroups + cgroup /sys/fs/cgroup cgroup defaults 0 0 + _EOF_ + fi + fi + + # Disable '/etc/resolv.conf' symlink + if [ -f "$D${sysconfdir}/default/volatiles/00_core" ]; then + sed -i -e '/resolv.conf/d' $D${sysconfdir}/default/volatiles/00_core + cat >> $D${sysconfdir}/default/volatiles/00_core <<-_EOF_ + # Greengrass: create a real (no symlink) resolv.conf + f root root 0644 /etc/resolv.conf none + _EOF_ + fi +} + +FILES_${PN} = "/${BPN} ${sysconfdir}" + +CONFFILES_${PN} += "/${BPN}/config/config.json" + +INITSCRIPT_NAME = "greengrass" +INITSCRIPT_PARAMS = "defaults 80 20" + +USERADD_PACKAGES = "${PN}" +GROUPADD_PARAM_${PN} = "-r ggc_group" +USERADD_PARAM_${PN} = "-r -M -N -g ggc_group -s /bin/false ggc_user" + +# +# Disable failing QA checks: +# +# Binary was already stripped +# No GNU_HASH in the elf binary +# +INSANE_SKIP_${PN} += "already-stripped ldflags file-rdeps" + +RDEPENDS_${PN} += "ca-certificates python-argparse python-json python-numbers sqlite3" From 417b64c9492aa7a7f61d711efed60675175e79c7 Mon Sep 17 00:00:00 2001 From: fgilmar Date: Tue, 16 Oct 2018 12:46:34 +0200 Subject: [PATCH 24/30] greengrass: cc8x: add greengrass support for cc8 platform Signed-off-by: fgilmar --- .../recipes-aws/greengrass/greengrass_1.6.0.bb | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/meta-digi-dey/recipes-aws/greengrass/greengrass_1.6.0.bb b/meta-digi-dey/recipes-aws/greengrass/greengrass_1.6.0.bb index f1180322d..5846bc92d 100644 --- a/meta-digi-dey/recipes-aws/greengrass/greengrass_1.6.0.bb +++ b/meta-digi-dey/recipes-aws/greengrass/greengrass_1.6.0.bb @@ -76,12 +76,22 @@ GG_LIC_FILENAME = "Greengrass AWS SW License (IoT additional) vr6.txt" GG_LIC_FILENAME_NOSPACES = "${@d.getVar('GG_LIC_FILENAME', True).replace(' ','_')}" LIC_FILES_CHKSUM += "file://ggc/core/LICENSE/${GG_LIC_FILENAME_NOSPACES};md5=7df5bf535d02b2f83c260250fe330b6c" -SRC_URI = " \ - http:///not/exist/greengrass-linux-armv7l-${PV}.tar.gz \ +SRC_URI_arm = " \ + http:///not/exist/greengrass-linux-armv7l-${PV}.tar.gz;name=arm \ file://greengrass-init \ " -SRC_URI[md5sum] = "93ae820af2bf2527bafdb34598d174ed" -SRC_URI[sha256sum] ="8fe99ba17917df2e192b7065e400e2dc85c4a0fbf7654fa0d141642cde92d88f" + +SRC_URI[arm.md5sum] = "93ae820af2bf2527bafdb34598d174ed" +SRC_URI[arm.sha256sum] ="8fe99ba17917df2e192b7065e400e2dc85c4a0fbf7654fa0d141642cde92d88f" + +SRC_URI_aarch64 = " \ + http:///not/exist/greengrass-linux-aarch64-${PV}.tar.gz;name=aarch64 \ + file://greengrass-init \ +" + +# For ARCH64 we use another tarball. +SRC_URI[aarch64.md5sum] = "e4ec6dba43dcba4d2ec1b04d7c851cd3" +SRC_URI[aarch64.sha256sum] ="f45e502435850fb9a9931a46fd96329f95f53ff2d6d5aaa4bed11094c0237f4c" GG_TARBALL_LOCAL_PATH ?= "" From 52da594315df8ffd85ad8ced4aec98185f0aa9e9 Mon Sep 17 00:00:00 2001 From: Gonzalo Ruiz Date: Wed, 24 Oct 2018 13:59:55 +0200 Subject: [PATCH 25/30] alsa-state: update codec configuration for ccimx8x ADC connected to MIC2, INA and INB inputs. DAC connected to REC, SPK and HP outputs. Signed-off-by: Gonzalo Ruiz --- .../alsa-state/alsa-state.bbappend | 2 + .../alsa-state/alsa-state/ccimx8x/asound.conf | 276 +--- .../alsa-state/ccimx8x/asound.state | 1148 +++++++++++++++++ 3 files changed, 1157 insertions(+), 269 deletions(-) create mode 100644 meta-digi-arm/recipes-bsp/alsa-state/alsa-state/ccimx8x/asound.state diff --git a/meta-digi-arm/recipes-bsp/alsa-state/alsa-state.bbappend b/meta-digi-arm/recipes-bsp/alsa-state/alsa-state.bbappend index 261a71574..591606f34 100644 --- a/meta-digi-arm/recipes-bsp/alsa-state/alsa-state.bbappend +++ b/meta-digi-arm/recipes-bsp/alsa-state/alsa-state.bbappend @@ -12,6 +12,8 @@ SRC_URI_append_ccimx6 = " \ SRC_URI_append_ccimx6ul = " file://asound.state" +SRC_URI_append_ccimx8x = " file://asound.state" + do_install_append_ccimx6() { ln -sf asound.micro_play.state ${D}${localstatedir}/lib/alsa/asound.state } diff --git a/meta-digi-arm/recipes-bsp/alsa-state/alsa-state/ccimx8x/asound.conf b/meta-digi-arm/recipes-bsp/alsa-state/alsa-state/ccimx8x/asound.conf index 0084f4a0b..11c4cbba0 100644 --- a/meta-digi-arm/recipes-bsp/alsa-state/alsa-state/ccimx8x/asound.conf +++ b/meta-digi-arm/recipes-bsp/alsa-state/alsa-state/ccimx8x/asound.conf @@ -1,271 +1,9 @@ -defaults.pcm.rate_converter "linear" - -pcm.dmix_48000{ -type dmix -ipc_key 5678293 -ipc_key_add_uid yes -slave{ -pcm "hw:0,0" -period_time 40000 -format S16_LE -rate 48000 +pcm.imxmax98088 { + type hw + card 0 } +ctl.imxmax98088 { + type hw + card 0 } - -pcm.dmix_44100{ -type dmix -ipc_key 5678293 -ipc_key_add_uid yes -slave{ -pcm "hw:0,0" -period_time 40000 -format S16_LE -rate 44100 -} -} - -pcm.dmix_32000{ -type dmix -ipc_key 5678293 -ipc_key_add_uid yes -slave{ -pcm "hw:0,0" -period_time 40000 -format S16_LE -rate 32000 -} -} - -pcm.dmix_24000{ -type dmix -ipc_key 5678293 -ipc_key_add_uid yes -slave{ -pcm "hw:0,0" -period_time 40000 -format S16_LE -rate 24000 -} -} - -pcm.dmix_22050{ -type dmix -ipc_key 5678293 -ipc_key_add_uid yes -slave{ -pcm "hw:0,0" -period_time 40000 -format S16_LE -rate 22050 -} -} - -pcm.dmix_16000{ -type dmix -ipc_key 5678293 -ipc_key_add_uid yes -slave{ -pcm "hw:0,0" -period_time 40000 -format S16_LE -rate 16000 -} -} - -pcm.dmix_12000{ -type dmix -ipc_key 5678293 -ipc_key_add_uid yes -slave{ -pcm "hw:0,0" -period_time 40000 -format S16_LE -rate 12000 -} -} - -pcm.dmix_11025{ -type dmix -ipc_key 5678293 -ipc_key_add_uid yes -slave{ -pcm "hw:0,0" -period_time 40000 -format S16_LE -rate 11025 -} -} - -pcm.dmix_8000{ -type dmix -ipc_key 5678293 -ipc_key_add_uid yes -slave{ -pcm "hw:0,0" -period_time 40000 -format S16_LE -rate 8000 -} -} - -pcm.!dsnoop_48000{ -type dsnoop -ipc_key 5778293 -ipc_key_add_uid yes -slave{ -pcm "hw:0,0" -period_time 40000 -format S16_LE -rate 48000 -} -} - -pcm.!dsnoop_44100{ -type dsnoop -ipc_key 5778293 -ipc_key_add_uid yes -slave{ -pcm "hw:0,0" -period_time 40000 -format S16_LE -rate 44100 -} -} - -pcm.!dsnoop_32000{ -type dsnoop -ipc_key 5778293 -ipc_key_add_uid yes -slave{ -pcm "hw:0,0" -period_time 40000 -format S16_LE -rate 32000 -} -} - -pcm.!dsnoop_24000{ -type dsnoop -ipc_key 5778293 -ipc_key_add_uid yes -slave{ -pcm "hw:0,0" -period_time 40000 -format S16_LE -rate 24000 -} -} - -pcm.!dsnoop_22050{ -type dsnoop -ipc_key 5778293 -ipc_key_add_uid yes -slave{ -pcm "hw:0,0" -period_time 40000 -format S16_LE -rate 22050 -} -} - -pcm.!dsnoop_16000{ -type dsnoop -ipc_key 5778293 -ipc_key_add_uid yes -slave{ -pcm "hw:0,0" -period_time 40000 -format S16_LE -rate 16000 -} -} - -pcm.!dsnoop_12000{ -type dsnoop -ipc_key 5778293 -ipc_key_add_uid yes -slave{ -pcm "hw:0,0" -period_time 40000 -format S16_LE -rate 12000 -} -} - -pcm.!dsnoop_11025{ -type dsnoop -ipc_key 5778293 -ipc_key_add_uid yes -slave{ -pcm "hw:0,0" -period_time 40000 -format S16_LE -rate 11025 -} -} - -pcm.!dsnoop_8000{ -type dsnoop -ipc_key 5778293 -ipc_key_add_uid yes -slave{ -pcm "hw:0,0" -period_time 40000 -format S16_LE -rate 8000 -} -} - -pcm.asymed{ -type asym -playback.pcm "dmix_44100" -capture.pcm "dsnoop_44100" -} - -pcm.dsp0{ -type plug -slave.pcm "asymed" -} - -pcm.!default{ -type plug -route_policy "average" -slave.pcm "asymed" -} - -ctl.!default{ -type hw -card 0 -} - -ctl.mixer0{ -type hw -card 0 -} - -pcm_slave.esai{ - pcm "hw:0,0" - channels 8 - rate 48000 - period_time 40000 -} - -pcm.esaich1to6{ - type dshare - ipc_key 5778293 - slave esai - bindings.0 0 - bindings.1 4 - bindings.2 1 - bindings.3 5 - bindings.4 2 - bindings.5 6 -} - -pcm.esaich78{ - type dshare - ipc_key 5778293 - slave esai - bindings.0 3 - bindings.1 7 -} +ctl.!default imxmax98088 diff --git a/meta-digi-arm/recipes-bsp/alsa-state/alsa-state/ccimx8x/asound.state b/meta-digi-arm/recipes-bsp/alsa-state/alsa-state/ccimx8x/asound.state new file mode 100644 index 000000000..07076e3ac --- /dev/null +++ b/meta-digi-arm/recipes-bsp/alsa-state/alsa-state/ccimx8x/asound.state @@ -0,0 +1,1148 @@ +state.imxmax98088 { + control.1 { + iface MIXER + name 'Headphone Volume' + value.0 18 + value.1 18 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 31' + dbmin -6700 + dbmax 300 + dbvalue.0 -1100 + dbvalue.1 -1100 + } + } + control.2 { + iface MIXER + name 'Speaker Volume' + value.0 16 + value.1 16 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 31' + dbmin -6200 + dbmax 800 + dbvalue.0 -1000 + dbvalue.1 -1000 + } + } + control.3 { + iface MIXER + name 'Receiver Volume' + value.0 16 + value.1 16 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 31' + dbmin -6200 + dbmax 800 + dbvalue.0 -1000 + dbvalue.1 -1000 + } + } + control.4 { + iface MIXER + name 'Headphone Switch' + value.0 true + value.1 true + comment { + access 'read write' + type BOOLEAN + count 2 + } + } + control.5 { + iface MIXER + name 'Speaker Switch' + value.0 true + value.1 true + comment { + access 'read write' + type BOOLEAN + count 2 + } + } + control.6 { + iface MIXER + name 'Receiver Switch' + value.0 true + value.1 true + comment { + access 'read write' + type BOOLEAN + count 2 + } + } + control.7 { + iface MIXER + name 'MIC1 Volume' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 31' + } + } + control.8 { + iface MIXER + name 'MIC2 Volume' + value 15 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 31' + } + } + control.9 { + iface MIXER + name 'MIC1 Boost Volume' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 2' + dbmin 0 + dbmax 3000 + dbvalue.0 0 + } + } + control.10 { + iface MIXER + name 'MIC2 Boost Volume' + value 1 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 2' + dbmin 0 + dbmax 3000 + dbvalue.0 2000 + } + } + control.11 { + iface MIXER + name 'INA Volume' + value 4 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 7' + } + } + control.12 { + iface MIXER + name 'INB Volume' + value 4 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 7' + } + } + control.13 { + iface MIXER + name 'ADCL Volume' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 15' + } + } + control.14 { + iface MIXER + name 'ADCR Volume' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 15' + } + } + control.15 { + iface MIXER + name 'ADCL Boost Volume' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 3' + } + } + control.16 { + iface MIXER + name 'ADCR Boost Volume' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 3' + } + } + control.17 { + iface MIXER + name 'EQ1 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.18 { + iface MIXER + name 'EQ2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.19 { + iface MIXER + name 'EX Limiter Mode' + value Off + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 Off + item.1 '100Hz' + item.2 '400Hz' + item.3 '600Hz' + item.4 '800Hz' + item.5 '1000Hz' + item.6 '200-400Hz' + item.7 '400-600Hz' + item.8 '400-800Hz' + } + } + control.20 { + iface MIXER + name 'EX Limiter Threshold' + value '0.6' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 '0.6' + item.1 '1.2' + item.2 '1.8' + item.3 '2.4' + item.4 '3.0' + item.5 '3.6' + item.6 '4.2' + item.7 '4.8' + } + } + control.21 { + iface MIXER + name 'DAI1 Filter Mode' + value Music + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 Voice + item.1 Music + } + } + control.22 { + iface MIXER + name 'DAI1 DAC Filter' + value Off + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 Off + item.1 'fc=258/fs=16k' + item.2 'fc=500/fs=16k' + item.3 'fc=258/fs=8k' + item.4 'fc=500/fs=8k' + item.5 'fc=200' + } + } + control.23 { + iface MIXER + name 'DAI1 ADC Filter' + value Off + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 Off + item.1 'fc=258/fs=16k' + item.2 'fc=500/fs=16k' + item.3 'fc=258/fs=8k' + item.4 'fc=500/fs=8k' + item.5 'fc=200' + } + } + control.24 { + iface MIXER + name 'DAI2 DC Block Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.25 { + iface MIXER + name 'ALC Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.26 { + iface MIXER + name 'ALC Threshold' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 7' + } + } + control.27 { + iface MIXER + name 'ALC Multiband' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.28 { + iface MIXER + name 'ALC Release Time' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 7' + } + } + control.29 { + iface MIXER + name 'PWR Limiter Threshold' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 15' + } + } + control.30 { + iface MIXER + name 'PWR Limiter Weight' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 7' + } + } + control.31 { + iface MIXER + name 'PWR Limiter Time1' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 15' + } + } + control.32 { + iface MIXER + name 'PWR Limiter Time2' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 15' + } + } + control.33 { + iface MIXER + name 'THD Limiter Threshold' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 15' + } + } + control.34 { + iface MIXER + name 'THD Limiter Time' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 7' + } + } + control.35 { + iface MIXER + name 'REC Output Mode' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.36 { + iface MIXER + name 'Right ADC Mixer MIC1 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.37 { + iface MIXER + name 'Right ADC Mixer MIC2 Switch' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.38 { + iface MIXER + name 'Right ADC Mixer INA1 Switch' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.39 { + iface MIXER + name 'Right ADC Mixer INA2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.40 { + iface MIXER + name 'Right ADC Mixer INB1 Switch' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.41 { + iface MIXER + name 'Right ADC Mixer INB2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.42 { + iface MIXER + name 'Left ADC Mixer MIC1 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.43 { + iface MIXER + name 'Left ADC Mixer MIC2 Switch' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.44 { + iface MIXER + name 'Left ADC Mixer INA1 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.45 { + iface MIXER + name 'Left ADC Mixer INA2 Switch' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.46 { + iface MIXER + name 'Left ADC Mixer INB1 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.47 { + iface MIXER + name 'Left ADC Mixer INB2 Switch' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.48 { + iface MIXER + name 'Right REC Mixer Left DAC1 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.49 { + iface MIXER + name 'Right REC Mixer Right DAC1 Switch' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.50 { + iface MIXER + name 'Right REC Mixer Left DAC2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.51 { + iface MIXER + name 'Right REC Mixer Right DAC2 Switch' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.52 { + iface MIXER + name 'Right REC Mixer MIC1 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.53 { + iface MIXER + name 'Right REC Mixer MIC2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.54 { + iface MIXER + name 'Right REC Mixer INA1 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.55 { + iface MIXER + name 'Right REC Mixer INA2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.56 { + iface MIXER + name 'Right REC Mixer INB1 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.57 { + iface MIXER + name 'Right REC Mixer INB2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.58 { + iface MIXER + name 'Left REC Mixer Left DAC1 Switch' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.59 { + iface MIXER + name 'Left REC Mixer Right DAC1 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.60 { + iface MIXER + name 'Left REC Mixer Left DAC2 Switch' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.61 { + iface MIXER + name 'Left REC Mixer Right DAC2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.62 { + iface MIXER + name 'Left REC Mixer MIC1 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.63 { + iface MIXER + name 'Left REC Mixer MIC2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.64 { + iface MIXER + name 'Left REC Mixer INA1 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.65 { + iface MIXER + name 'Left REC Mixer INA2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.66 { + iface MIXER + name 'Left REC Mixer INB1 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.67 { + iface MIXER + name 'Left REC Mixer INB2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.68 { + iface MIXER + name 'Right SPK Mixer Left DAC1 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.69 { + iface MIXER + name 'Right SPK Mixer Right DAC1 Switch' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.70 { + iface MIXER + name 'Right SPK Mixer Left DAC2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.71 { + iface MIXER + name 'Right SPK Mixer Right DAC2 Switch' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.72 { + iface MIXER + name 'Right SPK Mixer MIC1 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.73 { + iface MIXER + name 'Right SPK Mixer MIC2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.74 { + iface MIXER + name 'Right SPK Mixer INA1 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.75 { + iface MIXER + name 'Right SPK Mixer INA2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.76 { + iface MIXER + name 'Right SPK Mixer INB1 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.77 { + iface MIXER + name 'Right SPK Mixer INB2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.78 { + iface MIXER + name 'Left SPK Mixer Left DAC1 Switch' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.79 { + iface MIXER + name 'Left SPK Mixer Right DAC1 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.80 { + iface MIXER + name 'Left SPK Mixer Left DAC2 Switch' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.81 { + iface MIXER + name 'Left SPK Mixer Right DAC2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.82 { + iface MIXER + name 'Left SPK Mixer MIC1 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.83 { + iface MIXER + name 'Left SPK Mixer MIC2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.84 { + iface MIXER + name 'Left SPK Mixer INA1 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.85 { + iface MIXER + name 'Left SPK Mixer INA2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.86 { + iface MIXER + name 'Left SPK Mixer INB1 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.87 { + iface MIXER + name 'Left SPK Mixer INB2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.88 { + iface MIXER + name 'Right HP Mixer Left DAC1 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.89 { + iface MIXER + name 'Right HP Mixer Right DAC1 Switch' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.90 { + iface MIXER + name 'Right HP Mixer Left DAC2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.91 { + iface MIXER + name 'Right HP Mixer Right DAC2 Switch' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.92 { + iface MIXER + name 'Right HP Mixer MIC1 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.93 { + iface MIXER + name 'Right HP Mixer MIC2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.94 { + iface MIXER + name 'Right HP Mixer INA1 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.95 { + iface MIXER + name 'Right HP Mixer INA2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.96 { + iface MIXER + name 'Right HP Mixer INB1 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.97 { + iface MIXER + name 'Right HP Mixer INB2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.98 { + iface MIXER + name 'Left HP Mixer Left DAC1 Switch' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.99 { + iface MIXER + name 'Left HP Mixer Right DAC1 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.100 { + iface MIXER + name 'Left HP Mixer Left DAC2 Switch' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.101 { + iface MIXER + name 'Left HP Mixer Right DAC2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.102 { + iface MIXER + name 'Left HP Mixer MIC1 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.103 { + iface MIXER + name 'Left HP Mixer MIC2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.104 { + iface MIXER + name 'Left HP Mixer INA1 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.105 { + iface MIXER + name 'Left HP Mixer INA2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.106 { + iface MIXER + name 'Left HP Mixer INB1 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.107 { + iface MIXER + name 'Left HP Mixer INB2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } +} From c35ba5e7604f1651cbdce5e0735e21112f124f74 Mon Sep 17 00:00:00 2001 From: Gonzalo Ruiz Date: Mon, 29 Oct 2018 13:27:12 +0100 Subject: [PATCH 26/30] meta-digi-dey: bump distro version to 2.4-r2 Signed-off-by: Gonzalo Ruiz --- meta-digi-dey/conf/distro/dey.conf | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-digi-dey/conf/distro/dey.conf b/meta-digi-dey/conf/distro/dey.conf index 898d255a4..28ce3b0ff 100644 --- a/meta-digi-dey/conf/distro/dey.conf +++ b/meta-digi-dey/conf/distro/dey.conf @@ -1,6 +1,6 @@ DISTRO = "dey" DISTRO_NAME = "Digi Embedded Yocto" -DISTRO_VERSION = "2.4-r2-beta" +DISTRO_VERSION = "2.4-r2" DISTRO_CODENAME = "rocko" SDK_VENDOR = "-deysdk" SDK_VERSION := "${@'${DISTRO_VERSION}'}" From 14a68356f39c00bbb5278ec9e88d278c7e997d0c Mon Sep 17 00:00:00 2001 From: Alex Gonzalez Date: Wed, 31 Oct 2018 19:12:03 +0100 Subject: [PATCH 27/30] linux-4.18.y: Avoid compilation error This error only appears when the build host does not have the openssl development libraries (libssl-dev) installed. If they are, the build process will use them. The error is: | /home/builder/jenkins/workspace/dey-rocko-use-mainline-bsp/projects/ccimx6ulsbc/tmp/work-shared/ccimx6ulsbc/kernel-source/scripts/extract-cert.c:21:25: fatal error: openssl/bio.h: No such file or directory | compilation terminated. | scripts/Makefile.host:90: recipe for target 'scripts/extract-cert' failed | make[3]: *** [scripts/extract-cert] Error 1 | make[3]: *** Waiting for unfinished jobs.... This commit makes openssl-native a dependency and passes the include path to the build. Signed-off-by: Alex Gonzalez --- meta-digi-arm/recipes-kernel/linux/linux-4.18.y.bb | 3 +++ 1 file changed, 3 insertions(+) diff --git a/meta-digi-arm/recipes-kernel/linux/linux-4.18.y.bb b/meta-digi-arm/recipes-kernel/linux/linux-4.18.y.bb index ade04b657..83490c1b3 100644 --- a/meta-digi-arm/recipes-kernel/linux/linux-4.18.y.bb +++ b/meta-digi-arm/recipes-kernel/linux/linux-4.18.y.bb @@ -5,4 +5,7 @@ require recipes-kernel/linux/linux-dey.inc SRCBRANCH = "v4.18.y" SRCREV = "${AUTOREV}" +DEPENDS += "openssl-native" +HOST_EXTRACFLAGS += "-I${STAGING_INCDIR_NATIVE}" + COMPATIBLE_MACHINE = "(ccimx6ul)" From 756cb10a221aa3e8ec6b77e26eba5a2b6c467fd5 Mon Sep 17 00:00:00 2001 From: Hector Bujanda Date: Fri, 2 Nov 2018 12:59:10 +0100 Subject: [PATCH 28/30] mca_tool: update checksums for build 1.14 Collects following changes: - Added fw_update support for cc8x. - Platform is auto recognized by the tool. - Added boot mode configuration. https://jira.digi.com/browse/DEL-6247 Signed-off-by: Hector Bujanda --- .../mca/{mca-tool_1.13.bb => mca-tool_1.14.bb} | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) rename meta-digi-arm/recipes-digi/mca/{mca-tool_1.13.bb => mca-tool_1.14.bb} (61%) diff --git a/meta-digi-arm/recipes-digi/mca/mca-tool_1.13.bb b/meta-digi-arm/recipes-digi/mca/mca-tool_1.14.bb similarity index 61% rename from meta-digi-arm/recipes-digi/mca/mca-tool_1.13.bb rename to meta-digi-arm/recipes-digi/mca/mca-tool_1.14.bb index 61d255361..121eb1e2f 100644 --- a/meta-digi-arm/recipes-digi/mca/mca-tool_1.13.bb +++ b/meta-digi-arm/recipes-digi/mca/mca-tool_1.14.bb @@ -8,13 +8,13 @@ PKGNAME = "mca_tool" # ARM tarball SRC_URI_arm = "${DIGI_PKG_SRC}/${PKGNAME}-${PV}-${TUNE_ARCH}.tar.gz;name=arm" -SRC_URI[arm.md5sum] = "5ed2579b9e3e5bcb2bc10a8082f8be2b" -SRC_URI[arm.sha256sum] = "cfdb464893e02e37f5baaf9f08ac0fb8943a9a70a8fea6737d1b65c659ed9c42" +SRC_URI[arm.md5sum] = "a9c9e4bbafa65b8140def4db60518a61" +SRC_URI[arm.sha256sum] = "70bae34b602573547cd6f9c6a738aaef4f90c03ce7a97b4d54013b20acbf9a45" # AARCH64 tarball SRC_URI_aarch64 = "${DIGI_PKG_SRC}/${PKGNAME}-${PV}-${TUNE_ARCH}.tar.gz;name=aarch64" -SRC_URI[aarch64.md5sum] = "9b6c4768205dda0444e04431245881d5" -SRC_URI[aarch64.sha256sum] = "a5e5947d62a6199afeeff74d48eb5b1c08a7f8836c84468b41e9f51773b54122" +SRC_URI[aarch64.md5sum] = "ccde3a7d4981e179b271a3ce258c036c" +SRC_URI[aarch64.sha256sum] = "da6e9710dd4ff07451cbd1e6f7961f42e97a1c6c0f8b25141be48b229aa9b5a8" S = "${WORKDIR}/${PKGNAME}-${PV}" From 89c9af1ea32d13135d1df8aebc29b4d2acc96c29 Mon Sep 17 00:00:00 2001 From: Arturo Buzarra Date: Tue, 6 Nov 2018 17:24:01 +0100 Subject: [PATCH 29/30] imx-boot: make do_populate_lic depend on packages dependant When the imx-boot recipe is added in EXTRA_IMAGEDEPENDS the license file is being referenced in image postcommand write_deploy_manifest, but the licenses of the dependant packages are missing. This leads to the license files of the recipes to be missing when write_deploy_manifest runs, causing build errors to appear. https://jira.digi.com/browse/DEL-6251 Signed-off-by: Arturo Buzarra --- .../recipes-bsp/imx-mkimage/imx-boot_0.2.bb | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/meta-digi-arm/recipes-bsp/imx-mkimage/imx-boot_0.2.bb b/meta-digi-arm/recipes-bsp/imx-mkimage/imx-boot_0.2.bb index 6d5f2d81d..b3e817eeb 100644 --- a/meta-digi-arm/recipes-bsp/imx-mkimage/imx-boot_0.2.bb +++ b/meta-digi-arm/recipes-bsp/imx-mkimage/imx-boot_0.2.bb @@ -37,8 +37,8 @@ DEPENDS_append_mx8mq = " dtc-native" # that would otherwise be done in the image build as controlled # by IMAGE_BOOTFILES_DEPENDS and IMAGE_BOOTFILES in image_types_fsl.bbclass IMX_M4_DEMOS = "" -IMX_M4_DEMOS_mx8qm = "imx-m4-demos:do_deploy" -IMX_M4_DEMOS_mx8qxp = "imx-m4-demos:do_deploy" +IMX_M4_DEMOS_mx8qm = "imx-m4-demos" +IMX_M4_DEMOS_mx8qxp = "imx-m4-demos" # This package aggregates output deployed by other packages, # so set the appropriate dependencies @@ -46,10 +46,20 @@ do_compile[depends] += " \ virtual/bootloader:do_deploy \ ${@' '.join('%s:do_deploy' % r for r in '${IMX_FIRMWARE}'.split() )} \ imx-atf:do_deploy \ - ${IMX_M4_DEMOS} \ + ${@' '.join('%s:do_deploy' % r for r in '${IMX_M4_DEMOS}'.split() )} \ ${@bb.utils.contains('COMBINED_FEATURES', 'optee', 'optee-os-imx:do_deploy', '', d)} \ " +# This package aggregates dependencies with other packages, +# so also define the license dependencies. +do_populate_lic[depends] += " \ + virtual/bootloader:do_populate_lic \ + ${@' '.join('%s:do_populate_lic' % r for r in '${IMX_FIRMWARE}'.split() )} \ + imx-atf:do_populate_lic \ + ${@' '.join('%s:do_populate_lic' % r for r in '${IMX_M4_DEMOS}'.split() )} \ + ${@bb.utils.contains('COMBINED_FEATURES', 'optee', 'optee-os-imx:do_populate_lic', '', d)} \ +" + SC_FIRMWARE_NAME ?= "scfw_tcm.bin" ATF_MACHINE_NAME ?= "bl31-imx8qm.bin" From d4c3751bbdaeee6eba7ceebc7cb3ffa23cd88644 Mon Sep 17 00:00:00 2001 From: fgilmar Date: Wed, 7 Nov 2018 12:48:25 +0100 Subject: [PATCH 30/30] dey_examples: adc: fix a typo in the adc_list definition Signed-off-by: fgilmar --- .../recipes-digi/dey-examples/files/adc_sample/adc_sample.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-digi-dey/recipes-digi/dey-examples/files/adc_sample/adc_sample.c b/meta-digi-dey/recipes-digi/dey-examples/files/adc_sample/adc_sample.c index f80d602ac..fa9f48852 100644 --- a/meta-digi-dey/recipes-digi/dey-examples/files/adc_sample/adc_sample.c +++ b/meta-digi-dey/recipes-digi/dey-examples/files/adc_sample/adc_sample.c @@ -65,7 +65,7 @@ struct adc_data adc_list[] = { .nbits = 12, }, { - .type = ADC_TYPE_MCA_C6UL, + .type = ADC_TYPE_MCA_CC6UL, .name = "MCA-CC6UL", .dev_name = "mca-cc6ul-adc", .nbits = 12,