ccmp15/ccmp25: update Cortex-M signed firmware support
Update secure boot support for Cortex-M processors by refreshing the patch set and dropping patches already integrated, aligning the implementation with ST release openstlinux-6.6-yocto-scarthgap-mpu-v26.02.18. https://onedigi.atlassian.net/browse/DEL-10022 Signed-off-by: Arturo Buzarra <arturo.buzarra@digi.com>
This commit is contained in:
Arturo Buzarra
parent
6e5e6b9dc2
commit
ab4a2d558b
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@ -1,5 +1,5 @@
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From: Arturo Buzarra <arturo.buzarra@digi.com>
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Date: Mon, 3 Nov 2025 23:00:27 +0100
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Date: Wed, 18 Mar 2026 22:07:56 +0100
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Subject: [PATCH] ARM: dts: ccmp15: add signed firmware support for RPROC
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Enable the Cortex-M4 inter-processor communication node so remoteproc can
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@ -9,24 +9,19 @@ https://onedigi.atlassian.net/browse/DEL-9920
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Signed-off-by: Arturo Buzarra <arturo.buzarra@digi.com>
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---
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core/arch/arm/dts/ccmp15-dvk.dtsi | 5 ++++-
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1 file changed, 4 insertions(+), 1 deletion(-)
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core/arch/arm/dts/ccmp15-dvk.dtsi | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/core/arch/arm/dts/ccmp15-dvk.dtsi b/core/arch/arm/dts/ccmp15-dvk.dtsi
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index 7ea04b659..53533bd36 100644
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index ff7ee6504..ea88e3e1e 100644
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--- a/core/arch/arm/dts/ccmp15-dvk.dtsi
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+++ b/core/arch/arm/dts/ccmp15-dvk.dtsi
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@@ -263,9 +263,12 @@
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@@ -259,7 +259,7 @@
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&m4_rproc {
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memory-region = <&retram>, <&mcusram1>, <&mcusram2>, <&mcusram3>;
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mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>;
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mbox-names = "vq0", "vq1", "shutdown", "detach";
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+ resets = <&rcc MCU_R>, <&rcc MCU_HOLD_BOOT_R>;
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+ reset-names = "mcu_rst", "hold_boot";
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+ #reset-cells = <1>;
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interrupt-parent = <&exti>;
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interrupts = <68 1>;
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- status = "disabled";
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+ status = "okay";
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};
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&mcusram1 {
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@ -1,55 +0,0 @@
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From: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
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Date: Wed, 7 Jan 2026 14:10:13 +0100
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Subject: [PATCH] Revert "drivers: remoteproc: stm32mp15: check Cortex-M
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isolation"
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This reverts commit b9f1c0820783436d45646fa50a62702f85d8fd62.
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The MCKPROT is a system configuration that protects MCUSS clocks.
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This must not be managed in remoteproc, as some peripherals use PLL3
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as the parent clock.
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Some SCMI services must first be implemented to manage the MCUSS clocks
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before allowing the enabling of MCKPROT.
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https://onedigi.atlassian.net/browse/DEL-9920
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Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
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Change-Id: I78214e4c482c3947fa36c0bde7cd2fe2eee133d4
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---
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core/drivers/remoteproc/stm32_remoteproc.c | 16 ----------------
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1 file changed, 16 deletions(-)
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diff --git a/core/drivers/remoteproc/stm32_remoteproc.c b/core/drivers/remoteproc/stm32_remoteproc.c
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index c99a47fe3..914474035 100644
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--- a/core/drivers/remoteproc/stm32_remoteproc.c
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+++ b/core/drivers/remoteproc/stm32_remoteproc.c
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@@ -8,9 +8,6 @@
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#include <drivers/firewall_device.h>
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#include <drivers/rstctrl.h>
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#include <drivers/stm32_remoteproc.h>
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-#ifdef CFG_STM32MP15
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-#include <drivers/stm32mp1_rcc.h>
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-#endif
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#include <keep.h>
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#include <kernel/cache_helpers.h>
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#include <kernel/dt_driver.h>
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@@ -904,19 +901,6 @@ static TEE_Result stm32_rproc_probe(const void *fdt, int node,
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stm32_rproc_a35ss_cfg(rproc);
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#endif
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-#ifdef CFG_STM32MP15
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- if (!rproc->cdata->ns_loading) {
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- if (!stm32_rcc_is_secure()) {
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- if (IS_ENABLED(CFG_INSECURE))
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- IMSG("WARNING: insecure rproc support regarding RCC hardening");
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- else
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- panic("RCC secure hardening issue");
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- } else {
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- stm32_rcc_set_mckprot(true);
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- }
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- }
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-#endif
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-
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if (!rproc->cdata->ns_loading)
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SLIST_INSERT_HEAD(&rproc_list, rproc, link);
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@ -1,38 +0,0 @@
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From: Patrick Delaunay <patrick.delaunay@foss.st.com>
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Date: Thu, 8 Jan 2026 10:20:20 +0100
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Subject: [PATCH] drivers: firewall: stm32_etzpc: remove trace when rcc mckprot
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is not activated
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The RCC MCKPROT is deactivated even for remoteproc with secure loading
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embedded in the platform, so stm32_rcc_is_mckprot always returns false
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and a WARNING traces are displayed.
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I/TC: WARNING: RCC tzen:1 mckprot:0, insecure ETZPC hardening
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81:ETZPC_DECPROT_MCU_ISOLATION
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This patch temporarily removes this trace in OpenSTLinux V6.X
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as mckprot is not managed.
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NOT_UPSTREAMABLE only avoid warning message.
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https://onedigi.atlassian.net/browse/DEL-9920
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Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
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Change-Id: If8cbec0bc2d5ad65b2f5e716c561f9598728d4e0
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---
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core/drivers/firewall/stm32_etzpc.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/core/drivers/firewall/stm32_etzpc.c b/core/drivers/firewall/stm32_etzpc.c
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index 257bcd76e..9d588b1c3 100644
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--- a/core/drivers/firewall/stm32_etzpc.c
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+++ b/core/drivers/firewall/stm32_etzpc.c
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@@ -184,7 +184,7 @@ sanitize_decprot_config(uint32_t decprot_id __maybe_unused,
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}
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break;
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case ETZPC_DECPROT_MCU_ISOLATION:
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- if (!stm32_rcc_is_secure() || !stm32_rcc_is_mckprot()) {
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+ if (!stm32_rcc_is_secure()) {
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IMSG("WARNING: RCC tzen:%u mckprot:%u, insecure ETZPC hardening %"PRIu32":%s",
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stm32_rcc_is_secure(), stm32_rcc_is_mckprot(),
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decprot_id, etzpc_decprot_strings[attr]);
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@ -21,9 +21,7 @@ SRC_URI = " \
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"
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SRC_URI:append:ccmp15 = " \
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${@oe.utils.conditional('TRUSTFENCE_COPRO_ENABLED', '1' , 'file://0001-ARM-dts-ccmp15-add-signed-firmware-support-for-RPROC.patch \
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file://0002-Revert-drivers-remoteproc-stm32mp15-check-Cortex-M-i.patch \
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file://0003-drivers-firewall-stm32_etzpc-remove-trace-when-rcc-m.patch', '', d)} \
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${@oe.utils.conditional('TRUSTFENCE_COPRO_ENABLED', '1' , 'file://0001-ARM-dts-ccmp15-add-signed-firmware-support-for-RPROC.patch', '', d)} \
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"
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SRC_URI:append:ccmp25 = " \
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@ -1,5 +1,5 @@
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From: Arturo Buzarra <arturo.buzarra@digi.com>
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Date: Thu, 30 Oct 2025 14:35:29 +0100
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Date: Wed, 18 Mar 2026 15:26:07 +0100
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Subject: [PATCH] ARM: dts: ccmp25: add signed firmware support for RPROC
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Declare only the shared memory used for inter-processor communication
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@ -14,7 +14,7 @@ Signed-off-by: Arturo Buzarra <arturo.buzarra@digi.com>
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1 file changed, 2 insertions(+), 5 deletions(-)
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diff --git a/arch/arm/dts/ccmp25.dtsi b/arch/arm/dts/ccmp25.dtsi
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index 913eac366b9..51b65f2408a 100644
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index cdbc26efabc..b0a91cb0180 100644
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--- a/arch/arm/dts/ccmp25.dtsi
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+++ b/arch/arm/dts/ccmp25.dtsi
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@@ -246,11 +246,8 @@
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@ -25,7 +25,7 @@ index 913eac366b9..51b65f2408a 100644
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- <&ipc_shmem_1>, <&vdev0vring0>,
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- <&vdev0vring1>, <&vdev0buffer>,
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- <&cm33_sram2>;
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- st,syscfg-nsvtor = <&a35ss_syscfg 0xa8 0xffffff80>;
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- st,syscfg-nsvtor = <&a35ss_syscfg 0x20a8 0xffffff80>;
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+ compatible = "st,stm32mp2-m33-tee";
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+ memory-region = <&vdev0vring0>, <&vdev0vring1>, <&vdev0buffer>, <&ipc_shmem_1>;
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status = "okay";
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@ -1,217 +0,0 @@
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From: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
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Date: Wed, 7 Jan 2026 14:56:36 +0100
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Subject: [PATCH] remoteproc: stm32_rproc: make reset and hold boot optional
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As specified in the bindings, the "mcu_rst" and "hold_boot" resets are
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optional. They are needed only in the following topologies:
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- stm32mp15: when the device tree defines the compatible "st,stm32mp1-m4"
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- stm32mp2x A35 cold boot: when the device tree defines the compatible
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"st,stm32mp2-m33"
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This commit splits the management of the "mcu_rst" and "hold_boot" resets
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per series:
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- Migrates reset management code from stm32_rproc_parse_dt() to the
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stm32_rproc_get_m4_reset() function
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- Creates `stm32_rproc_get_m33_reset()` function to manage M33 resets
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- No legacy property support needed
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- "mcu_rst" and "hold_boot" are optional
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Additionally, the get_reset() ops is called only for "st,stm32mp2-m33"
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or "st,stm32mp2-m4" compatibles, when `ddata->trproc` is NULL.
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https://onedigi.atlassian.net/browse/DEL-9920
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Change-Id: Iddf5c28882eac4e051fec10367439f5991cdcaf1
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Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
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---
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drivers/remoteproc/stm32_rproc.c | 129 ++++++++++++++++++++-----------
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1 file changed, 82 insertions(+), 47 deletions(-)
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diff --git a/drivers/remoteproc/stm32_rproc.c b/drivers/remoteproc/stm32_rproc.c
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index d21f22164814..46390045a63d 100644
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--- a/drivers/remoteproc/stm32_rproc.c
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+++ b/drivers/remoteproc/stm32_rproc.c
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@@ -83,6 +83,7 @@ struct stm32_rproc_mem {
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struct stm32_rproc_data {
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int proc_id;
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int (*get_info)(struct rproc *rproc);
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+ int (*get_reset)(struct rproc *rproc);
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};
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struct stm32_mbox {
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@@ -997,24 +998,6 @@ static int stm32_rproc_get_m33_info(struct rproc *rproc)
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return 0;
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}
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-static const struct stm32_rproc_data stm32_rproc_stm32pm15 = {
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- .proc_id = STM32_MP1_M4_PROC_ID,
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- .get_info = stm32_rproc_get_m4_info,
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-};
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-
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-static const struct stm32_rproc_data stm32_rproc_stm32pm25 = {
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- .proc_id = STM32_MP2_M33_PROC_ID,
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- .get_info = stm32_rproc_get_m33_info,
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-};
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-
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-static const struct of_device_id stm32_rproc_match[] = {
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- {.compatible = "st,stm32mp1-m4", .data = &stm32_rproc_stm32pm15},
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- {.compatible = "st,stm32mp1-m4-tee", .data = &stm32_rproc_stm32pm15},
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- {.compatible = "st,stm32mp2-m33", .data = &stm32_rproc_stm32pm25},
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- {.compatible = "st,stm32mp2-m33-tee", .data = &stm32_rproc_stm32pm25},
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- {},
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-};
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-MODULE_DEVICE_TABLE(of, stm32_rproc_match);
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static int stm32_rproc_get_syscon(struct device_node *np, const char *prop,
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struct stm32_syscon *syscon)
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@@ -1038,42 +1021,29 @@ static int stm32_rproc_get_syscon(struct device_node *np, const char *prop,
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return err;
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}
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-static int stm32_rproc_parse_dt(struct platform_device *pdev,
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- struct stm32_rproc *ddata, bool *auto_boot)
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+static int stm32_rproc_get_m4_reset(struct rproc *rproc)
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{
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- struct device *dev = &pdev->dev;
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+ struct stm32_rproc *ddata = rproc->priv;
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+ struct device *dev = rproc->dev.parent;
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struct device_node *np = dev->of_node;
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struct stm32_syscon tz;
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unsigned int tzen;
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- int err, irq;
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-
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- irq = platform_get_irq(pdev, 0);
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- if (irq == -EPROBE_DEFER)
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- return dev_err_probe(dev, irq, "failed to get interrupt\n");
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-
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- if (irq > 0) {
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- err = devm_request_irq(dev, irq, stm32_rproc_wdg, 0,
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- dev_name(dev), pdev);
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- if (err)
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- return dev_err_probe(dev, err,
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- "failed to request wdg irq\n");
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-
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- ddata->wdg_irq = irq;
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-
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- if (of_property_read_bool(np, "wakeup-source"))
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- ddata->wdg_wake_up = 1;
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-
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- dev_info(dev, "wdg irq registered\n");
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- }
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+ int err = 0;
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ddata->rst = devm_reset_control_get_optional(dev, "mcu_rst");
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if (!ddata->rst) {
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/* Try legacy fallback method: get it by index */
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ddata->rst = devm_reset_control_get_by_index(dev, 0);
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}
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- if (IS_ERR(ddata->rst))
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- return dev_err_probe(dev, PTR_ERR(ddata->rst),
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- "failed to get mcu_reset\n");
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+ if (IS_ERR(ddata->rst)) {
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+ if (PTR_ERR(ddata->rst) != -ENOENT)
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+ return dev_err_probe(dev, PTR_ERR(ddata->rst),
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+ "failed to get mcu_reset\n");
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+ ddata->rst = NULL;
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+ }
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+
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+ if (!ddata->rst)
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+ return 0;
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/*
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* Three ways to manage the hold boot
|
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@@ -1085,11 +1055,10 @@ static int stm32_rproc_parse_dt(struct platform_device *pdev,
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* - default(no SCMI, no SMC): the hold boot is managed as a syscon register
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* The DT "reset-mames" property is optional, "st,syscfg-holdboot" is required
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*/
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-
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ddata->hold_boot_rst = devm_reset_control_get_optional(dev, "hold_boot");
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if (IS_ERR(ddata->hold_boot_rst))
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return dev_err_probe(dev, PTR_ERR(ddata->hold_boot_rst),
|
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- "failed to get hold_boot reset\n");
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+ "failed to get hold_boot reset\n");
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if (!ddata->hold_boot_rst && IS_ENABLED(CONFIG_HAVE_ARM_SMCCC)) {
|
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/* Manage the MCU_BOOT using SMC call */
|
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@@ -1108,6 +1077,72 @@ static int stm32_rproc_parse_dt(struct platform_device *pdev,
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/* Default: hold boot manage it through the syscon controller */
|
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err = stm32_rproc_get_syscon(np, "st,syscfg-holdboot",
|
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&ddata->hold_boot);
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+ }
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+
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+ return err;
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+}
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+
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+static int stm32_rproc_get_m33_reset(struct rproc *rproc)
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+{
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+ struct stm32_rproc *ddata = rproc->priv;
|
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+ struct device *dev = rproc->dev.parent;
|
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+
|
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+ ddata->rst = devm_reset_control_get_optional(dev, "mcu_rst");
|
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+ ddata->hold_boot_rst = devm_reset_control_get_optional(dev, "hold_boot");
|
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+
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+ return 0;
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+}
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+
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+static const struct stm32_rproc_data stm32_rproc_stm32pm15 = {
|
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+ .proc_id = STM32_MP1_M4_PROC_ID,
|
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+ .get_info = stm32_rproc_get_m4_info,
|
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+ .get_reset = stm32_rproc_get_m4_reset,
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+};
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+
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+static const struct stm32_rproc_data stm32_rproc_stm32pm25 = {
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+ .proc_id = STM32_MP2_M33_PROC_ID,
|
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+ .get_info = stm32_rproc_get_m33_info,
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+ .get_reset = stm32_rproc_get_m33_reset,
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+};
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+
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+static const struct of_device_id stm32_rproc_match[] = {
|
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+ {.compatible = "st,stm32mp1-m4", .data = &stm32_rproc_stm32pm15},
|
||||
+ {.compatible = "st,stm32mp1-m4-tee", .data = &stm32_rproc_stm32pm15},
|
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+ {.compatible = "st,stm32mp2-m33", .data = &stm32_rproc_stm32pm25},
|
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+ {.compatible = "st,stm32mp2-m33-tee", .data = &stm32_rproc_stm32pm25},
|
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+ {},
|
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+};
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+MODULE_DEVICE_TABLE(of, stm32_rproc_match);
|
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+
|
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+static int stm32_rproc_parse_dt(struct platform_device *pdev,
|
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+ struct rproc *rproc, bool *auto_boot)
|
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+{
|
||||
+ struct device *dev = &pdev->dev;
|
||||
+ struct device_node *np = dev->of_node;
|
||||
+ struct stm32_rproc *ddata = rproc->priv;
|
||||
+ int err, irq;
|
||||
+
|
||||
+ irq = platform_get_irq(pdev, 0);
|
||||
+ if (irq == -EPROBE_DEFER)
|
||||
+ return dev_err_probe(dev, irq, "failed to get interrupt\n");
|
||||
+
|
||||
+ if (irq > 0) {
|
||||
+ err = devm_request_irq(dev, irq, stm32_rproc_wdg, 0,
|
||||
+ dev_name(dev), pdev);
|
||||
+ if (err)
|
||||
+ return dev_err_probe(dev, err,
|
||||
+ "failed to request wdg irq\n");
|
||||
+
|
||||
+ ddata->wdg_irq = irq;
|
||||
+
|
||||
+ if (of_property_read_bool(np, "wakeup-source"))
|
||||
+ ddata->wdg_wake_up = 1;
|
||||
+
|
||||
+ dev_info(dev, "wdg irq registered\n");
|
||||
+ }
|
||||
+
|
||||
+ if (!ddata->trproc) {
|
||||
+ err = ddata->desc->get_reset(rproc);
|
||||
if (err) {
|
||||
dev_err(dev, "failed to get hold boot\n");
|
||||
return err;
|
||||
@@ -1231,7 +1266,7 @@ static int stm32_rproc_probe(struct platform_device *pdev)
|
||||
ddata->desc = desc;
|
||||
ddata->trproc = trproc;
|
||||
|
||||
- ret = stm32_rproc_parse_dt(pdev, ddata, &rproc->auto_boot);
|
||||
+ ret = stm32_rproc_parse_dt(pdev, rproc, &rproc->auto_boot);
|
||||
if (ret)
|
||||
goto free_rproc;
|
||||
|
||||
|
|
@ -1,5 +1,5 @@
|
|||
From: Arturo Buzarra <arturo.buzarra@digi.com>
|
||||
Date: Thu, 30 Oct 2025 14:15:14 +0100
|
||||
Date: Wed, 18 Mar 2026 15:30:31 +0100
|
||||
Subject: [PATCH] ARM64: dts: ccmp25: add signed firmware support for RPROC
|
||||
|
||||
Declare only the shared memory used for inter-processor communication
|
||||
|
|
@ -14,7 +14,7 @@ Signed-off-by: Arturo Buzarra <arturo.buzarra@digi.com>
|
|||
1 file changed, 2 insertions(+), 5 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/digi/ccmp25.dtsi b/arch/arm64/boot/dts/digi/ccmp25.dtsi
|
||||
index 153726203533..89f5bf75fd9f 100644
|
||||
index 0940797f47fa..444ebc920187 100644
|
||||
--- a/arch/arm64/boot/dts/digi/ccmp25.dtsi
|
||||
+++ b/arch/arm64/boot/dts/digi/ccmp25.dtsi
|
||||
@@ -346,11 +346,8 @@ &m0_rproc {
|
||||
|
|
@ -25,7 +25,7 @@ index 153726203533..89f5bf75fd9f 100644
|
|||
- <&ipc_shmem_1>, <&vdev0vring0>,
|
||||
- <&vdev0vring1>, <&vdev0buffer>,
|
||||
- <&cm33_sram2>;
|
||||
- st,syscfg-nsvtor = <&a35ss_syscfg 0xa8 0xffffff80>;
|
||||
- st,syscfg-nsvtor = <&a35ss_syscfg 0x20a8 0xffffff80>;
|
||||
+ compatible = "st,stm32mp2-m33-tee";
|
||||
+ memory-region = <&vdev0vring0>, <&vdev0vring1>, <&vdev0buffer>, <&ipc_shmem_1>;
|
||||
status = "okay";
|
||||
|
|
|
|||
|
|
@ -23,8 +23,7 @@ SRC_URI:append = " \
|
|||
"
|
||||
|
||||
SRC_URI:append:ccmp15 = " \
|
||||
${@oe.utils.conditional('TRUSTFENCE_COPRO_ENABLED', '1' , 'file://0001-ARM-dts-ccmp15-add-signed-firmware-support-for-RPROC.patch \
|
||||
file://0002-remoteproc-stm32_rproc-make-reset-and-hold-boot-opti.patch', '', d)} \
|
||||
${@oe.utils.conditional('TRUSTFENCE_COPRO_ENABLED', '1' , 'file://0001-ARM-dts-ccmp15-add-signed-firmware-support-for-RPROC.patch', '', d)} \
|
||||
"
|
||||
|
||||
SRC_URI:append:ccmp25 = " \
|
||||
|
|
|
|||
Loading…
Reference in New Issue