From b7b7d0110b440eb9af9488cff36eb75010897e7c Mon Sep 17 00:00:00 2001 From: Gabriel Valcazar Date: Tue, 7 Jan 2020 16:07:11 +0100 Subject: [PATCH] imx-atf: add patch to fix the ccimx8mn hanging on suspend/resume The LPDDR4 retention code is executed as part of the suspend/resume process. When resuming, this code writes to a register that doesn't exist on the i.MX8MN, causing the system to freeze before control is returned to Linux. Add a patch that introduces a compile-time check for the SoC type to avoid performing the write operation on the i.MX8MN. https://jira.digi.com/browse/DEL-6914 Signed-off-by: Gabriel Valcazar --- ...e-the-lpddr4-retention-flow-for-imx8.patch | 26 +++++++++++++++++++ .../recipes-bsp/imx-atf/imx-atf_2.0.bb | 5 +++- 2 files changed, 30 insertions(+), 1 deletion(-) create mode 100644 meta-digi-arm/recipes-bsp/imx-atf/imx-atf/0002-plat-imx8m-update-the-lpddr4-retention-flow-for-imx8.patch diff --git a/meta-digi-arm/recipes-bsp/imx-atf/imx-atf/0002-plat-imx8m-update-the-lpddr4-retention-flow-for-imx8.patch b/meta-digi-arm/recipes-bsp/imx-atf/imx-atf/0002-plat-imx8m-update-the-lpddr4-retention-flow-for-imx8.patch new file mode 100644 index 000000000..df11dbefc --- /dev/null +++ b/meta-digi-arm/recipes-bsp/imx-atf/imx-atf/0002-plat-imx8m-update-the-lpddr4-retention-flow-for-imx8.patch @@ -0,0 +1,26 @@ +From: Jacky Bai +Date: Wed, 23 Oct 2019 13:44:28 +0800 +Subject: [PATCH] plat: imx8m: update the lpddr4 retention flow for imx8mn + +for i.MX8MN, it can only support 16bit DDR, so +it is not necessary to config the DDR_SS_GPR register. + +Signed-off-by: Jacky Bai +--- + plat/imx/common/imx8m/lpddr4_retention.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/plat/imx/common/imx8m/lpddr4_retention.c b/plat/imx/common/imx8m/lpddr4_retention.c +index 8cc44c8..dbec3d5 100644 +--- a/plat/imx/common/imx8m/lpddr4_retention.c ++++ b/plat/imx/common/imx8m/lpddr4_retention.c +@@ -184,7 +184,9 @@ void lpddr4_exit_retention(void) + + /* before write Dynamic reg, sw_done should be 0 */ + mmio_write_32(DDRC_SWCTL(0), 0x00000000); ++#if !defined(PLAT_imx8mn) + mmio_write_32(DDRC_DDR_SS_GPR0, 0x01); /*LPDDR4 mode */ ++#endif + mmio_write_32(DDRC_DFIMISC(0), 0x00000000); + + /* dram phy re-init */ diff --git a/meta-digi-arm/recipes-bsp/imx-atf/imx-atf_2.0.bb b/meta-digi-arm/recipes-bsp/imx-atf/imx-atf_2.0.bb index 2d66351bf..4eceeb7bd 100644 --- a/meta-digi-arm/recipes-bsp/imx-atf/imx-atf_2.0.bb +++ b/meta-digi-arm/recipes-bsp/imx-atf/imx-atf_2.0.bb @@ -15,7 +15,10 @@ SRCBRANCH = "imx_4.14.98_2.2.0" SRC_URI = "${ATF_SRC};branch=${SRCBRANCH}" SRCREV = "1355c5d12d75c9c7bdd08826796096bab519b3d5" -SRC_URI_append_ccimx8mn = " file://0001-imx8mn-Disable-M7-debug-console.patch" +SRC_URI_append_ccimx8mn = " \ + file://0001-imx8mn-Disable-M7-debug-console.patch \ + file://0002-plat-imx8m-update-the-lpddr4-retention-flow-for-imx8.patch \ +" S = "${WORKDIR}/git"