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Merge branch 'dey-5.0/master' into dey-5.0/maint 

Signed-off-by: Mike Engel <Mike.Engel@digi.com>
This commit is contained in:
Mike Engel 2026-04-30 11:51:33 +02:00
parent a16ad0fd2d 6f1080025c
commit e913427295
239 changed files with 8107 additions and 79462 deletions
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10
README.md
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@ -1,5 +1,5 @@
# Digi Embedded Yocto (DEY) 5.0
## Release 5.0-r3
## Release 5.0-r4
This document provides information about Digi Embedded Yocto,
Digi International's professional embedded Yocto development environment.
@ -147,11 +147,15 @@ Documentation is available online at https://www.digi.com/resources/documentatio
# Downloads
* Demo images: https://ftp1.digi.com/support/digiembeddedyocto/5.0/r3/images/
* Software Development Kit (SDK): https://ftp1.digi.com/support/digiembeddedyocto/5.0/r3/sdk/
* Demo images: https://ftp1.digi.com/support/digiembeddedyocto/5.0/r4/images/
* Software Development Kit (SDK): https://ftp1.digi.com/support/digiembeddedyocto/5.0/r4/sdk/
# Release Changelog
## 5.0-r4
TODO
## 5.0-r3
* ST-based platforms

10
meta-digi-arm/conf/layer.conf
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@ -57,6 +57,16 @@ BBMASK += " \
meta-st-x-linux-ai/recipes-st/images/st-image-ai.bb \
"
# Tweak x-linux-isp dependencies to use ST's ISP packages
LAYERDEPENDS_x-linux-isp:remove = "st-openstlinux"
BBMASK += " \
meta-st-x-linux-isp/recipes-st/images/st-image-isp.bb \
meta-st-x-linux-isp/recipes-st/images/st-image-isp-lava.bb \
meta-st-x-linux-isp/recipes-multimedia/gstreamer/gstreamer1.0-plugins-bad_1.22.12.bbappend \
meta-st-x-linux-isp/recipes-devtools/x-linux-isp/x-linux-isp-tool.bb \
meta-st-x-linux-isp/recipes-iqtune/stm32-isp-iqtune-application-python_6.1.0.bb \
"
# Digi's General and Open Source license agreements
DIGI_EULA_FILE = "${LAYERDIR}/DIGI_EULA"
DIGI_OPEN_EULA_FILE = "${LAYERDIR}/DIGI_OPEN_EULA"

21
meta-digi-arm/conf/machine/ccimx91-dvk.conf
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@ -8,6 +8,27 @@ MACHINEOVERRIDES =. "mx91:${DIGI_FAMILY}:${DIGI_SOM}:"
# Include the machine configuration for Digi's ConnectCore 9 module
include conf/machine/include/ccimx9.inc
# Console
SERIAL_CONSOLES = "115200;ttyLP5"
# Bluetooth tty
BT_TTY ?= "ttyLP0"
# Firmware
MACHINE_FIRMWARE:append = " ${@oe.utils.conditional('HAVE_WIFI', '1', 'firmware-nxp-wifi-nxpiw612-sdio firmware-murata-nxp', '', d)}"
# Wi-Fi
WIRELESS_MODULE ?= ""
WIRELESS_MODULE:append = " ${@oe.utils.conditional('HAVE_WIFI', '1', 'kernel-module-nxp-wlan', '', d)}"
HAS_WIFI_VIRTWLANS = "true"
WLAN_P2P_INTERFACE = "p2p0"
MACHINE_EXTRA_RRECOMMENDS += "${WIRELESS_MODULE}"
# XBee
XBEE_RESET_N_GPIO ?= "gpio2@19"
XBEE_SLEEP_RQ_GPIO ?= ""
XBEE_TTY ?= "ttyLP3"
# U-Boot configurations
UBOOT_CONFIG ??= "ccimx91-dvk"
UBOOT_CONFIG[ccimx91-dvk] = "ccimx91-dvk_defconfig"

27
meta-digi-arm/conf/machine/ccimx93-dvk.conf
View File

@ -8,6 +8,28 @@ MACHINEOVERRIDES =. "mx93:${DIGI_FAMILY}:${DIGI_SOM}:"
# Include the machine configuration for Digi's ConnectCore 9 module
include conf/machine/include/ccimx9.inc
# Console
SERIAL_CONSOLES = "115200;ttyLP5"
# Bluetooth tty
BT_TTY ?= "ttyLP0"
# Firmware
MACHINE_FIRMWARE:append = " ${@oe.utils.conditional('HAVE_WIFI', '1', 'firmware-nxp-wifi-nxpiw612-sdio firmware-murata-nxp', '', d)}"
MACHINE_FIRMWARE:append = " ethos-u-firmware"
# Wi-Fi
WIRELESS_MODULE ?= ""
WIRELESS_MODULE:append = " ${@oe.utils.conditional('HAVE_WIFI', '1', 'kernel-module-nxp-wlan', '', d)}"
HAS_WIFI_VIRTWLANS = "true"
WLAN_P2P_INTERFACE = "p2p0"
MACHINE_EXTRA_RRECOMMENDS += "${WIRELESS_MODULE}"
# XBee
XBEE_RESET_N_GPIO ?= "gpio2@19"
XBEE_SLEEP_RQ_GPIO ?= ""
XBEE_TTY ?= "ttyLP3"
# U-Boot configurations
UBOOT_CONFIG ??= "ccimx93-dvk"
UBOOT_CONFIG[ccimx93-dvk] = "ccimx93-dvk_defconfig"
@ -43,7 +65,7 @@ KERNEL_DEVICETREE ?= " \
digi/ccimx9-dvk_mikroe-accel2-click.dtbo \
digi/ccimx9-dvk_mikroe-gyro-click.dtbo \
digi/ccimx93-dvk_dlc0200ccp04df-mipi-dsi.dtbo \
digi/ccimx93-dvk_lvds.dtbo \
digi/ccimx93-dvk_lvds-g101evn010.dtbo \
digi/ccimx93-dvk_nhd-3-5-640480ef-msxp-mipi-dsi.dtbo \
digi/ccimx93-dvk.dtb \
${@bb.utils.contains('DISTRO_FEATURES', 'tsn', 'digi/ccimx9-dvk_eqos-tsn.dtbo', '', d)} \
@ -53,9 +75,6 @@ FIT_CONF_DEFAULT_DTB = "ccimx93-dvk.dtb"
# Per-machine DISTRO_FEATURES customization
MACHINE_DISTRO_FEATURES_REMOVE = "vulkan"
# Add additional firmware
MACHINE_FIRMWARE:append = " ethos-u-firmware"
# Boot artifacts to be copied from the deploy dir to the installer ZIP
BOOTABLE_ARTIFACTS = " \
imx-boot##SIGNED##-ccimx93-dvk.bin \

49
meta-digi-arm/conf/machine/ccimx95-dvk.conf
View File

@ -8,8 +8,29 @@ MACHINEOVERRIDES =. "mx95:${DIGI_FAMILY}:${DIGI_SOM}:"
# Include the machine configuration for Digi's ConnectCore 9 module
include conf/machine/include/ccimx9.inc
# XBEE
XBEE_RESET_N_GPIO = "43840000.gpio@21"
# SMARC module
SMARC ?= "1"
# Machine features
MACHINE_FEATURES += "${@oe.utils.conditional('SMARC', '1', 'mca', '', d)}"
# Console
SERIAL_CONSOLES = "115200;ttyLP0"
# Bluetooth tty
BT_TTY ?= "ttyLP4"
# Firmware
MACHINE_FIRMWARE:append = " ${@oe.utils.conditional('HAVE_WIFI', '1', 'firmware-murata-infineon', '', d)}"
# Wi-Fi
HAS_WIFI_VIRTWLANS = "true"
WLAN_P2P_INTERFACE = "p2p0"
# XBee
XBEE_RESET_N_GPIO ?= "43840000.gpio@21"
XBEE_SLEEP_RQ_GPIO ?= ""
XBEE_TTY ?= "ttyLP3"
# U-Boot configurations
UBOOT_CONFIG ??= "ccimx95-dvk"
@ -43,16 +64,14 @@ DDR_FIRMWARE_NAME = " \
KERNEL_DEVICETREE ?= " \
digi/ccimx95-dvk.dtb \
digi/ccimx95-dvk_enet2.dtbo \
digi/ccimx95-dvk_lvds0_g101evn010.dtbo \
digi/ccimx95-dvk_lvds1_g101evn010.dtbo \
digi/ccimx95-dvk_mikroe-accel2-click.dtbo \
digi/ccimx95-dvk_mikroe-gyro-click.dtbo \
digi/ccimx95-dvk_expi-os08a20-cam.dtbo \
digi/ccimx95-dvk_gpio-watchdog.dtbo \
digi/ccimx95-dvk_lvds0-g101evn010.dtbo \
digi/ccimx95-dvk_lvds1-g101evn010.dtbo \
digi/ccimx95-dvk_pcam5c.dtbo \
digi/ccimx95_bt.dtbo \
digi/ccimx95_npu.dtbo \
digi/ccimx9_bt.dtbo \
digi/ccimx9_bt-dtm.dtbo \
digi/ccimx9_wifi.dtbo \
digi/ccimx95_wifi.dtbo \
"
FIT_CONF_DEFAULT_DTB = "ccimx95-dvk.dtb"
@ -63,3 +82,13 @@ DEFAULT_IMAGE_NAME ?= "dey-image-chromium"
BOOTABLE_ARTIFACTS = " \
imx-boot##SIGNED##-ccimx95-dvk.bin \
"
# Systemd logind power key event.
# short press:
# SMARC=1: graceful poweroff
# SMARC=0: suspend
# long press:
# SMARC=1: ignored by systemd (absorbed by MCA fw for a forceful poweroff)
# SMARC=0: graceful poweroff
LOGIND_HANDLE_POWER_KEY ?= "${@oe.utils.conditional('SMARC', '1', 'poweroff', 'suspend', d)}"
LOGIND_HANDLE_POWER_KEY_LONGPRESS ?= "${@oe.utils.conditional('SMARC', '1', 'ignore', 'poweroff', d)}"

30
meta-digi-arm/conf/machine/ccmp13-dvk.conf
View File

@ -96,16 +96,6 @@ WKS_FILE += "ccmp1-256MB.wks.in"
# For populate_sdk, gcc-arm-none-eabi_9 has a python2 dependency, so we remove it.
ST_TOOLS_FOR_SDK:remove = "nativesdk-gcc-arm-none-eabi"
# =========================================================================
# flashlayout
# =========================================================================
# Define the config labels to use to generate flashlayout file
# =========================================================================
# extlinux configuration
# =========================================================================
# As example, modify the default boot config for each target to M4 config
# =========================================================================
# Debug trace
# =========================================================================
@ -113,13 +103,14 @@ ST_TOOLS_FOR_SDK:remove = "nativesdk-gcc-arm-none-eabi"
ST_DEBUG_TRACE = "0"
# =========================================================================
# Flashlayouts
# Signing configuration
# =========================================================================
SIGN_HEADER_VERSION_stm32mp13 ?= "2.0"
# =========================================================================
# DEY settings
# =========================================================================
IMAGE_CLASSES = "image_types_digi image_types-stubi"
IMAGE_CLASSES = "image_types_digi"
# mkfs.ubifs parameters for boot partition (the one holding kernel and device tree files)
# Max LEB count (-c 255) calculated for a partition of up to 32 MiB considering 128 KiB erase-block size.
@ -153,14 +144,21 @@ ST_USERFS = "0"
# Boot artifacts to be copied from the deploy dir to the installer ZIP
BOOTABLE_ARTIFACTS = " \
${@oe.utils.ifelse(d.getVar('TRUSTFENCE_SIGN') == '1', 'tf-a-ccmp13-dvk-256MB-${BOOTSCHEME_DEFAULT}-nand${SIGN_SUFFIX}.stm32', \
'tf-a-ccmp13-dvk-256MB-${BOOTSCHEME_DEFAULT}-nand.stm32')} \
${@oe.utils.ifelse(d.getVar('TRUSTFENCE_SIGN') == '1', \
oe.utils.ifelse(d.getVar('TRUSTFENCE_ENCRYPT') == '0', 'tf-a-ccmp13-dvk-256MB-${BOOTSCHEME_DEFAULT}-nand${SIGN_SUFFIX}.stm32 ', \
'tf-a-ccmp13-dvk-256MB-${BOOTSCHEME_DEFAULT}-nand${ENCRYPT_SUFFIX}${SIGN_SUFFIX}.stm32 '), \
'tf-a-ccmp13-dvk-256MB-${BOOTSCHEME_DEFAULT}-nand.stm32 ')} \
metadata-ccmp13-dvk.bin \
${@oe.utils.ifelse(d.getVar('TRUSTFENCE_SIGN') == '1', 'fip-ccmp13-dvk-256MB-${BOOTSCHEME_DEFAULT}-nand${SIGN_SUFFIX}.bin', \
'fip-ccmp13-dvk-256MB-${BOOTSCHEME_DEFAULT}-nand.bin')} \
${@oe.utils.ifelse(d.getVar('TRUSTFENCE_SIGN') == '1', \
oe.utils.ifelse(d.getVar('TRUSTFENCE_ENCRYPT') == '0', 'fip-ccmp13-dvk-256MB-${BOOTSCHEME_DEFAULT}-nand${SIGN_SUFFIX}.bin ', \
'fip-ccmp13-dvk-256MB-${BOOTSCHEME_DEFAULT}-nand${ENCRYPT_SUFFIX}${SIGN_SUFFIX}.bin '), \
'fip-ccmp13-dvk-256MB-${BOOTSCHEME_DEFAULT}-nand.bin ')} \
"
# Default overlayfs_etc mount point and type
OVERLAYFS_ETC_MOUNT_POINT ?= "/mnt/data"
OVERLAYFS_ETC_DEVICE ?= "ubi1:data"
OVERLAYFS_ETC_FSTYPE ?= "ubifs"
# Bluetooth
BT_TTY ?= "ttySTM1"

18
meta-digi-arm/conf/machine/ccmp15-dvk.conf
View File

@ -112,16 +112,6 @@ WKS_FILES += " \
# For populate_sdk, gcc-arm-none-eabi_9 has a python2 dependency, so we remove it.
ST_TOOLS_FOR_SDK:remove = "nativesdk-gcc-arm-none-eabi"
# =========================================================================
# flashlayout
# =========================================================================
# Define the config labels to use to generate flashlayout file
# =========================================================================
# extlinux configuration
# =========================================================================
# As example, modify the default boot config for each target to M4 config
# =========================================================================
# Debug trace
# =========================================================================
@ -129,13 +119,14 @@ ST_TOOLS_FOR_SDK:remove = "nativesdk-gcc-arm-none-eabi"
ST_DEBUG_TRACE = "0"
# =========================================================================
# Flashlayouts
# Signing configuration
# =========================================================================
SIGN_HEADER_VERSION_stm32mp15 ?= "1.0"
# =========================================================================
# DEY settings
# =========================================================================
IMAGE_CLASSES = "image_types_digi image_types-stubi"
IMAGE_CLASSES = "image_types_digi"
# mkfs.ubifs parameters for boot partition (the one holding kernel and device tree files)
# Max LEB count (-c 255) calculated for a partition of up to 32 MiB considering 128 KiB erase-block size.
@ -181,3 +172,6 @@ BOOTABLE_ARTIFACTS = " \
OVERLAYFS_ETC_MOUNT_POINT ?= "/mnt/data"
OVERLAYFS_ETC_DEVICE ?= "ubi1:data"
OVERLAYFS_ETC_FSTYPE ?= "ubifs"
# Bluetooth
BT_TTY ?= "ttySTM1"

11
meta-digi-arm/conf/machine/ccmp25-dvk.conf
View File

@ -118,6 +118,14 @@ WKS_FILES += " \
ccmp2-1GB.wks.in \
"
# =========================================================================
# Signing configuration
# =========================================================================
SIGN_HEADER_VERSION_stm32mp25 ?= "2.2"
# =========================================================================
# DEY settings
# =========================================================================
# Wireless external module
HAS_WIFI_VIRTWLANS = "true"
@ -166,3 +174,6 @@ IMAGE_ROOTFS_MAXSIZE = "2621440"
OVERLAYFS_ETC_MOUNT_POINT ?= "/mnt/data"
OVERLAYFS_ETC_DEVICE ?= "/dev/mmcblk0p11"
OVERLAYFS_ETC_FSTYPE ?= "ext4"
# Bluetooth
BT_TTY ?= "ttySTM1"

20
meta-digi-arm/conf/machine/include/ccimx9.inc
View File

@ -53,11 +53,6 @@ TRUSTFENCE_SIGN_MODE = "AHAB"
IMX_BOOT_SEEK = "32"
SERIAL_CONSOLES = "115200;ttyLP5"
# Bluetooth tty
BT_TTY ?= "ttyLP0"
# SWUpdate sw-description configuration
BOOTFS_EXT ?= ".boot.vfat"
ROOTFS_EXT ?= '${@bb.utils.contains("IMAGE_FEATURES", "read-only-rootfs", ".squashfs", ".ext4.gz", d)}'
@ -67,21 +62,6 @@ ROOTFS_DEV_NAME ?= "/dev/mmcblk0p3"
ROOTFS_ENC_DEV = "/dev/mapper/cryptrootfs"
ROOTFS_DEV_NAME_FINAL = "${@oe.utils.ifelse(d.getVar('TRUSTFENCE_ENCRYPT_ROOTFS') == '1', '${ROOTFS_ENC_DEV}', '${ROOTFS_DEV_NAME}')}"
# Wireless external module
WIRELESS_MODULE ?= ""
WIRELESS_MODULE:append = " ${@oe.utils.conditional('HAVE_WIFI', '1', 'kernel-module-nxp-wlan', '', d)}"
HAS_WIFI_VIRTWLANS = "true"
# Machine firmware
MACHINE_FIRMWARE:append = " ${@oe.utils.conditional('HAVE_WIFI', '1', 'firmware-nxp-wifi-nxpiw612-sdio firmware-murata-nxp', '', d)}"
MACHINE_EXTRA_RRECOMMENDS += "${WIRELESS_MODULE}"
# XBee
XBEE_RESET_N_GPIO ?= "gpio2@19"
XBEE_SLEEP_RQ_GPIO ?= ""
XBEE_TTY ?= "ttyLP3"
# Default overlayfs_etc mount point and type
OVERLAYFS_ETC_MOUNT_POINT ?= "/mnt/data"
OVERLAYFS_ETC_DEVICE ?= "/dev/mmcblk0p7"

3
meta-digi-arm/conf/machine/include/ccmp1.inc
View File

@ -114,6 +114,9 @@ SWUPDATE_MTD_BLACKLIST = "0 1 2 3 4 5"
# Remove custom kernel headers from toolchain
ST_TOOLS_FOR_TARGET_SDK:remove = "kernel-headers"
# Disable partitions configuration from ST layer
ENABLE_PARTITIONS_IMAGE ??= "0"
# Skip warnings for packages using 32-bit APIs
INSANE_SKIP:append:pn-alsa-lib = " 32bit-time"
INSANE_SKIP:append:pn-ir-keytable = " 32bit-time"

10
meta-digi-arm/conf/machine/include/ccmp2.inc
View File

@ -130,3 +130,13 @@ ENABLE_FLASHLAYOUT_CONFIG = "0"
# Remove custom kernel headers from toolchain
ST_TOOLS_FOR_TARGET_SDK:remove = " kernel-headers "
# Remove toolchain for TF-A on aarch64 added by st-machine-common-stm32mp.inc
# because it throws a build issue.
ST_TOOLS_FOR_SDK:remove:aarch64 = " \
nativesdk-gcc-aarch64-none-elf \
nativesdk-gcc-aarch64-none-elf-staticdev \
"
# Disable partitions configuration from ST layer
ENABLE_PARTITIONS_IMAGE ??= "0"

5
meta-digi-arm/conf/machine/include/digi-defaults.inc
View File

@ -116,6 +116,7 @@ BOOTLOADER_SEEK_BOOTPART ?= "0"
# This is otherwise forced by systemd because of hard-coded paths
# in systemd source code.
ROOT_HOME ?= "/root"
CC_CONTAINER_PATH ?= "${ROOT_HOME}/cc-container"
# Default IMAGE_FSTYPES for eMMC/NAND
IMAGE_FSTYPES ?= "${@ \
@ -130,3 +131,7 @@ IMAGE_FSTYPES ?= "${@ \
'' , d), \
d) \
}"
# Systemd logind power key event
LOGIND_HANDLE_POWER_KEY ??= "suspend"
LOGIND_HANDLE_POWER_KEY_LONGPRESS ??= "poweroff"

16
meta-digi-arm/conf/machine/include/imx-digi-base.inc
View File

@ -236,13 +236,13 @@ IMX_EXTRA_FIRMWARE:mx95-generic-bsp = "imx-boot-firmware-files firmware-ele-im
# Firmware
MACHINE_FIRMWARE ?= ""
MACHINE_FIRMWARE:append:mx6-generic-bsp = " firmware-imx-sdma-imx6q"
MACHINE_FIRMWARE:append:mx6-generic-bsp = " linux-firmware-imx-sdma-imx6q"
MACHINE_FIRMWARE:append:mx6q-generic-bsp = " firmware-imx-vpu-imx6q"
MACHINE_FIRMWARE:append:mx6dl-generic-bsp = " firmware-imx-vpu-imx6d firmware-imx-epdc"
MACHINE_FIRMWARE:append:mx8mm-generic-bsp = " firmware-imx-sdma-imx7d"
MACHINE_FIRMWARE:append:mx8mn-generic-bsp = " firmware-imx-sdma-imx7d firmware-imx-easrc-imx8mn"
MACHINE_FIRMWARE:append:mx8qxp-generic-bsp = " firmware-imx-sdma-imx7d firmware-imx-vpu-amphion"
MACHINE_FIRMWARE:append:mx8dx-generic-bsp = " firmware-imx-sdma-imx7d firmware-imx-vpu-amphion"
MACHINE_FIRMWARE:append:mx8mm-generic-bsp = " linux-firmware-imx-sdma-imx7d"
MACHINE_FIRMWARE:append:mx8mn-generic-bsp = " linux-firmware-imx-sdma-imx7d firmware-imx-easrc-imx8mn"
MACHINE_FIRMWARE:append:mx8qxp-generic-bsp = " linux-firmware-imx-sdma-imx7d firmware-imx-vpu-amphion"
MACHINE_FIRMWARE:append:mx8dx-generic-bsp = " linux-firmware-imx-sdma-imx7d firmware-imx-vpu-amphion"
MACHINE_FIRMWARE:append:mx95-generic-bsp = " firmware-imx-vpu-wave"
MACHINE_EXTRA_RRECOMMENDS += "${MACHINE_FIRMWARE}"
@ -289,7 +289,7 @@ PREFERRED_VERSION_gstreamer1.0-vaapi:imx-nxp-bsp ??= "1.24.0.imx"
PREFERRED_VERSION_ffmpeg:imx-nxp-bsp ??= "4.4.1"
# Use newer libvpx from 'meta-oe' (otherwise uses older from 'meta-webkit)
PREFERRED_VERSION_libvpx:imx-nxp-bsp ??= "1.14.0"
PREFERRED_VERSION_libvpx:imx-nxp-bsp ??= "1.14.%"
# Determines if the SoC has support for Vivante kernel driver
SOC_HAS_VIVANTE_KERNEL_DRIVER_SUPPORT = "0"
@ -390,8 +390,8 @@ WKS_FILE_DEPENDS:append:mx8-nxp-bsp = " imx-boot"
WKS_FILE_DEPENDS:append:mx9-nxp-bsp = " imx-boot"
SOC_DEFAULT_WKS_FILE ?= "imx-uboot-bootpart.wks.in"
SOC_DEFAULT_WKS_FILE:mx8-generic-bsp ?= "imx-imx-boot-bootpart.wks.in"
SOC_DEFAULT_WKS_FILE:mx9-generic-bsp ?= "imx-imx-boot-bootpart.wks.in"
SOC_DEFAULT_WKS_FILE:mx8-generic-bsp ?= "imx-imx-boot-bootpart-uboot-env.wks.in"
SOC_DEFAULT_WKS_FILE:mx9-generic-bsp ?= "imx-imx-boot-bootpart-uboot-env.wks.in"
WKS_FILE ?= "${SOC_DEFAULT_WKS_FILE}"

6
meta-digi-arm/conf/templates/ccimx95-dvk/conf-notes.txt
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@ -18,3 +18,9 @@ Digi Embedded Yocto provides the following image recipes:
Expansion of custom Digi core-image-base including full Flutter
framework support.
* dey-image-container-manager: container management image
Minimal image including the trimmed Podman and LXC runtimes used to
manage container artifacts on target.
Requires DISTRO_FEATURES:append = " virtualization" in local.conf.

6
meta-digi-arm/conf/templates/ccmp25-dvk/conf-notes.txt
View File

@ -19,6 +19,12 @@ Digi Embedded Yocto provides the following image recipes:
Expansion of custom Digi core-image-base including full Flutter
framework support.
* dey-image-container-manager: container management image
Minimal image including the trimmed Podman and LXC runtimes used to
manage container artifacts on target.
Requires DISTRO_FEATURES:append = " virtualization" in local.conf.
* core-image-base: a console-only image
Expansion of native core-image-base by including all the support for the

32672
meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-oei/imx-oei/0001-boards-ccimx95-add-platform-as-a-clone-of-mx95lp5.patch
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21814
meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-oei/imx-oei/0002-ddr-add-DDR-configuration-file-for-ccimx95.patch
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56
meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-oei/imx-oei/0003-ccimx95-configure-console-on-LPUART6.patch
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@ -1,56 +0,0 @@
From: Isaac Hermida <isaac.hermida@digi.com>
Date: Mon, 15 Sep 2025 11:38:55 +0200
Subject: [PATCH] ccimx95: configure console on LPUART6
Upstream-Status: Inappropriate [DEY specific]
Signed-off-by: Javier Viguera <javier.viguera@digi.com>
---
boards/ccimx95/config_board.h | 2 +-
boards/ccimx95/pin_mux.c | 7 +++++++
devices/MIMX95/oei/soc_clock.c | 2 ++
3 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/boards/ccimx95/config_board.h b/boards/ccimx95/config_board.h
index 3095ebf1d8ce..ec97626a2a28 100644
--- a/boards/ccimx95/config_board.h
+++ b/boards/ccimx95/config_board.h
@@ -52,7 +52,7 @@
/* Defines */
/*! Config for UART instance */
-#define BOARD_DEBUG_UART_INSTANCE 2U
+#define BOARD_DEBUG_UART_INSTANCE 6U
/*! Config for UART baudrate */
#define BOARD_DEBUG_UART_BAUDRATE 115200U
diff --git a/boards/ccimx95/pin_mux.c b/boards/ccimx95/pin_mux.c
index a8c15513b578..3cb33909f740 100644
--- a/boards/ccimx95/pin_mux.c
+++ b/boards/ccimx95/pin_mux.c
@@ -29,5 +29,12 @@ void BOARD_InitPins(void)
IOMUXC_SetPinMux(IOMUXC_PAD_UART2_TXD__LPUART2_TX, 0);
IOMUXC_SetPinConfig(IOMUXC_PAD_UART2_TXD__LPUART2_TX, IOMUXC_PAD_DSE(0xFU));
+#elif (BOARD_DEBUG_UART_INSTANCE == 6U)
+ /* Configure LPUART 6 */
+ IOMUXC_SetPinMux(IOMUXC_PAD_GPIO_IO05__LPUART6_RX, 0);
+ IOMUXC_SetPinConfig(IOMUXC_PAD_GPIO_IO05__LPUART6_RX, IOMUXC_PAD_PD(1U));
+
+ IOMUXC_SetPinMux(IOMUXC_PAD_GPIO_IO04__LPUART6_TX, 0);
+ IOMUXC_SetPinConfig(IOMUXC_PAD_GPIO_IO04__LPUART6_TX, IOMUXC_PAD_DSE(0xFU));
#endif
}
diff --git a/devices/MIMX95/oei/soc_clock.c b/devices/MIMX95/oei/soc_clock.c
index 3421e3efe143..9205b9a12782 100644
--- a/devices/MIMX95/oei/soc_clock.c
+++ b/devices/MIMX95/oei/soc_clock.c
@@ -25,6 +25,8 @@ static struct clk_root_cfg clk_root_cfgs[] = {
{ CLOCK_ROOT_LPUART1, CLOCK_SRC_OSC24M, 1}, /* 24MHz */
#elif (BOARD_DEBUG_UART_INSTANCE == 2)
{ CLOCK_ROOT_LPUART2, CLOCK_SRC_OSC24M, 1}, /* 24MHz */
+#elif (BOARD_DEBUG_UART_INSTANCE == 6)
+ { CLOCK_ROOT_LPUART6, CLOCK_SRC_OSC24M, 1}, /* 24MHz */
#endif
#endif
};

10713
meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-oei/imx-oei/0004-ccimx95-add-DDR-configuration-file-for-ccimx95-B0-si.patch
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18
meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-oei/imx-oei_1.0.0.bbappend
View File

@ -1,10 +1,12 @@
# Copyright (C) 2025, Digi International Inc.
# Copyright (C) 2025,2026 Digi International Inc.
FILESEXTRAPATHS:prepend := "${THISDIR}/${BPN}:"
# Select internal or Github imx-oei repo
IMX_OEI_URI_STASH = "${DIGI_MTK_GIT}/emp/imx-oei.git;protocol=ssh"
IMX_OEI_URI_GITHUB = "${DIGI_GITHUB_GIT}/imx-oei.git;protocol=https"
IMX_OEI_SRC:dey = "${@oe.utils.conditional('DIGI_INTERNAL_GIT', '1', '${IMX_OEI_URI_STASH}', '${IMX_OEI_URI_GITHUB}', d)}"
SRC_URI:append:dey = " \
file://0001-boards-ccimx95-add-platform-as-a-clone-of-mx95lp5.patch \
file://0002-ddr-add-DDR-configuration-file-for-ccimx95.patch \
file://0003-ccimx95-configure-console-on-LPUART6.patch \
file://0004-ccimx95-add-DDR-configuration-file-for-ccimx95-B0-si.patch \
"
SRCBRANCH:dey = "dey/scarthgap/lf-6.6.52-2.2.2"
# NXP's 'lf-6.6.52_2.2.2' release + patches
SRCREV:dey = "0a1fbc5ce9c4bed08d0add95c911749e56a7d57a"
OEI_DEBUG:dey = "1"

44
meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager.inc Normal file
View File

@ -0,0 +1,44 @@
# Set generic compiler for system manager core
INHIBIT_DEFAULT_DEPS = "1"
DEPENDS = "${SM_COMPILER}"
SM_COMPILER ?= "gcc-arm-none-eabi-native"
PROVIDES += "virtual/imx-system-manager"
inherit deploy
PACKAGE_ARCH = "${MACHINE_ARCH}"
# Set monitor mode for none, one, or two
PACKAGECONFIG[m0] = "M=0,,,,,m1 m2"
PACKAGECONFIG[m1] = ",,,,,m0 m2"
PACKAGECONFIG[m2] = "M=2,,,,,m0 m1"
SYSTEM_MANAGER_CONFIG ?= "INVALID"
LDFLAGS[unexport] = "1"
EXTRA_OEMAKE = " \
V=1 \
SM_CROSS_COMPILE=arm-none-eabi- \
${PACKAGECONFIG_CONFARGS} \
"
do_configure() {
oe_runmake config=${SYSTEM_MANAGER_CONFIG} clean
oe_runmake config=${SYSTEM_MANAGER_CONFIG} cfg
}
do_compile() {
oe_runmake config=${SYSTEM_MANAGER_CONFIG}
}
do_install[noexec] = "1"
addtask deploy after do_compile
do_deploy() {
install -D -p -m 0644 \
${B}/build/${SYSTEM_MANAGER_CONFIG}/${SYSTEM_MANAGER_FIRMWARE_BASENAME}.bin \
${DEPLOYDIR}/${SYSTEM_MANAGER_FIRMWARE_BASENAME}-${SYSTEM_MANAGER_CONFIG}.bin
}
COMPATIBLE_MACHINE = "(mx95-generic-bsp)"

6195
meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0001-ccimx95dvk-add-new-platform-config-and-board.patch
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3541
meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0002-ccimx95dvk-configure-board-and-switch-debug-UART-to-.patch
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254
meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0003-ccimx95dvk-disable-PCAL6408A-expander-and-move-GPIO1.patch
View File

@ -1,254 +0,0 @@
From: Javier Viguera <javier.viguera@digi.com>
Date: Mon, 15 Sep 2025 12:37:05 +0200
Subject: [PATCH] ccimx95dvk: disable PCAL6408A expander and move GPIO1 to A55
Our board does not populate that expander, so disable the initialization
and assign GPIO1 to be used by the A55 cpu.
Upstream-Status: Inappropriate [DEY specific]
Signed-off-by: Javier Viguera <javier.viguera@digi.com>
---
boards/ccimx95dvk/board.c | 7 ---
boards/ccimx95dvk/pin_mux.c | 4 --
boards/ccimx95dvk/sm/brd_sm.c | 9 ---
boards/ccimx95dvk/sm/brd_sm_handlers.c | 82 --------------------------
configs/ccimx95dvk.cfg | 3 +-
configs/ccimx95dvk/config_scmi.h | 2 +
configs/ccimx95dvk/config_trdc.h | 2 +-
7 files changed, 5 insertions(+), 104 deletions(-)
diff --git a/boards/ccimx95dvk/board.c b/boards/ccimx95dvk/board.c
index d4a671f6d7f8..012a04540fd1 100755
--- a/boards/ccimx95dvk/board.c
+++ b/boards/ccimx95dvk/board.c
@@ -337,9 +337,6 @@ void BOARD_InitHandlers(void)
/* Enable FCCU handler */
NVIC_SetPriority(FCCU_INT0_IRQn, IRQ_PRIO_NOPREEMPT_CRITICAL);
NVIC_EnableIRQ(FCCU_INT0_IRQn);
-
- /* Enable GPIO1 handler */
- NVIC_EnableIRQ(GPIO1_0_IRQn);
}
/*--------------------------------------------------------------------------*/
@@ -509,10 +506,6 @@ void BOARD_SystemSleepPrepare(uint32_t sleepMode, uint32_t sleepFlags)
(void) CPU_PerLpiConfigSet(CPU_IDX_M33P, s_uartConfig.perLpiId,
CPU_PER_LPI_ON_RUN_WAIT_STOP);
}
-
- /* Configure LPI for GPIO1 */
- (void) CPU_PerLpiConfigSet(CPU_IDX_M33P, CPU_PER_LPI_IDX_GPIO1,
- CPU_PER_LPI_ON_RUN_WAIT_STOP);
}
/*--------------------------------------------------------------------------*/
diff --git a/boards/ccimx95dvk/pin_mux.c b/boards/ccimx95dvk/pin_mux.c
index 60f6d27c41c5..800126f3814b 100755
--- a/boards/ccimx95dvk/pin_mux.c
+++ b/boards/ccimx95dvk/pin_mux.c
@@ -57,9 +57,5 @@ void BOARD_InitPins(void)
IOMUXC_SetPinConfig(IOMUXC_PAD_I2C2_SDA__LPI2C2_SDA, IOMUXC_PAD_DSE(0xFU)
| IOMUXC_PAD_FSEL1(0x3U) | IOMUXC_PAD_PU(0x1U) | IOMUXC_PAD_OD(0x1U));
#endif
-
- /* Configure GPIO1-10 (INT from the PCAL6408A */
- IOMUXC_SetPinMux(IOMUXC_PAD_PDM_BIT_STREAM1__GPIO1_IO_BIT10, 0U);
- IOMUXC_SetPinConfig(IOMUXC_PAD_PDM_BIT_STREAM1__GPIO1_IO_BIT10, 0U);
}
diff --git a/boards/ccimx95dvk/sm/brd_sm.c b/boards/ccimx95dvk/sm/brd_sm.c
index cd48b590cd26..48a8486a2acd 100755
--- a/boards/ccimx95dvk/sm/brd_sm.c
+++ b/boards/ccimx95dvk/sm/brd_sm.c
@@ -459,15 +459,6 @@ void BRD_SM_ShutdownRecordSave(dev_sm_rst_rec_t shutdownRec)
int32_t BRD_SM_SystemReset(void)
{
int32_t status = SM_ERR_SUCCESS;
- rgpio_pin_config_t gpioConfig =
- {
- kRGPIO_DigitalOutput,
- 0U
- };
-
- /* Drive WDOG_ANY to reset PMIC */
- RGPIO_PinInit(GPIO1, 15U, &gpioConfig);
- IOMUXC_SetPinMux(IOMUXC_PAD_WDOG_ANY__GPIO1_IO_BIT15, 0U);
/* Wait for PMIC to react */
SystemTimeDelay(1000U);
diff --git a/boards/ccimx95dvk/sm/brd_sm_handlers.c b/boards/ccimx95dvk/sm/brd_sm_handlers.c
index a96f6ce0e2f4..19ee28e93134 100755
--- a/boards/ccimx95dvk/sm/brd_sm_handlers.c
+++ b/boards/ccimx95dvk/sm/brd_sm_handlers.c
@@ -96,26 +96,6 @@ int32_t BRD_SM_SerialDevicesInit(void)
{
int32_t status = SM_ERR_SUCCESS;
LPI2C_Type *const s_i2cBases[] = LPI2C_BASE_PTRS;
- pcal6408a_config_t pcal6408Config;
-
- /* Fill in PCAL6408A dev */
- g_pcal6408aDev.i2cBase = s_i2cBases[BOARD_I2C_INSTANCE];
- g_pcal6408aDev.devAddr = BOARD_PCAL6408A_DEV_ADDR;
-
- /* Init the bus expander */
- PCAL6408A_GetDefaultConfig(&pcal6408Config);
- pcal6408Config.inputLatch = 0xFFU;
- if (!PCAL6408A_Init(&g_pcal6408aDev, &pcal6408Config))
- {
- status = SM_ERR_HARDWARE_ERROR;
- }
- else
- {
- if (!PCAL6408A_IntMaskSet(&g_pcal6408aDev, PCAL6408A_INITIAL_MASK))
- {
- status = SM_ERR_HARDWARE_ERROR;
- }
- }
if (status == SM_ERR_SUCCESS)
{
@@ -254,20 +234,6 @@ int32_t BRD_SM_SerialDevicesInit(void)
}
}
- if (status == SM_ERR_SUCCESS)
- {
- rgpio_pin_config_t gpioConfig =
- {
- kRGPIO_DigitalInput,
- 0U
- };
-
- /* Init GPIO1-10 */
- RGPIO_PinInit(GPIO1, 10U, &gpioConfig);
- RGPIO_SetPinInterruptConfig(GPIO1, 10U, kRGPIO_InterruptOutput0,
- kRGPIO_InterruptLogicZero);
- }
-
/* Return status */
return status;
}
@@ -300,54 +266,6 @@ int32_t BRD_SM_BusExpMaskSet(uint8_t val, uint8_t mask)
return status;
}
-/*--------------------------------------------------------------------------*/
-/* GPIO1 handler */
-/*--------------------------------------------------------------------------*/
-void GPIO1_0_IRQHandler(void)
-{
- uint32_t flags;
- uint8_t status, val;
-
- /* Get GPIO status */
- flags = RGPIO_GetPinsInterruptFlags(GPIO1, kRGPIO_InterruptOutput0);
-
- /* Get PCAL6408A status */
- (void) PCAL6408A_IntStatusGet(&g_pcal6408aDev, &status);
-
- /* Get value and Clear PCAL6408A interrupts */
- (void) PCAL6408A_InputGet(&g_pcal6408aDev, &val);
-
- /* Clear GPIO interrupts */
- RGPIO_ClearPinsInterruptFlags(GPIO1, kRGPIO_InterruptOutput0, flags);
-
- /* Handle PF09 interrupt */
- if ((status & BIT8(PCAL6408A_INPUT_PF09_INT)) != 0U)
- {
- /* Asserts low */
- if ((val & BIT8(PCAL6408A_INPUT_PF09_INT)) == 0U)
- {
- BRD_SM_Pf09Handler();
- }
- }
-
- /* Handle PCA2131 interrupt */
- if (g_pca2131Used && ((status & BIT8(PCAL6408A_INPUT_PCA2131_INT))
- != 0U))
- {
- /* Asserts low */
- if ((val & BIT8(PCAL6408A_INPUT_PCA2131_INT)) == 0U)
- {
- BRD_SM_BbmHandler();
- }
- }
-
- /* Handle controls interrupts */
- BRD_SM_ControlHandler(status, val);
-
- /* Adjust dynamic IRQ priority */
- (void) DEV_SM_IrqPrioUpdate();
-}
-
/*==========================================================================*/
/*--------------------------------------------------------------------------*/
diff --git a/configs/ccimx95dvk.cfg b/configs/ccimx95dvk.cfg
index da383aab036c..86d39e6e1fba 100755
--- a/configs/ccimx95dvk.cfg
+++ b/configs/ccimx95dvk.cfg
@@ -197,7 +197,6 @@ ELE OWNER
FSB READONLY
GIC ACCESS
GPC OWNER
-GPIO1 OWNER
GPR0 OWNER
GPR1 OWNER
GPR2 OWNER
@@ -482,6 +481,7 @@ PERLPI_LPUART4 ALL
PERLPI_LPUART5 ALL
PERLPI_LPUART6 ALL
PERLPI_LPUART8 ALL
+PERLPI_GPIO1 ALL
PERLPI_WDOG3 ALL
PERLPI_WDOG4 ALL
SYS ALL
@@ -715,6 +715,7 @@ FLEXIO2 OWNER
FLEXSPI1 OWNER
FSB READONLY
GIC OWNER
+GPIO1 OWNER
GPIO2 OWNER
GPIO3 OWNER
GPIO4 OWNER
diff --git a/configs/ccimx95dvk/config_scmi.h b/configs/ccimx95dvk/config_scmi.h
index e1b81cc03f58..c1cc90313174 100644
--- a/configs/ccimx95dvk/config_scmi.h
+++ b/configs/ccimx95dvk/config_scmi.h
@@ -192,6 +192,7 @@
.perlpiPerms[DEV_SM_PERLPI_CAN3] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_CAN4] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_CAN5] = SM_SCMI_PERM_ALL, \
+ .perlpiPerms[DEV_SM_PERLPI_GPIO1] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_GPIO2] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_GPIO3] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_GPIO4] = SM_SCMI_PERM_ALL, \
@@ -474,6 +475,7 @@
.perlpiPerms[DEV_SM_PERLPI_CAN3] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_CAN4] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_CAN5] = SM_SCMI_PERM_ALL, \
+ .perlpiPerms[DEV_SM_PERLPI_GPIO1] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_GPIO2] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_GPIO3] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_GPIO4] = SM_SCMI_PERM_ALL, \
diff --git a/configs/ccimx95dvk/config_trdc.h b/configs/ccimx95dvk/config_trdc.h
index 1d8ed0b6fc95..47df6a7577d5 100644
--- a/configs/ccimx95dvk/config_trdc.h
+++ b/configs/ccimx95dvk/config_trdc.h
@@ -116,7 +116,6 @@
SM_CFG_W1(0x00010470U), 0x33333333U, \
SM_CFG_W1(0x00010474U), 0x00003000U, \
SM_CFG_W1(0x00010580U), 0x000003C0U, \
- SM_CFG_W1(0x000105a8U), 0x00000003U, \
SM_CFG_W1(0x00010640U), 0x99999999U, \
SM_CFG_W1(0x00010644U), 0x99999999U, \
SM_CFG_W1(0x00010648U), 0x99999999U, \
@@ -129,6 +128,7 @@
SM_CFG_W1(0x0001066cU), 0x90909000U, \
SM_CFG_W1(0x00010670U), 0x00009000U, \
SM_CFG_W1(0x00010780U), 0x099330C0U, \
+ SM_CFG_W1(0x000107a8U), 0x00000009U, \
SM_CFG_Z1(0x00010850U), \
SM_CFG_W1(0x00010854U), 0x9000C000U, \
SM_CFG_W1(0x00010858U), 0x00000099U, \

206
meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0004-ccimx95dvk-move-resources-from-M7-to-A55.patch
View File

@ -1,206 +0,0 @@
From: Javier Viguera <javier.viguera@digi.com>
Date: Tue, 16 Sep 2025 17:51:14 +0200
Subject: [PATCH] ccimx95dvk: move resources from M7 to A55
Moved from M7 to A55 domain:
* LPUART7
* PIN_GPIO_IO14
* PIN_GPIO_IO15
Upstream-Status: Inappropriate [DEY specific]
Signed-off-by: Javier Viguera <javier.viguera@digi.com>
---
configs/ccimx95dvk.cfg | 11 ++++-------
configs/ccimx95dvk/config_scmi.h | 15 ++++++++-------
configs/ccimx95dvk/config_test.h | 7 +------
configs/ccimx95dvk/config_trdc.h | 3 +--
4 files changed, 14 insertions(+), 22 deletions(-)
diff --git a/configs/ccimx95dvk.cfg b/configs/ccimx95dvk.cfg
index 86d39e6e1fba..393c29436894 100755
--- a/configs/ccimx95dvk.cfg
+++ b/configs/ccimx95dvk.cfg
@@ -369,7 +369,6 @@ LPIT1 OWNER
LPTMR1 OWNER
LPTMR2 OWNER
LPTPM1 OWNER
-LPUART3 OWNER, test
MSGINTR1 OWNER
MSGINTR2 OWNER
MU5_A OWNER
@@ -382,11 +381,6 @@ TSTMR2 OWNER
V2X_SHE1 OWNER
WDOG5 OWNER
-# Pins
-
-PIN_GPIO_IO14 OWNER
-PIN_GPIO_IO15 OWNER
-
# Memory
M7MIX DATA, begin=0x020380000, end=0x02047FFFF
@@ -477,6 +471,7 @@ PERLPI_GPIO4 ALL
PERLPI_GPIO5 ALL
PERLPI_LPUART1 ALL
PERLPI_LPUART2 ALL
+PERLPI_LPUART3 ALL
PERLPI_LPUART4 ALL
PERLPI_LPUART5 ALL
PERLPI_LPUART6 ALL
@@ -762,6 +757,7 @@ LPTPM5 OWNER
LPTPM6 OWNER
LPUART1 OWNER
LPUART2 OWNER
+LPUART3 OWNER
LPUART4 OWNER
LPUART5 OWNER
LPUART6 OWNER
@@ -914,6 +910,8 @@ PIN_GPIO_IO10 OWNER
PIN_GPIO_IO11 OWNER
PIN_GPIO_IO12 OWNER
PIN_GPIO_IO13 OWNER
+PIN_GPIO_IO14 OWNER
+PIN_GPIO_IO15 OWNER
PIN_GPIO_IO16 OWNER
PIN_GPIO_IO17 OWNER
PIN_GPIO_IO18 OWNER
@@ -993,4 +991,3 @@ OCRAM EXEC, begin=0x0204C0000, size=96K
GPU DATA, begin=0x04D900000, end=0x04DD7FFFF
DDR EXEC, begin=0x088000000, end=0x089FFFFFF
DDR EXEC, begin=0x08E000000, end=0x87FFFFFFF
-
diff --git a/configs/ccimx95dvk/config_scmi.h b/configs/ccimx95dvk/config_scmi.h
index c1cc90313174..0913c1339af0 100644
--- a/configs/ccimx95dvk/config_scmi.h
+++ b/configs/ccimx95dvk/config_scmi.h
@@ -69,7 +69,6 @@
.clkPerms[DEV_SM_CLK_CAN1] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_LPTMR1] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_LPTMR2] = SM_SCMI_PERM_ALL, \
- .clkPerms[DEV_SM_CLK_LPUART3] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_M7SYSTICK] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_M7] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_TSTMR2] = SM_SCMI_PERM_ALL, \
@@ -81,9 +80,6 @@
.daisyPerms[DEV_SM_DAISY_LPTMR2_0] = SM_SCMI_PERM_ALL, \
.daisyPerms[DEV_SM_DAISY_LPTMR2_1] = SM_SCMI_PERM_ALL, \
.daisyPerms[DEV_SM_DAISY_LPTMR2_2] = SM_SCMI_PERM_ALL, \
- .daisyPerms[DEV_SM_DAISY_LPUART3_CTS] = SM_SCMI_PERM_ALL, \
- .daisyPerms[DEV_SM_DAISY_LPUART3_RXD] = SM_SCMI_PERM_ALL, \
- .daisyPerms[DEV_SM_DAISY_LPUART3_TXD] = SM_SCMI_PERM_ALL, \
.faultPerms[DEV_SM_FAULT_M7_LOCKUP] = SM_SCMI_PERM_ALL, \
.faultPerms[DEV_SM_FAULT_M7_RESET] = SM_SCMI_PERM_ALL, \
.faultPerms[DEV_SM_FAULT_SW0] = SM_SCMI_PERM_ALL, \
@@ -94,10 +90,7 @@
.pdPerms[DEV_SM_PD_M7] = SM_SCMI_PERM_ALL, \
.perfPerms[DEV_SM_PERF_M7] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_CAN1] = SM_SCMI_PERM_ALL, \
- .perlpiPerms[DEV_SM_PERLPI_LPUART3] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_WDOG5] = SM_SCMI_PERM_ALL, \
- .pinPerms[DEV_SM_PIN_GPIO_IO14] = SM_SCMI_PERM_ALL, \
- .pinPerms[DEV_SM_PIN_GPIO_IO15] = SM_SCMI_PERM_ALL, \
.rtcPerms[BRD_SM_RTC_PCA2131] = SM_SCMI_PERM_ALL, \
.rtcPerms[DEV_SM_RTC_BBNSM] = SM_SCMI_PERM_PRIV, \
.sensorPerms[BRD_SM_SENSOR_TEMP_PF09] = SM_SCMI_PERM_SET, \
@@ -199,6 +192,7 @@
.perlpiPerms[DEV_SM_PERLPI_GPIO5] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_LPUART1] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_LPUART2] = SM_SCMI_PERM_ALL, \
+ .perlpiPerms[DEV_SM_PERLPI_LPUART3] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_LPUART4] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_LPUART5] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_LPUART6] = SM_SCMI_PERM_ALL, \
@@ -291,6 +285,7 @@
.clkPerms[DEV_SM_CLK_LPSPI8] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_LPUART1] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_LPUART2] = SM_SCMI_PERM_ALL, \
+ .clkPerms[DEV_SM_CLK_LPUART3] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_LPUART4] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_LPUART5] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_LPUART6] = SM_SCMI_PERM_ALL, \
@@ -398,6 +393,9 @@
.daisyPerms[DEV_SM_DAISY_LPSPI4_SCK] = SM_SCMI_PERM_ALL, \
.daisyPerms[DEV_SM_DAISY_LPSPI4_SDI] = SM_SCMI_PERM_ALL, \
.daisyPerms[DEV_SM_DAISY_LPSPI4_SDO] = SM_SCMI_PERM_ALL, \
+ .daisyPerms[DEV_SM_DAISY_LPUART3_CTS] = SM_SCMI_PERM_ALL, \
+ .daisyPerms[DEV_SM_DAISY_LPUART3_RXD] = SM_SCMI_PERM_ALL, \
+ .daisyPerms[DEV_SM_DAISY_LPUART3_TXD] = SM_SCMI_PERM_ALL, \
.daisyPerms[DEV_SM_DAISY_LPUART4_CTS] = SM_SCMI_PERM_ALL, \
.daisyPerms[DEV_SM_DAISY_LPUART4_RXD] = SM_SCMI_PERM_ALL, \
.daisyPerms[DEV_SM_DAISY_LPUART4_TXD] = SM_SCMI_PERM_ALL, \
@@ -482,6 +480,7 @@
.perlpiPerms[DEV_SM_PERLPI_GPIO5] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_LPUART1] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_LPUART2] = SM_SCMI_PERM_ALL, \
+ .perlpiPerms[DEV_SM_PERLPI_LPUART3] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_LPUART4] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_LPUART5] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_LPUART6] = SM_SCMI_PERM_ALL, \
@@ -536,6 +535,8 @@
.pinPerms[DEV_SM_PIN_GPIO_IO11] = SM_SCMI_PERM_ALL, \
.pinPerms[DEV_SM_PIN_GPIO_IO12] = SM_SCMI_PERM_ALL, \
.pinPerms[DEV_SM_PIN_GPIO_IO13] = SM_SCMI_PERM_ALL, \
+ .pinPerms[DEV_SM_PIN_GPIO_IO14] = SM_SCMI_PERM_ALL, \
+ .pinPerms[DEV_SM_PIN_GPIO_IO15] = SM_SCMI_PERM_ALL, \
.pinPerms[DEV_SM_PIN_GPIO_IO16] = SM_SCMI_PERM_ALL, \
.pinPerms[DEV_SM_PIN_GPIO_IO17] = SM_SCMI_PERM_ALL, \
.pinPerms[DEV_SM_PIN_GPIO_IO18] = SM_SCMI_PERM_ALL, \
diff --git a/configs/ccimx95dvk/config_test.h b/configs/ccimx95dvk/config_test.h
index cb737f33eede..efc15c56ffe9 100644
--- a/configs/ccimx95dvk/config_test.h
+++ b/configs/ccimx95dvk/config_test.h
@@ -143,12 +143,11 @@
/*--------------------------------------------------------------------------*/
/*! Config for number of tests */
-#define SM_SCMI_NUM_TEST 40U
+#define SM_SCMI_NUM_TEST 35U
/*! Config data array for tests */
#define SM_SCMI_TEST_CONFIG_DATA \
{.testId = TEST_BUTTON, .channel = 5U, .rsrc = DEV_SM_BUTTON_0}, \
- {.testId = TEST_CLK, .channel = 0U, .rsrc = DEV_SM_CLK_LPUART3}, \
{.testId = TEST_CLK, .channel = 5U, .rsrc = DEV_SM_CLK_DISPOCRAM}, \
{.testId = TEST_CLK, .channel = 5U, .rsrc = DEV_SM_CLK_ENETREF}, \
{.testId = TEST_CLK, .channel = 5U, .rsrc = DEV_SM_CLK_ENETTIMER1}, \
@@ -157,9 +156,6 @@
{.testId = TEST_CLK, .channel = 5U, .rsrc = DEV_SM_CLK_SAI1}, \
{.testId = TEST_CTRL, .channel = 5U, .rsrc = DEV_SM_CTRL_MQS1_SETTINGS}, \
{.testId = TEST_CTRL, .channel = 5U, .rsrc = DEV_SM_CTRL_SAI1_MCLK}, \
- {.testId = TEST_DAISY, .channel = 0U, .rsrc = DEV_SM_DAISY_LPUART3_CTS}, \
- {.testId = TEST_DAISY, .channel = 0U, .rsrc = DEV_SM_DAISY_LPUART3_RXD}, \
- {.testId = TEST_DAISY, .channel = 0U, .rsrc = DEV_SM_DAISY_LPUART3_TXD}, \
{.testId = TEST_DAISY, .channel = 5U, .rsrc = DEV_SM_DAISY_NETC_EMDC}, \
{.testId = TEST_DAISY, .channel = 5U, .rsrc = DEV_SM_DAISY_NETC_EMDIO}, \
{.testId = TEST_DAISY, .channel = 5U, .rsrc = DEV_SM_DAISY_NETC_ETH0_RMII_RX_ER}, \
@@ -182,7 +178,6 @@
{.testId = TEST_PERF, .channel = 5U, .rsrc = DEV_SM_PERF_GPU}, \
{.testId = TEST_PERF, .channel = 5U, .rsrc = DEV_SM_PERF_NPU}, \
{.testId = TEST_PERF, .channel = 5U, .rsrc = DEV_SM_PERF_VPU}, \
- {.testId = TEST_PERLPI, .channel = 0U, .rsrc = DEV_SM_PERLPI_LPUART3}, \
{.testId = TEST_PERLPI, .channel = 5U, .rsrc = DEV_SM_PERLPI_LPUART8}, \
{.testId = TEST_PIN, .channel = 5U, .rsrc = DEV_SM_PIN_UART1_RXD}, \
{.testId = TEST_RTC, .channel = 5U, .rsrc = DEV_SM_RTC_BBNSM}, \
diff --git a/configs/ccimx95dvk/config_trdc.h b/configs/ccimx95dvk/config_trdc.h
index 47df6a7577d5..dc6245097316 100644
--- a/configs/ccimx95dvk/config_trdc.h
+++ b/configs/ccimx95dvk/config_trdc.h
@@ -1168,7 +1168,7 @@
SM_CFG_W1(0x0001065cU), 0x99999999U, \
SM_CFG_W1(0x00010660U), 0x00909099U, \
SM_CFG_W1(0x00010664U), 0x99090990U, \
- SM_CFG_W1(0x00010668U), 0x09999999U, \
+ SM_CFG_W1(0x00010668U), 0x99999999U, \
SM_CFG_W1(0x0001066cU), 0x09999999U, \
SM_CFG_W1(0x00010670U), 0x99900009U, \
SM_CFG_W1(0x00010674U), 0x99999909U, \
@@ -1178,7 +1178,6 @@
SM_CFG_W1(0x000107a8U), 0x00000009U, \
SM_CFG_W1(0x00010860U), 0x00090000U, \
SM_CFG_W1(0x00010864U), 0x00909009U, \
- SM_CFG_W1(0x00010868U), 0x90000000U, \
SM_CFG_W1(0x00010878U), 0x00090000U, \
SM_CFG_Z1(0x00010a60U), \
SM_CFG_Z1(0x00010c60U), \

75
meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0005-ccimx95dvk-move-pads-to-non-secure-A55.patch
View File

@ -1,75 +0,0 @@
From: Hector Palacios <hector.palacios@digi.com>
Date: Wed, 24 Sep 2025 12:26:07 +0200
Subject: [PATCH] ccimx95dvk: move pads to non-secure A55
The following pads are multiplexed and used by A55 in Linux:
- PIN_UART2_RXD is used as LPUART1 CTS
- PIN_UART2_TXD is used as LPUART1 RTS
- PIN_PDM_BIT_STREAM1 is used as MIKROBUS_RST
Upstream-Status: Inappropriate [DEY specific]
Signed-off-by: Hector Palacios <hector.palacios@digi.com>
---
configs/ccimx95dvk.cfg | 5 ++++-
configs/ccimx95dvk/config_scmi.h | 3 +++
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/configs/ccimx95dvk.cfg b/configs/ccimx95dvk.cfg
index 393c29436894..bf5f0739f526 100755
--- a/configs/ccimx95dvk.cfg
+++ b/configs/ccimx95dvk.cfg
@@ -1,6 +1,7 @@
## ###################################################################
##
## Copyright 2023-2025 NXP
+## Copyright 2025 Digi International Inc.
##
## Redistribution and use in source and binary forms, with or without modification,
## are permitted provided that the following conditions are met:
@@ -285,7 +286,6 @@ L_STCU_NPUMIX OWNER
PIN_FCCU_ERR0 OWNER
PIN_I2C1_SCL OWNER
PIN_I2C1_SDA OWNER
-PIN_PDM_BIT_STREAM1 OWNER
PIN_GPIO_IO08 OWNER # LPUART7_TX
PIN_GPIO_IO09 OWNER # LPUART7_RX
PIN_WDOG_ANY OWNER
@@ -937,6 +937,7 @@ PIN_GPIO_IO37 OWNER
PIN_I2C2_SCL OWNER
PIN_I2C2_SDA OWNER
PIN_PDM_BIT_STREAM0 OWNER
+PIN_PDM_BIT_STREAM1 OWNER
PIN_PDM_CLK OWNER
PIN_SAI1_RXD0 OWNER
PIN_SAI1_TXC OWNER
@@ -970,6 +971,8 @@ PIN_SD3_DATA2 OWNER
PIN_SD3_DATA3 OWNER
PIN_UART1_RXD OWNER, test
PIN_UART1_TXD OWNER
+PIN_UART2_RXD OWNER
+PIN_UART2_TXD OWNER
PIN_XSPI1_DATA0 OWNER
PIN_XSPI1_DATA1 OWNER
PIN_XSPI1_DATA2 OWNER
diff --git a/configs/ccimx95dvk/config_scmi.h b/configs/ccimx95dvk/config_scmi.h
index 0913c1339af0..510de3d252a2 100644
--- a/configs/ccimx95dvk/config_scmi.h
+++ b/configs/ccimx95dvk/config_scmi.h
@@ -562,6 +562,7 @@
.pinPerms[DEV_SM_PIN_I2C2_SCL] = SM_SCMI_PERM_ALL, \
.pinPerms[DEV_SM_PIN_I2C2_SDA] = SM_SCMI_PERM_ALL, \
.pinPerms[DEV_SM_PIN_PDM_BIT_STREAM0] = SM_SCMI_PERM_ALL, \
+ .pinPerms[DEV_SM_PIN_PDM_BIT_STREAM1] = SM_SCMI_PERM_ALL, \
.pinPerms[DEV_SM_PIN_PDM_CLK] = SM_SCMI_PERM_ALL, \
.pinPerms[DEV_SM_PIN_SAI1_RXD0] = SM_SCMI_PERM_ALL, \
.pinPerms[DEV_SM_PIN_SAI1_TXC] = SM_SCMI_PERM_ALL, \
@@ -595,6 +596,8 @@
.pinPerms[DEV_SM_PIN_SD3_DATA3] = SM_SCMI_PERM_ALL, \
.pinPerms[DEV_SM_PIN_UART1_RXD] = SM_SCMI_PERM_ALL, \
.pinPerms[DEV_SM_PIN_UART1_TXD] = SM_SCMI_PERM_ALL, \
+ .pinPerms[DEV_SM_PIN_UART2_RXD] = SM_SCMI_PERM_ALL, \
+ .pinPerms[DEV_SM_PIN_UART2_TXD] = SM_SCMI_PERM_ALL, \
.pinPerms[DEV_SM_PIN_XSPI1_DATA0] = SM_SCMI_PERM_ALL, \
.pinPerms[DEV_SM_PIN_XSPI1_DATA1] = SM_SCMI_PERM_ALL, \
.pinPerms[DEV_SM_PIN_XSPI1_DATA2] = SM_SCMI_PERM_ALL, \

151
meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0006-ccimx95dvk-move-CAN1-to-be-used-by-A55.patch
View File

@ -1,151 +0,0 @@
From: Hector Palacios <hector.palacios@digi.com>
Date: Wed, 24 Sep 2025 13:01:57 +0200
Subject: [PATCH] ccimx95dvk: move CAN1 to be used by A55
CAN1 is no longer reserved by M7 but instead moved to
non-secure A55 so that it can be used by Linux.
Upstream-Status: Inappropriate [DEY specific]
Signed-off-by: Hector Palacios <hector.palacios@digi.com>
---
configs/ccimx95dvk.cfg | 3 ++-
configs/ccimx95dvk/config_bctrl.h | 14 +++++++-------
configs/ccimx95dvk/config_scmi.h | 7 ++++---
configs/ccimx95dvk/config_trdc.h | 3 +--
4 files changed, 14 insertions(+), 13 deletions(-)
diff --git a/configs/ccimx95dvk.cfg b/configs/ccimx95dvk.cfg
index bf5f0739f526..afec8eb5b738 100755
--- a/configs/ccimx95dvk.cfg
+++ b/configs/ccimx95dvk.cfg
@@ -362,7 +362,6 @@ SYS ALL
# Resources
M7P OWNER # CPUs must be first
-CAN_FD1 OWNER
FSB READONLY
IRQSTEER_M7 OWNER
LPIT1 OWNER
@@ -461,6 +460,7 @@ CHANNEL db=1, xport=smt, rpc=scmi, type=p2a_notify
PERF_A55 ALL
PERF_DRAM ALL
+PERLPI_CAN1 ALL
PERLPI_CAN2 ALL
PERLPI_CAN3 ALL
PERLPI_CAN4 ALL
@@ -582,6 +582,7 @@ CAMERA5 OWNER
CAMERA6 OWNER
CAMERA7 OWNER
CAMERA8 OWNER
+CAN_FD1 OWNER
CAN_FD2 OWNER
CAN_FD3 OWNER
CAN_FD4 OWNER
diff --git a/configs/ccimx95dvk/config_bctrl.h b/configs/ccimx95dvk/config_bctrl.h
index a757834c32ab..a55abe03ec02 100644
--- a/configs/ccimx95dvk/config_bctrl.h
+++ b/configs/ccimx95dvk/config_bctrl.h
@@ -61,13 +61,13 @@
#define SM_BCTRL_A_CONFIG \
{ \
SM_CFG_W1(0x00000008U), 0x00001804U, \
- SM_CFG_W1(0x0000000CU), 0x0000E56AU, \
- SM_CFG_W1(0x00000010U), 0x0000E56AU, \
- SM_CFG_W1(0x00000014U), 0x0000E56AU, \
- SM_CFG_W1(0x00000018U), 0x0000E56AU, \
- SM_CFG_W1(0x0000001CU), 0x0000E56AU, \
- SM_CFG_W1(0x00000020U), 0x0000E56AU, \
- SM_CFG_W1(0x00000024U), 0x00000291U, \
+ SM_CFG_W1(0x0000000CU), 0x0000E56BU, \
+ SM_CFG_W1(0x00000010U), 0x0000E56BU, \
+ SM_CFG_W1(0x00000014U), 0x0000E56BU, \
+ SM_CFG_W1(0x00000018U), 0x0000E56BU, \
+ SM_CFG_W1(0x0000001CU), 0x0000E56BU, \
+ SM_CFG_W1(0x00000020U), 0x0000E56BU, \
+ SM_CFG_W1(0x00000024U), 0x00000290U, \
SM_CFG_END \
}
diff --git a/configs/ccimx95dvk/config_scmi.h b/configs/ccimx95dvk/config_scmi.h
index 510de3d252a2..36cbb06126fe 100644
--- a/configs/ccimx95dvk/config_scmi.h
+++ b/configs/ccimx95dvk/config_scmi.h
@@ -66,7 +66,6 @@
.secure = 0U, \
.seenvId = 1U, \
.buttonPerms[DEV_SM_BUTTON_0] = SM_SCMI_PERM_NOTIFY, \
- .clkPerms[DEV_SM_CLK_CAN1] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_LPTMR1] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_LPTMR2] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_M7SYSTICK] = SM_SCMI_PERM_ALL, \
@@ -76,7 +75,6 @@
.ctrlPerms[BRD_SM_CTRL_BUTTON] = SM_SCMI_PERM_NOTIFY, \
.ctrlPerms[BRD_SM_CTRL_PCA2131] = SM_SCMI_PERM_ALL, \
.ctrlPerms[BRD_SM_CTRL_TEST] = SM_SCMI_PERM_ALL, \
- .daisyPerms[DEV_SM_DAISY_CAN1_RX] = SM_SCMI_PERM_ALL, \
.daisyPerms[DEV_SM_DAISY_LPTMR2_0] = SM_SCMI_PERM_ALL, \
.daisyPerms[DEV_SM_DAISY_LPTMR2_1] = SM_SCMI_PERM_ALL, \
.daisyPerms[DEV_SM_DAISY_LPTMR2_2] = SM_SCMI_PERM_ALL, \
@@ -89,7 +87,6 @@
.lmmPerms[2] = SM_SCMI_PERM_ALL, \
.pdPerms[DEV_SM_PD_M7] = SM_SCMI_PERM_ALL, \
.perfPerms[DEV_SM_PERF_M7] = SM_SCMI_PERM_ALL, \
- .perlpiPerms[DEV_SM_PERLPI_CAN1] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_WDOG5] = SM_SCMI_PERM_ALL, \
.rtcPerms[BRD_SM_RTC_PCA2131] = SM_SCMI_PERM_ALL, \
.rtcPerms[DEV_SM_RTC_BBNSM] = SM_SCMI_PERM_PRIV, \
@@ -181,6 +178,7 @@
.pdPerms[DEV_SM_PD_A55P] = SM_SCMI_PERM_ALL, \
.perfPerms[DEV_SM_PERF_A55] = SM_SCMI_PERM_ALL, \
.perfPerms[DEV_SM_PERF_DRAM] = SM_SCMI_PERM_ALL, \
+ .perlpiPerms[DEV_SM_PERLPI_CAN1] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_CAN2] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_CAN3] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_CAN4] = SM_SCMI_PERM_ALL, \
@@ -237,6 +235,7 @@
.clkPerms[DEV_SM_CLK_AUDIOPLL2] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_AUDIOPLL2_VCO] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_AUDIOXCVR] = SM_SCMI_PERM_ALL, \
+ .clkPerms[DEV_SM_CLK_CAN1] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_CAN2] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_CAN3] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_CAN4] = SM_SCMI_PERM_ALL, \
@@ -327,6 +326,7 @@
.ctrlPerms[DEV_SM_CTRL_SAI3_MCLK] = SM_SCMI_PERM_ALL, \
.ctrlPerms[DEV_SM_CTRL_SAI4_MCLK] = SM_SCMI_PERM_ALL, \
.ctrlPerms[DEV_SM_CTRL_SAI5_MCLK] = SM_SCMI_PERM_ALL, \
+ .daisyPerms[DEV_SM_DAISY_CAN1_RX] = SM_SCMI_PERM_ALL, \
.daisyPerms[DEV_SM_DAISY_CAN2_RX] = SM_SCMI_PERM_ALL, \
.daisyPerms[DEV_SM_DAISY_CAN3_RX] = SM_SCMI_PERM_ALL, \
.daisyPerms[DEV_SM_DAISY_CAN4_RX] = SM_SCMI_PERM_ALL, \
@@ -469,6 +469,7 @@
.perfPerms[DEV_SM_PERF_GPU] = SM_SCMI_PERM_ALL, \
.perfPerms[DEV_SM_PERF_NPU] = SM_SCMI_PERM_ALL, \
.perfPerms[DEV_SM_PERF_VPU] = SM_SCMI_PERM_ALL, \
+ .perlpiPerms[DEV_SM_PERLPI_CAN1] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_CAN2] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_CAN3] = SM_SCMI_PERM_ALL, \
.perlpiPerms[DEV_SM_PERLPI_CAN4] = SM_SCMI_PERM_ALL, \
diff --git a/configs/ccimx95dvk/config_trdc.h b/configs/ccimx95dvk/config_trdc.h
index dc6245097316..12ebbc61ca64 100644
--- a/configs/ccimx95dvk/config_trdc.h
+++ b/configs/ccimx95dvk/config_trdc.h
@@ -123,7 +123,7 @@
SM_CFG_W1(0x00010650U), 0x09000309U, \
SM_CFG_W1(0x00010654U), 0x0000C900U, \
SM_CFG_W1(0x00010658U), 0x99909900U, \
- SM_CFG_W1(0x0001065cU), 0x00009099U, \
+ SM_CFG_W1(0x0001065cU), 0x00009999U, \
SM_CFG_W1(0x00010668U), 0x00009900U, \
SM_CFG_W1(0x0001066cU), 0x90909000U, \
SM_CFG_W1(0x00010670U), 0x00009000U, \
@@ -132,7 +132,6 @@
SM_CFG_Z1(0x00010850U), \
SM_CFG_W1(0x00010854U), 0x9000C000U, \
SM_CFG_W1(0x00010858U), 0x00000099U, \
- SM_CFG_W1(0x0001085cU), 0x00000900U, \
SM_CFG_W1(0x00010870U), 0x00000090U, \
SM_CFG_W1(0x00010874U), 0x00000999U, \
SM_CFG_W1(0x00010980U), 0x900000C0U, \

453
meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0007-ccimx95dvk-remove-PCAL6408A-IO-expander-from-EVK.patch
View File

@ -1,453 +0,0 @@
From: Hector Palacios <hector.palacios@digi.com>
Date: Thu, 25 Sep 2025 11:11:20 +0200
Subject: [PATCH 7/8] ccimx95dvk: remove PCAL6408A IO expander from EVK
NXP used this I2C IO expander on their EVK to process
wakeup interrupt lines.
This chip is not available on the DVK.
Signed-off-by: Hector Palacios <hector.palacios@digi.com>
---
boards/ccimx95dvk/board.c | 1 +
boards/ccimx95dvk/sm/Makefile | 4 +-
boards/ccimx95dvk/sm/brd_sm_bbm.c | 5 +-
boards/ccimx95dvk/sm/brd_sm_control.c | 96 +-------------------------
boards/ccimx95dvk/sm/brd_sm_control.h | 12 ++--
boards/ccimx95dvk/sm/brd_sm_handlers.c | 36 +---------
boards/ccimx95dvk/sm/brd_sm_handlers.h | 21 +-----
configs/ccimx95dvk.cfg | 6 --
configs/ccimx95dvk/config_scmi.h | 6 --
9 files changed, 12 insertions(+), 175 deletions(-)
diff --git a/boards/ccimx95dvk/board.c b/boards/ccimx95dvk/board.c
index 012a04540fd1..1f3c8cd3fdb9 100755
--- a/boards/ccimx95dvk/board.c
+++ b/boards/ccimx95dvk/board.c
@@ -1,5 +1,6 @@
/*
* Copyright 2023-2025 NXP
+ * Copyright 2025 Digi International Inc.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
diff --git a/boards/ccimx95dvk/sm/Makefile b/boards/ccimx95dvk/sm/Makefile
index d5b576737636..db27ea922733 100755
--- a/boards/ccimx95dvk/sm/Makefile
+++ b/boards/ccimx95dvk/sm/Makefile
@@ -1,6 +1,7 @@
## ###################################################################
##
## Copyright 2023 NXP
+## Copyright 2025 Digi International Inc.
##
## Redistribution and use in source and binary forms, with or without modification,
## are permitted provided that the following conditions are met:
@@ -40,7 +41,6 @@ INCLUDE += \
-I$(BOARDS_DIR) \
-I$(BOARD_DIR) \
-I$(BOARD_DIR)/sm \
- -I$(COMPONENTS_DIR)/pcal6408a \
-I$(COMPONENTS_DIR)/pf09 \
-I$(COMPONENTS_DIR)/pf53 \
-I$(COMPONENTS_DIR)/pca2131
@@ -50,7 +50,6 @@ VPATH += \
$(BOARDS_DIR) \
$(BOARD_DIR) \
$(BOARD_DIR)/sm \
- $(COMPONENTS_DIR)/pcal6408a \
$(COMPONENTS_DIR)/pf09 \
$(COMPONENTS_DIR)/pf53 \
$(COMPONENTS_DIR)/pca2131
@@ -63,7 +62,6 @@ OBJS += \
$(OUT)/brd_sm_sensor.o \
$(OUT)/brd_sm_voltage.o \
$(OUT)/brd_sm_bbm.o \
- $(OUT)/fsl_pcal6408a.o \
$(OUT)/fsl_pf09.o \
$(OUT)/fsl_pf53.o \
$(OUT)/fsl_pca2131.o
diff --git a/boards/ccimx95dvk/sm/brd_sm_bbm.c b/boards/ccimx95dvk/sm/brd_sm_bbm.c
index c2e5cd61dc9f..2b13931c7749 100755
--- a/boards/ccimx95dvk/sm/brd_sm_bbm.c
+++ b/boards/ccimx95dvk/sm/brd_sm_bbm.c
@@ -2,6 +2,7 @@
** ###################################################################
**
** Copyright 2025 NXP
+** Copyright 2025 Digi International Inc.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
@@ -415,8 +416,6 @@ int32_t BRD_SM_BbmRtcAlarmSet(uint32_t rtcId, bool enable, uint64_t val)
/* Enable interrupt */
if (PCA2131_IntEnable(&g_pca2131Dev, true))
{
- /* Enable bus expander interrupt */
- status = BRD_SM_BusExpMaskSet(0U, BIT8(6));
}
else
{
@@ -440,8 +439,6 @@ int32_t BRD_SM_BbmRtcAlarmSet(uint32_t rtcId, bool enable, uint64_t val)
/* Disable interrupt */
if (PCA2131_IntEnable(&g_pca2131Dev, false))
{
- /* Disable bus expander interrupt */
- status = BRD_SM_BusExpMaskSet(BIT8(6), BIT8(6));
}
else
{
diff --git a/boards/ccimx95dvk/sm/brd_sm_control.c b/boards/ccimx95dvk/sm/brd_sm_control.c
index 5b36c66c593c..8484a6895a3d 100755
--- a/boards/ccimx95dvk/sm/brd_sm_control.c
+++ b/boards/ccimx95dvk/sm/brd_sm_control.c
@@ -2,6 +2,7 @@
** ###################################################################
**
** Copyright 2023-2024 NXP
+** Copyright 2025 Digi International Inc.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
@@ -44,13 +45,6 @@
/* Local defines */
-/* PCAL6408A input signals */
-#define PCAL6408A_INPUT_SD3_WAKE 0U
-#define PCAL6408A_INPUT_PCIE1_WAKE 4U
-#define PCAL6408A_INPUT_BT_WAKE 5U
-#define PCAL6408A_INPUT_PCIE2_WAKE 6U
-#define PCAL6408A_INPUT_BUTTON 7U
-
/* Local types */
/* Local variables */
@@ -117,26 +111,7 @@ int32_t BRD_SM_ControlGet(uint32_t ctrlId, uint32_t *numRtn, uint32_t *rtn)
}
else
{
- uint8_t data;
-
- /* Read expander data input */
- if (PCAL6408A_InputGet(&g_pcal6408aDev, &data))
- {
- uint32_t shift = ctrlId - DEV_SM_NUM_CTRL;
-
- /* Adjust bit position */
- if (shift > 0U)
- {
- shift += 3U;
- }
-
- *numRtn = 1U;
- rtn[0] = (((uint32_t) data) >> shift) & 0x1UL;
- }
- else
- {
- status = SM_ERR_HARDWARE_ERROR;
- }
+ status = SM_ERR_HARDWARE_ERROR;
}
}
else
@@ -231,41 +206,12 @@ int32_t BRD_SM_ControlFlagsSet(uint32_t ctrlId, uint32_t flags)
}
else
{
- uint8_t mask;
- uint32_t val;
- uint32_t enb = (flags != 0U) ? 0U : 1U;
-
switch (ctrlId)
{
- case BRD_SM_CTRL_SD3_WAKE:
- mask = BIT8(PCAL6408A_INPUT_SD3_WAKE);
- val = (enb & 0x1U) << PCAL6408A_INPUT_SD3_WAKE;
- break;
- case BRD_SM_CTRL_PCIE1_WAKE:
- mask = BIT8(PCAL6408A_INPUT_PCIE1_WAKE);
- val = (enb & 0x1U) << PCAL6408A_INPUT_PCIE1_WAKE;
- break;
- case BRD_SM_CTRL_BT_WAKE:
- mask = BIT8(PCAL6408A_INPUT_BT_WAKE);
- val = (enb & 0x1U) << PCAL6408A_INPUT_BT_WAKE;
- break;
- case BRD_SM_CTRL_PCIE2_WAKE:
- mask = BIT8(PCAL6408A_INPUT_PCIE2_WAKE);
- val = (enb & 0x1U) << PCAL6408A_INPUT_PCIE2_WAKE;
- break;
- case BRD_SM_CTRL_BUTTON:
- mask = BIT8(PCAL6408A_INPUT_BUTTON);
- val = (enb & 0x1U) << PCAL6408A_INPUT_BUTTON;
- break;
default:
status = SM_ERR_NOT_FOUND;
break;
}
-
- if (status == SM_ERR_SUCCESS)
- {
- status = BRD_SM_BusExpMaskSet((uint8_t) val, mask);
- }
}
return status;
@@ -276,42 +222,6 @@ int32_t BRD_SM_ControlFlagsSet(uint32_t ctrlId, uint32_t flags)
/*--------------------------------------------------------------------------*/
void BRD_SM_ControlHandler(uint8_t status, uint8_t val)
{
- uint32_t data = (uint32_t) val;
-
- /* Handle SD3 wake */
- if ((status & BIT8(PCAL6408A_INPUT_SD3_WAKE)) != 0U)
- {
- LMM_MiscControlEvent(BRD_SM_CTRL_SD3_WAKE,
- ((data >> PCAL6408A_INPUT_SD3_WAKE) & 0x1U) + 1U);
- }
-
- /* Handle PCIe1 wake */
- if ((status & BIT8(PCAL6408A_INPUT_PCIE1_WAKE)) != 0U)
- {
- LMM_MiscControlEvent(BRD_SM_CTRL_PCIE1_WAKE,
- ((data >> PCAL6408A_INPUT_PCIE1_WAKE) & 0x1U) + 1U);
- }
-
- /* Handle BT wake */
- if ((status & BIT8(PCAL6408A_INPUT_BT_WAKE)) != 0U)
- {
- LMM_MiscControlEvent(BRD_SM_CTRL_BT_WAKE,
- ((data >> PCAL6408A_INPUT_BT_WAKE) & 0x1U) + 1U);
- }
-
- /* Handle PCIe2 wake */
- if (((status & BIT8(PCAL6408A_INPUT_PCIE2_WAKE)) != 0U)
- && !g_pca2131Used)
- {
- LMM_MiscControlEvent(BRD_SM_CTRL_PCIE2_WAKE,
- ((data >> PCAL6408A_INPUT_PCIE2_WAKE) & 0x1U) + 1U);
- }
-
- /* Handle button */
- if ((status & BIT8(PCAL6408A_INPUT_BUTTON)) != 0U)
- {
- LMM_MiscControlEvent(BRD_SM_CTRL_BUTTON,
- ((data >> PCAL6408A_INPUT_BUTTON) & 0x1U) + 1U);
- }
+ // Call pertinent LMM_MiscControlEvent()
}
diff --git a/boards/ccimx95dvk/sm/brd_sm_control.h b/boards/ccimx95dvk/sm/brd_sm_control.h
index bf893782e1d7..12365e56d7e4 100755
--- a/boards/ccimx95dvk/sm/brd_sm_control.h
+++ b/boards/ccimx95dvk/sm/brd_sm_control.h
@@ -2,6 +2,7 @@
** ###################################################################
**
** Copyright 2023-2024 NXP
+** Copyright 2025 Digi International Inc.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
@@ -66,7 +67,7 @@
/** @} */
/*! Number of board controls */
-#define BRD_SM_NUM_CTRL 7UL
+#define BRD_SM_NUM_CTRL 2UL
/*! Total number of controls */
#define SM_NUM_CTRL (DEV_SM_NUM_CTRL + BRD_SM_NUM_CTRL)
@@ -75,13 +76,8 @@
* @name BRD_SM control domain indexes
*/
/** @{ */
-#define BRD_SM_CTRL_SD3_WAKE (DEV_SM_NUM_CTRL + 0U) /*!< PCAL6408A-0 */
-#define BRD_SM_CTRL_PCIE1_WAKE (DEV_SM_NUM_CTRL + 1U) /*!< PCAL6408A-4 */
-#define BRD_SM_CTRL_BT_WAKE (DEV_SM_NUM_CTRL + 2U) /*!< PCAL6408A-5 */
-#define BRD_SM_CTRL_PCIE2_WAKE (DEV_SM_NUM_CTRL + 3U) /*!< PCAL6408A-6 */
-#define BRD_SM_CTRL_BUTTON (DEV_SM_NUM_CTRL + 4U) /*!< PCAL6408A-7 */
-#define BRD_SM_CTRL_TEST (DEV_SM_NUM_CTRL + 5U) /*!< Test */
-#define BRD_SM_CTRL_PCA2131 (DEV_SM_NUM_CTRL + 6U) /*!< PCA2131 raw access */
+#define BRD_SM_CTRL_TEST (DEV_SM_NUM_CTRL + 0U) /*!< Test */
+#define BRD_SM_CTRL_PCA2131 (DEV_SM_NUM_CTRL + 1U) /*!< PCA2131 raw access */
/** @} */
/* Types */
diff --git a/boards/ccimx95dvk/sm/brd_sm_handlers.c b/boards/ccimx95dvk/sm/brd_sm_handlers.c
index 19ee28e93134..a42359f15e8b 100755
--- a/boards/ccimx95dvk/sm/brd_sm_handlers.c
+++ b/boards/ccimx95dvk/sm/brd_sm_handlers.c
@@ -2,6 +2,7 @@
** ###################################################################
**
** Copyright 2023-2025 NXP
+** Copyright 2025 Digi International Inc.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
@@ -48,23 +49,16 @@
/* I2C device addresses */
#define BOARD_PF09_DEV_ADDR 0x08U
-#define BOARD_PCAL6408A_DEV_ADDR 0x20U
#define BOARD_PF5301_DEV_ADDR 0x2AU
#define BOARD_PF5302_DEV_ADDR 0x29U
#define BOARD_PCA2131_DEV_ADDR 0x53U
-#define PCAL6408A_INPUT_PF53_ARM_PG 1U
-#define PCAL6408A_INPUT_PF53_SOC_PG 2U
-#define PCAL6408A_INPUT_PF09_INT 3U
-#define PCAL6408A_INPUT_PCA2131_INT 6U
-
/* Local types */
/* Local variables */
/* Global variables */
-PCAL6408A_Type g_pcal6408aDev;
PF09_Type g_pf09Dev;
PF53_Type g_pf5301Dev;
PF53_Type g_pf5302Dev;
@@ -238,34 +232,6 @@ int32_t BRD_SM_SerialDevicesInit(void)
return status;
}
-/*--------------------------------------------------------------------------*/
-/* Set bus expander interrupt mask */
-/*--------------------------------------------------------------------------*/
-int32_t BRD_SM_BusExpMaskSet(uint8_t val, uint8_t mask)
-{
- int32_t status = SM_ERR_SUCCESS;
- static uint8_t cachedMask = PCAL6408A_INITIAL_MASK;
- uint8_t newMask = (cachedMask & ~mask);
-
- newMask |= val;
-
- /* Mask changed? */
- if (cachedMask != newMask)
- {
- if (PCAL6408A_IntMaskSet(&g_pcal6408aDev, newMask))
- {
- cachedMask = newMask;
- }
- else
- {
- status = SM_ERR_HARDWARE_ERROR;
- }
- }
-
- /* Return status */
- return status;
-}
-
/*==========================================================================*/
/*--------------------------------------------------------------------------*/
diff --git a/boards/ccimx95dvk/sm/brd_sm_handlers.h b/boards/ccimx95dvk/sm/brd_sm_handlers.h
index e34d52b50f7a..781a443e8444 100755
--- a/boards/ccimx95dvk/sm/brd_sm_handlers.h
+++ b/boards/ccimx95dvk/sm/brd_sm_handlers.h
@@ -2,6 +2,7 @@
** ###################################################################
**
** Copyright 2023-2024 NXP
+** Copyright 2025 Digi International Inc.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
@@ -52,16 +53,12 @@
#include "sm.h"
#include "dev_sm.h"
-#include "fsl_pcal6408a.h"
#include "fsl_pf09.h"
#include "fsl_pf53.h"
#include "fsl_pca2131.h"
/* Defines */
-/*! Initial PCAL6408A interrupt mask */
-#define PCAL6408A_INITIAL_MASK 0xF7U
-
/*! Number of board IRQs participating dynamic prioritization */
#define BOARD_NUM_IRQ_PRIO_IDX 1U
@@ -72,9 +69,6 @@
/* External variables */
-/*! Handle to access PCAL6408A */
-extern PCAL6408A_Type g_pcal6408aDev;
-
/*! Handle to access PF09 */
extern PF09_Type g_pf09Dev;
@@ -105,19 +99,6 @@ extern uint32_t g_pmicFaultFlags;
*/
int32_t BRD_SM_SerialDevicesInit(void);
-/*!
- * Enable/disable bus expander interrupts.
- *
- * @param[in] val Value to write
- * @param[in] mask Mask of bits to modify
- *
- * This function allows a caller to configure the bus expander.
- * interrupts.
- *
- * @return Returns the status (::SM_ERR_SUCCESS = success).
- */
-int32_t BRD_SM_BusExpMaskSet(uint8_t val, uint8_t mask);
-
/*!
* GPIO 1 interrupt 0 handler.
*/
diff --git a/configs/ccimx95dvk.cfg b/configs/ccimx95dvk.cfg
index afec8eb5b738..4af5cea789d9 100755
--- a/configs/ccimx95dvk.cfg
+++ b/configs/ccimx95dvk.cfg
@@ -345,7 +345,6 @@ CHANNEL db=2, xport=smt, check=crc32, rpc=scmi, \
# API
-BRD_SM_CTRL_BUTTON NOTIFY
BRD_SM_CTRL_PCA2131 ALL
BRD_SM_CTRL_TEST ALL
BRD_SM_RTC_PCA2131 ALL
@@ -532,11 +531,6 @@ CHANNEL db=1, xport=smt, rpc=scmi, type=p2a_notify
AUDIO_PLL1 ALL
AUDIO_PLL2 ALL
-BRD_SM_CTRL_BT_WAKE NOTIFY
-BRD_SM_CTRL_BUTTON NOTIFY
-BRD_SM_CTRL_PCIE1_WAKE NOTIFY
-BRD_SM_CTRL_PCIE2_WAKE NOTIFY
-BRD_SM_CTRL_SD3_WAKE NOTIFY
BRD_SM_RTC_PCA2131 PRIV
BRD_SM_SENSOR_TEMP_PF09 ALL
BRD_SM_SENSOR_TEMP_PF5301 SET
diff --git a/configs/ccimx95dvk/config_scmi.h b/configs/ccimx95dvk/config_scmi.h
index 36cbb06126fe..d251f7910b39 100644
--- a/configs/ccimx95dvk/config_scmi.h
+++ b/configs/ccimx95dvk/config_scmi.h
@@ -72,7 +72,6 @@
.clkPerms[DEV_SM_CLK_M7] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_TSTMR2] = SM_SCMI_PERM_ALL, \
.cpuPerms[DEV_SM_CPU_M7P] = SM_SCMI_PERM_ALL, \
- .ctrlPerms[BRD_SM_CTRL_BUTTON] = SM_SCMI_PERM_NOTIFY, \
.ctrlPerms[BRD_SM_CTRL_PCA2131] = SM_SCMI_PERM_ALL, \
.ctrlPerms[BRD_SM_CTRL_TEST] = SM_SCMI_PERM_ALL, \
.daisyPerms[DEV_SM_DAISY_LPTMR2_0] = SM_SCMI_PERM_ALL, \
@@ -314,11 +313,6 @@
.clkPerms[DEV_SM_CLK_VIDEOPLL1_VCO] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_VPUDSP] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_XSPISLVROOT] = SM_SCMI_PERM_ALL, \
- .ctrlPerms[BRD_SM_CTRL_BT_WAKE] = SM_SCMI_PERM_NOTIFY, \
- .ctrlPerms[BRD_SM_CTRL_BUTTON] = SM_SCMI_PERM_NOTIFY, \
- .ctrlPerms[BRD_SM_CTRL_PCIE1_WAKE] = SM_SCMI_PERM_NOTIFY, \
- .ctrlPerms[BRD_SM_CTRL_PCIE2_WAKE] = SM_SCMI_PERM_NOTIFY, \
- .ctrlPerms[BRD_SM_CTRL_SD3_WAKE] = SM_SCMI_PERM_NOTIFY, \
.ctrlPerms[DEV_SM_CTRL_ADC_TEST] = SM_SCMI_PERM_ALL, \
.ctrlPerms[DEV_SM_CTRL_MQS1_SETTINGS] = SM_SCMI_PERM_ALL, \
.ctrlPerms[DEV_SM_CTRL_PDM_CLK_SEL] = SM_SCMI_PERM_ALL, \

1197
meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0008-ccimx95dvk-remove-PCA2123-RTC-from-EVK.patch
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274
meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0009-ccimx95-change-names-of-voltage-regulators.patch
View File

@ -1,274 +0,0 @@
From: Hector Palacios <hector.palacios@digi.com>
Date: Mon, 29 Sep 2025 13:02:02 +0200
Subject: [PATCH 09/11] ccimx95: change names of voltage regulators
Change the names of voltage regulators for easier identification.
Use the PMIC regulator (SW1, SW2, LDO1...) and then the name of the power
rail used in the SOM.
Signed-off-by: Hector Palacios <hector.palacios@digi.com>
---
boards/ccimx95dvk/sm/brd_sm_voltage.c | 85 ++++++++++++++-------------
boards/ccimx95dvk/sm/brd_sm_voltage.h | 15 ++---
2 files changed, 51 insertions(+), 49 deletions(-)
diff --git a/boards/ccimx95dvk/sm/brd_sm_voltage.c b/boards/ccimx95dvk/sm/brd_sm_voltage.c
index b81ffd970294..d7e7c9b3ea27 100755
--- a/boards/ccimx95dvk/sm/brd_sm_voltage.c
+++ b/boards/ccimx95dvk/sm/brd_sm_voltage.c
@@ -2,6 +2,7 @@
** ###################################################################
**
** Copyright 2023-2025 NXP
+** Copyright 2025 Digi International Inc.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
@@ -63,13 +64,13 @@ int32_t BRD_SM_VoltageNameGet(uint32_t domainId, string *voltNameAddr,
static string const s_name[BRD_SM_NUM_VOLT] =
{
- "vdd_gpio_3p3",
- "vdd_ana_0p8",
- "vdd_gpio_1p8",
- "vddq_ddr",
- "vdd2_ddr",
- "sd_card",
- "nvcc_sd2"
+ "vdd_3v3",
+ "vdd_ana_0v8",
+ "vdd_1v8",
+ "lpd5_vddq",
+ "lpd5_vdd2",
+ "vdd_ldo1",
+ "vdd_sdio2"
};
/* Get max string width */
@@ -117,25 +118,25 @@ int32_t BRD_SM_VoltageDescribe(uint32_t domainId,
case DEV_SM_VOLT_ARM:
status = DEV_SM_VoltageDescribe(domainId, range);
break;
- case BRD_SM_VOLT_VDD_GPIO_3P3:
+ case BRD_SM_VOLT_SW1_VDD_3V3:
rc = PF09_RegulatorInfoGet(PF09_REG_SW1, &info);
break;
- case BRD_SM_VOLT_VDD_ANA_0P8:
+ case BRD_SM_VOLT_SW2_VDD_ANA_0V8:
rc = PF09_RegulatorInfoGet(PF09_REG_SW2, &info);
break;
- case BRD_SM_VOLT_VDD_GPIO_1P8:
+ case BRD_SM_VOLT_SW3_VDD_1V8:
rc = PF09_RegulatorInfoGet(PF09_REG_SW3, &info);
break;
- case BRD_SM_VOLT_VDDQ_DDR:
+ case BRD_SM_VOLT_SW4_LPD5_VDDQ:
rc = PF09_RegulatorInfoGet(PF09_REG_SW4, &info);
break;
- case BRD_SM_VOLT_VDD2_DDR:
+ case BRD_SM_VOLT_SW5_LPD5_VDD2:
rc = PF09_RegulatorInfoGet(PF09_REG_SW5, &info);
break;
- case BRD_SM_VOLT_SD_CARD:
+ case BRD_SM_VOLT_LDO1_VDD_LDO1:
rc = PF09_RegulatorInfoGet(PF09_REG_LDO1, &info);
break;
- case BRD_SM_VOLT_NVCC_SD2:
+ case BRD_SM_VOLT_LDO2_VDD_SDIO2:
rc = PF09_RegulatorInfoGet(PF09_REG_LDO2, &info);
break;
default:
@@ -206,31 +207,31 @@ int32_t BRD_SM_VoltageModeSet(uint32_t domainId, uint8_t voltMode)
s_modeArm = voltMode;
}
break;
- case BRD_SM_VOLT_VDD_GPIO_3P3:
+ case BRD_SM_VOLT_SW1_VDD_3V3:
rc = PF09_SwModeSet(&g_pf09Dev, PF09_REG_SW1, PF09_STATE_VRUN,
mode);
break;
- case BRD_SM_VOLT_VDD_ANA_0P8:
+ case BRD_SM_VOLT_SW2_VDD_ANA_0V8:
rc = PF09_SwModeSet(&g_pf09Dev, PF09_REG_SW2, PF09_STATE_VRUN,
mode);
break;
- case BRD_SM_VOLT_VDD_GPIO_1P8:
+ case BRD_SM_VOLT_SW3_VDD_1V8:
rc = PF09_SwModeSet(&g_pf09Dev, PF09_REG_SW3, PF09_STATE_VRUN,
mode);
break;
- case BRD_SM_VOLT_VDDQ_DDR:
+ case BRD_SM_VOLT_SW4_LPD5_VDDQ:
rc = PF09_SwModeSet(&g_pf09Dev, PF09_REG_SW4, PF09_STATE_VRUN,
mode);
break;
- case BRD_SM_VOLT_VDD2_DDR:
+ case BRD_SM_VOLT_SW5_LPD5_VDD2:
rc = PF09_SwModeSet(&g_pf09Dev, PF09_REG_SW5, PF09_STATE_VRUN,
mode);
break;
- case BRD_SM_VOLT_SD_CARD:
+ case BRD_SM_VOLT_LDO1_VDD_LDO1:
rc = PF09_LdoEnable(&g_pf09Dev, PF09_REG_LDO1, PF09_STATE_VRUN,
enable);
break;
- case BRD_SM_VOLT_NVCC_SD2:
+ case BRD_SM_VOLT_LDO2_VDD_SDIO2:
rc = PF09_LdoEnable(&g_pf09Dev, PF09_REG_LDO2, PF09_STATE_VRUN,
enable);
break;
@@ -271,36 +272,36 @@ int32_t BRD_SM_VoltageModeGet(uint32_t domainId, uint8_t *voltMode)
rc = PF09_GpioCtrlGet(&g_pf09Dev, PF09_GPIO4, PF53_STATE_VRUN,
&enable);
break;
- case BRD_SM_VOLT_VDD_GPIO_3P3:
+ case BRD_SM_VOLT_SW1_VDD_3V3:
rc = PF09_SwModeGet(&g_pf09Dev, PF09_REG_SW1, PF09_STATE_VRUN,
&mode);
enable = (mode != PF09_SW_MODE_OFF);
break;
- case BRD_SM_VOLT_VDD_ANA_0P8:
+ case BRD_SM_VOLT_SW2_VDD_ANA_0V8:
rc = PF09_SwModeGet(&g_pf09Dev, PF09_REG_SW2, PF09_STATE_VRUN,
&mode);
enable = (mode != PF09_SW_MODE_OFF);
break;
- case BRD_SM_VOLT_VDD_GPIO_1P8:
+ case BRD_SM_VOLT_SW3_VDD_1V8:
rc = PF09_SwModeGet(&g_pf09Dev, PF09_REG_SW3, PF09_STATE_VRUN,
&mode);
enable = (mode != PF09_SW_MODE_OFF);
break;
- case BRD_SM_VOLT_VDDQ_DDR:
+ case BRD_SM_VOLT_SW4_LPD5_VDDQ:
rc = PF09_SwModeGet(&g_pf09Dev, PF09_REG_SW4, PF09_STATE_VRUN,
&mode);
enable = (mode != PF09_SW_MODE_OFF);
break;
- case BRD_SM_VOLT_VDD2_DDR:
+ case BRD_SM_VOLT_SW5_LPD5_VDD2:
rc = PF09_SwModeGet(&g_pf09Dev, PF09_REG_SW5, PF09_STATE_VRUN,
&mode);
enable = (mode != PF09_SW_MODE_OFF);
break;
- case BRD_SM_VOLT_SD_CARD:
+ case BRD_SM_VOLT_LDO1_VDD_LDO1:
rc = PF09_LdoIsEnabled(&g_pf09Dev, PF09_REG_LDO1, PF09_STATE_VRUN,
&enable);
break;
- case BRD_SM_VOLT_NVCC_SD2:
+ case BRD_SM_VOLT_LDO2_VDD_SDIO2:
rc = PF09_LdoIsEnabled(&g_pf09Dev, PF09_REG_LDO2, PF09_STATE_VRUN,
&enable);
break;
@@ -359,31 +360,31 @@ int32_t BRD_SM_VoltageLevelSet(uint32_t domainId, int32_t voltageLevel)
s_levelArm = (int32_t) level;
rc = true;
break;
- case BRD_SM_VOLT_VDD_GPIO_3P3:
+ case BRD_SM_VOLT_SW1_VDD_3V3:
rc = PF09_VoltageSet(&g_pf09Dev, PF09_REG_SW1, PF09_STATE_VRUN,
level);
break;
- case BRD_SM_VOLT_VDD_ANA_0P8:
+ case BRD_SM_VOLT_SW2_VDD_ANA_0V8:
rc = PF09_VoltageSet(&g_pf09Dev, PF09_REG_SW2, PF09_STATE_VRUN,
level);
break;
- case BRD_SM_VOLT_VDD_GPIO_1P8:
+ case BRD_SM_VOLT_SW3_VDD_1V8:
rc = PF09_VoltageSet(&g_pf09Dev, PF09_REG_SW3, PF09_STATE_VRUN,
level);
break;
- case BRD_SM_VOLT_VDDQ_DDR:
+ case BRD_SM_VOLT_SW4_LPD5_VDDQ:
rc = PF09_VoltageSet(&g_pf09Dev, PF09_REG_SW4, PF09_STATE_VRUN,
level);
break;
- case BRD_SM_VOLT_VDD2_DDR:
+ case BRD_SM_VOLT_SW5_LPD5_VDD2:
rc = PF09_VoltageSet(&g_pf09Dev, PF09_REG_SW5, PF09_STATE_VRUN,
level);
break;
- case BRD_SM_VOLT_SD_CARD:
+ case BRD_SM_VOLT_LDO1_VDD_LDO1:
rc = PF09_VoltageSet(&g_pf09Dev, PF09_REG_LDO1, PF09_STATE_VRUN,
level);
break;
- case BRD_SM_VOLT_NVCC_SD2:
+ case BRD_SM_VOLT_LDO2_VDD_SDIO2:
rc = PF09_VoltageSet(&g_pf09Dev, PF09_REG_LDO2, PF09_STATE_VRUN,
level);
break;
@@ -458,31 +459,31 @@ int32_t BRD_SM_VoltageLevelGet(uint32_t domainId, int32_t *voltageLevel)
}
}
break;
- case BRD_SM_VOLT_VDD_GPIO_3P3:
+ case BRD_SM_VOLT_SW1_VDD_3V3:
rc = PF09_VoltageGet(&g_pf09Dev, PF09_REG_SW1, PF09_STATE_VRUN,
&level);
break;
- case BRD_SM_VOLT_VDD_ANA_0P8:
+ case BRD_SM_VOLT_SW2_VDD_ANA_0V8:
rc = PF09_VoltageGet(&g_pf09Dev, PF09_REG_SW2, PF09_STATE_VRUN,
&level);
break;
- case BRD_SM_VOLT_VDD_GPIO_1P8:
+ case BRD_SM_VOLT_SW3_VDD_1V8:
rc = PF09_VoltageGet(&g_pf09Dev, PF09_REG_SW3, PF09_STATE_VRUN,
&level);
break;
- case BRD_SM_VOLT_VDDQ_DDR:
+ case BRD_SM_VOLT_SW4_LPD5_VDDQ:
rc = PF09_VoltageGet(&g_pf09Dev, PF09_REG_SW4, PF09_STATE_VRUN,
&level);
break;
- case BRD_SM_VOLT_VDD2_DDR:
+ case BRD_SM_VOLT_SW5_LPD5_VDD2:
rc = PF09_VoltageGet(&g_pf09Dev, PF09_REG_SW5, PF09_STATE_VRUN,
&level);
break;
- case BRD_SM_VOLT_SD_CARD:
+ case BRD_SM_VOLT_LDO1_VDD_LDO1:
rc = PF09_VoltageGet(&g_pf09Dev, PF09_REG_LDO1, PF09_STATE_VRUN,
&level);
break;
- case BRD_SM_VOLT_NVCC_SD2:
+ case BRD_SM_VOLT_LDO2_VDD_SDIO2:
rc = PF09_VoltageGet(&g_pf09Dev, PF09_REG_LDO2, PF09_STATE_VRUN,
&level);
break;
diff --git a/boards/ccimx95dvk/sm/brd_sm_voltage.h b/boards/ccimx95dvk/sm/brd_sm_voltage.h
index 6c9e01286e7e..46ddc9d89096 100755
--- a/boards/ccimx95dvk/sm/brd_sm_voltage.h
+++ b/boards/ccimx95dvk/sm/brd_sm_voltage.h
@@ -2,6 +2,7 @@
** ###################################################################
**
** Copyright 2023-2024 NXP
+** Copyright 2025 Digi International Inc.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
@@ -76,13 +77,13 @@
* @name BRD_SM voltage domains
*/
/** @{ */
-#define BRD_SM_VOLT_VDD_GPIO_3P3 (DEV_SM_NUM_VOLT + 0U) /*!< VDD GPIO 3.3v */
-#define BRD_SM_VOLT_VDD_ANA_0P8 (DEV_SM_NUM_VOLT + 1U) /*!< VDD ANA 0.8v */
-#define BRD_SM_VOLT_VDD_GPIO_1P8 (DEV_SM_NUM_VOLT + 2U) /*!< VDD GPIO 1.8v */
-#define BRD_SM_VOLT_VDDQ_DDR (DEV_SM_NUM_VOLT + 3U) /*!< DDR VDDQ */
-#define BRD_SM_VOLT_VDD2_DDR (DEV_SM_NUM_VOLT + 4U) /*!< DDR VDD2 */
-#define BRD_SM_VOLT_SD_CARD (DEV_SM_NUM_VOLT + 5U) /*!< SD1 */
-#define BRD_SM_VOLT_NVCC_SD2 (DEV_SM_NUM_VOLT + 6U) /*!< SD2 */
+#define BRD_SM_VOLT_SW1_VDD_3V3 (DEV_SM_NUM_VOLT + 0U) /*!< VDD 3V3 */
+#define BRD_SM_VOLT_SW2_VDD_ANA_0V8 (DEV_SM_NUM_VOLT + 1U) /*!< VDD ANA 0V8 */
+#define BRD_SM_VOLT_SW3_VDD_1V8 (DEV_SM_NUM_VOLT + 2U) /*!< VDD 1V8 */
+#define BRD_SM_VOLT_SW4_LPD5_VDDQ (DEV_SM_NUM_VOLT + 3U) /*!< DDR VDDQ */
+#define BRD_SM_VOLT_SW5_LPD5_VDD2 (DEV_SM_NUM_VOLT + 4U) /*!< DDR VDD2 */
+#define BRD_SM_VOLT_LDO1_VDD_LDO1 (DEV_SM_NUM_VOLT + 5U) /*!< LDO1 */
+#define BRD_SM_VOLT_LDO2_VDD_SDIO2 (DEV_SM_NUM_VOLT + 6U) /*!< LDO2 (VDD_SDIO2) */
/** @} */
/* Types */

47
meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0010-ccimx95dvk-enable-full-access-to-certain-regulators-.patch
View File

@ -1,47 +0,0 @@
From: Hector Palacios <hector.palacios@digi.com>
Date: Thu, 9 Oct 2025 13:16:00 +0200
Subject: [PATCH 10/11] ccimx95dvk: enable full access to certain regulators
from non-secure LVM
The following PMIC regulators are used by the DVK:
- VDD_3V3 (SW1)
- VDD_1V8 (SW3)
- VDD_LDO1 (LDO1)
- VDD_SDIO2 (LDO2)
Signed-off-by: Hector Palacios <hector.palacios@digi.com>
---
configs/ccimx95dvk.cfg | 4 ++++
configs/ccimx95dvk/config_scmi.h | 4 ++++
2 files changed, 8 insertions(+)
diff --git a/configs/ccimx95dvk.cfg b/configs/ccimx95dvk.cfg
index b324e0fb0e45..b7c33f8d7e9a 100755
--- a/configs/ccimx95dvk.cfg
+++ b/configs/ccimx95dvk.cfg
@@ -532,6 +532,10 @@ AUDIO_PLL2 ALL
BRD_SM_SENSOR_TEMP_PF09 ALL
BRD_SM_SENSOR_TEMP_PF5301 SET
BRD_SM_SENSOR_TEMP_PF5302 SET
+BRD_SM_VOLT_SW1_VDD_3V3 ALL
+BRD_SM_VOLT_SW3_VDD_1V8 ALL
+BRD_SM_VOLT_LDO1_VDD_LDO1 ALL
+BRD_SM_VOLT_LDO2_VDD_SDIO2 ALL
BUTTON ALL, test
CLOCK_DISP1PIX ALL
CLOCK_DISP2PIX ALL
diff --git a/configs/ccimx95dvk/config_scmi.h b/configs/ccimx95dvk/config_scmi.h
index b23958f33138..18a4e5ef6360 100644
--- a/configs/ccimx95dvk/config_scmi.h
+++ b/configs/ccimx95dvk/config_scmi.h
@@ -610,6 +610,10 @@
.sensorPerms[DEV_SM_SENSOR_TEMP_A55] = SM_SCMI_PERM_ALL, \
.sensorPerms[DEV_SM_SENSOR_TEMP_ANA] = SM_SCMI_PERM_SET, \
.sysPerms = SM_SCMI_PERM_NOTIFY, \
+ .voltPerms[BRD_SM_VOLT_LDO1_VDD_LDO1] = SM_SCMI_PERM_ALL, \
+ .voltPerms[BRD_SM_VOLT_LDO2_VDD_SDIO2] = SM_SCMI_PERM_ALL, \
+ .voltPerms[BRD_SM_VOLT_SW1_VDD_3V3] = SM_SCMI_PERM_ALL, \
+ .voltPerms[BRD_SM_VOLT_SW3_VDD_1V8] = SM_SCMI_PERM_ALL, \
}
/*! Config for SCMI channel 5 */

37
meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0011-components-pf09-reduce-LDOs-step-to-50mV.patch
View File

@ -1,37 +0,0 @@
From: Hector Palacios <hector.palacios@digi.com>
Date: Mon, 13 Oct 2025 08:49:57 +0200
Subject: [PATCH 11/11] components: pf09: reduce LDOs step to 50mV
The voltage values that can be programmed to the LDOs are not linear.
For low voltages, the step is 50mV, but for higher voltages it is 100mV.
Setting the step as 100mV fools the Linux kernel regulator framework
which does not properly calculate the selector it must call when using
the SCMI regulator framework, resulting in -EINVAL errors.
Signed-off-by: Hector Palacios <hector.palacios@digi.com>
---
components/pf09/fsl_pf09.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/components/pf09/fsl_pf09.c b/components/pf09/fsl_pf09.c
index 21a0b5557244..3e1887158d7d 100755
--- a/components/pf09/fsl_pf09.c
+++ b/components/pf09/fsl_pf09.c
@@ -528,7 +528,7 @@ bool PF09_RegulatorInfoGet(uint8_t regulator, PF09_RegInfo *regInfo)
/* set min/max/step in microvolts */
regInfo->minV = 750000U;
regInfo->maxV = 3300000U;
- regInfo->stepV = 100000U;
+ regInfo->stepV = 50000U;
}
break;
case PF09_REG_LDO2:
@@ -537,7 +537,7 @@ bool PF09_RegulatorInfoGet(uint8_t regulator, PF09_RegInfo *regInfo)
/* set min/max/step in microvolts */
regInfo->minV = 650000U;
regInfo->maxV = 3300000U;
- regInfo->stepV = 100000U;
+ regInfo->stepV = 50000U;
}
break;
default:

58
meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager/0012-ccimx95dvk-remove-access-to-VDD_3V3-and-VDD_1V8-from.patch
View File

@ -1,58 +0,0 @@
From: Hector Palacios <hector.palacios@digi.com>
Date: Wed, 29 Oct 2025 16:54:45 +0100
Subject: [PATCH] ccimx95dvk: remove access to VDD_3V3 and VDD_1V8 from
non-secure world
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
There doesn't seem to be a clear registered handler for reboot or shutdown
path from Linux to SM.
When a 'reboot' is requested, Linux falls back to run the global
device_shutdown() path.
The SM will turn these regulators off in their shutdown path or via a
global “disable regulators on reboot” policy. The current SM firmware
doesn't get to know if Linux has marked these regulators as "always-on".
Powering these regulators off removes power to the SOM who is then not
able to continue the reset (it is not powered).
By removing access to Linux, we fully rely on SM managing these regulators,
though apparently support is incomplete (for instance they are not powered
off on the poweroff path from Linux), so this may need to be revisited in
future BSP upgrades.
Signed-off-by: Hector Palacios <hector.palacios@digi.com>
https://onedigi.atlassian.net/browse/DEL-9804
---
configs/ccimx95dvk.cfg | 2 --
configs/ccimx95dvk/config_scmi.h | 2 --
2 files changed, 4 deletions(-)
diff --git a/configs/ccimx95dvk.cfg b/configs/ccimx95dvk.cfg
index b7c33f8d7e9a..19d3b0ab27b4 100755
--- a/configs/ccimx95dvk.cfg
+++ b/configs/ccimx95dvk.cfg
@@ -532,8 +532,6 @@ AUDIO_PLL2 ALL
BRD_SM_SENSOR_TEMP_PF09 ALL
BRD_SM_SENSOR_TEMP_PF5301 SET
BRD_SM_SENSOR_TEMP_PF5302 SET
-BRD_SM_VOLT_SW1_VDD_3V3 ALL
-BRD_SM_VOLT_SW3_VDD_1V8 ALL
BRD_SM_VOLT_LDO1_VDD_LDO1 ALL
BRD_SM_VOLT_LDO2_VDD_SDIO2 ALL
BUTTON ALL, test
diff --git a/configs/ccimx95dvk/config_scmi.h b/configs/ccimx95dvk/config_scmi.h
index 18a4e5ef6360..8094e9a9ef77 100644
--- a/configs/ccimx95dvk/config_scmi.h
+++ b/configs/ccimx95dvk/config_scmi.h
@@ -612,8 +612,6 @@
.sysPerms = SM_SCMI_PERM_NOTIFY, \
.voltPerms[BRD_SM_VOLT_LDO1_VDD_LDO1] = SM_SCMI_PERM_ALL, \
.voltPerms[BRD_SM_VOLT_LDO2_VDD_SDIO2] = SM_SCMI_PERM_ALL, \
- .voltPerms[BRD_SM_VOLT_SW1_VDD_3V3] = SM_SCMI_PERM_ALL, \
- .voltPerms[BRD_SM_VOLT_SW3_VDD_1V8] = SM_SCMI_PERM_ALL, \
}
/*! Config for SCMI channel 5 */

21
meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager_1.0.0.bbappend
View File

@ -1,21 +0,0 @@
# Copyright (C) 2025, Digi International Inc.
FILESEXTRAPATHS:prepend := "${THISDIR}/${BPN}:"
SRC_URI:append:dey = " \
file://0001-ccimx95dvk-add-new-platform-config-and-board.patch \
file://0002-ccimx95dvk-configure-board-and-switch-debug-UART-to-.patch \
file://0003-ccimx95dvk-disable-PCAL6408A-expander-and-move-GPIO1.patch \
file://0004-ccimx95dvk-move-resources-from-M7-to-A55.patch \
file://0005-ccimx95dvk-move-pads-to-non-secure-A55.patch \
file://0006-ccimx95dvk-move-CAN1-to-be-used-by-A55.patch \
file://0007-ccimx95dvk-remove-PCAL6408A-IO-expander-from-EVK.patch \
file://0008-ccimx95dvk-remove-PCA2123-RTC-from-EVK.patch \
file://0009-ccimx95-change-names-of-voltage-regulators.patch \
file://0010-ccimx95dvk-enable-full-access-to-certain-regulators-.patch \
file://0011-components-pf09-reduce-LDOs-step-to-50mV.patch \
file://0012-ccimx95dvk-remove-access-to-VDD_3V3-and-VDD_1V8-from.patch \
"
# Disable debug monitor by default
PACKAGECONFIG ??= "m0"

23
meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager_2025q3.bb Normal file
View File

@ -0,0 +1,23 @@
SUMMARY = "i.MX System Manager Firmware"
DESCRIPTION = "\
The System Manager (SM) is a firmware that runs on a Cortex-M processor on \
many NXP i.MX processors. The Cortex-M is the boot core, runs the boot ROM \
which loads the SM (and other boot code), and then branches to the SM. The \
SM then configures some aspects of the hardware such as isolation mechanisms \
and then starts other cores in the system. After starting these cores, it \
enters a service mode where it provides access to clocking, power, sensor, \
and pin control via a client RPC API based on ARM's System Control and \
Management Interface (SCMI)."
LICENSE = "BSD-3-Clause"
LIC_FILES_CHKSUM = "file://LICENSE.txt;md5=f2a70813bc08547f509361c08b718861"
SRC_URI = "${IMX_SYSTEM_MANAGER_SRC};branch=${SRCBRANCH}"
IMX_SYSTEM_MANAGER_SRC ?= "git://github.com/nxp-imx/imx-sm.git;protocol=https"
SRCBRANCH = "master"
SRCREV = "af1e37026c6ba19cdca98fd6e91494efd3e7b5ec"
S = "${WORKDIR}/git"
require imx-system-manager.inc
PACKAGECONFIG ??= "m2"

13
meta-digi-arm/dynamic-layers/arm-toolchain/recipes-bsp/imx-system-manager/imx-system-manager_2025q3.bbappend Normal file
View File

@ -0,0 +1,13 @@
# Copyright (C) 2025, 2026, Digi International Inc.
# Select internal or Github imx-system-manager repo
IMX_SYSTEM_MANAGER_URI_STASH = "${DIGI_MTK_GIT}/emp/imx-sm.git;protocol=ssh"
IMX_SYSTEM_MANAGER_URI_GITHUB = "${DIGI_GITHUB_GIT}/imx-sm.git;protocol=https"
IMX_SYSTEM_MANAGER_SRC:dey = "${@oe.utils.conditional('DIGI_INTERNAL_GIT', '1', '${IMX_SYSTEM_MANAGER_URI_STASH}', '${IMX_SYSTEM_MANAGER_URI_GITHUB}', d)}"
SRCBRANCH:dey = "dey/scarthgap/lf-6.6.52-2.2.2"
# NXP's 'lf-6.6.52_2.2.2' release + patches
SRCREV:dey = "ecd89d0bc35687c7e1e19b47cf6bcdefc3a3fe68"
# Disable debug monitor by default
PACKAGECONFIG ??= "m0"

36
meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/firmware-imx/firmware-ele-imx_2.0.3.1.bb Normal file
View File

@ -0,0 +1,36 @@
# Copyright 2021-2025 NXP
SUMMARY = "NXP i.MX ELE firmware"
DESCRIPTION = "EdgeLock Secure Enclave firmware for i.MX series SoCs"
SECTION = "base"
LICENSE = "Proprietary"
LIC_FILES_CHKSUM = "file://COPYING;md5=bc649096ad3928ec06a8713b8d787eac"
inherit fsl-eula-unpack use-imx-security-controller-firmware deploy
SRC_URI = "${FSL_MIRROR}/${BP}-${IMX_SRCREV_ABBREV}.bin;fsl-eula=true"
IMX_SRCREV_ABBREV = "52f7740"
SRC_URI[sha256sum] = "93ae9b84ca2b718730f4d7e60b6099624a02c54630c8c9719beceaa0a5987cd1"
S = "${WORKDIR}/${BP}-${IMX_SRCREV_ABBREV}"
do_compile[noexec] = "1"
do_install() {
install -d ${D}${nonarch_base_libdir}/firmware/imx/ele
for fw in ${SECO_FIRMWARE_NAME} ${SECOEXT_FIRMWARE_NAME}; do
install -m 0644 ${S}/$fw ${D}${nonarch_base_libdir}/firmware/imx/ele
done
}
do_deploy () {
# Deploy the related firmware to be packaged by imx-boot
install -m 0644 ${S}/${SECO_FIRMWARE_NAME} ${DEPLOYDIR}
}
addtask deploy after do_install before do_build
FILES:${PN} = "${nonarch_base_libdir}/firmware"
RREPLACES:${PN} = "firmware-sentinel"
RPROVIDES:${PN} = "firmware-sentinel"
COMPATIBLE_MACHINE = "(mx8ulp-generic-bsp|mx9-generic-bsp)"

8
meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/firmware-imx/firmware-imx_%.bbappend
View File

@ -1,8 +0,0 @@
# Copyright (C) 2023, Digi International Inc.
do_install:append() {
# meta-freescale deletes the SDMA firmware provided by the firmware-imx package,
# in favor of the generic one provided by the linux-firmware package. The one
# provided by NXP is more up-to-date, so we want it back.
install -m 0644 ${S}/firmware/sdma/* ${D}${nonarch_base_libdir}/firmware/imx/sdma
}

6
meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf/0007-imx93-bring-back-ELE-clock-workaround-for-soc-revisi.patch
View File

@ -14,10 +14,10 @@ Signed-off-by: Javier Viguera <javier.viguera@digi.com>
2 files changed, 14 insertions(+)
diff --git a/plat/imx/imx93/imx93_psci.c b/plat/imx/imx93/imx93_psci.c
index ccd82d1d2bdc..325fcf75911a 100644
index 526c876e7333..33d9cb6daf07 100644
--- a/plat/imx/imx93/imx93_psci.c
+++ b/plat/imx/imx93/imx93_psci.c
@@ -747,6 +747,11 @@ void imx_pwr_domain_suspend(const psci_power_state_t *target_state)
@@ -755,6 +755,11 @@ void imx_pwr_domain_suspend(const psci_power_state_t *target_state)
if (is_local_state_retn(CLUSTER_PWR_STATE(target_state))) {
write_clusterpwrdn(DSU_CLUSTER_PWR_OFF | BIT(1));
}
@ -29,7 +29,7 @@ index ccd82d1d2bdc..325fcf75911a 100644
}
if (is_local_state_retn(SYSTEM_PWR_STATE(target_state))) {
@@ -878,6 +883,11 @@ void imx_pwr_domain_suspend_finish(const psci_power_state_t *target_state)
@@ -888,6 +893,11 @@ void imx_pwr_domain_suspend_finish(const psci_power_state_t *target_state)
if (!is_local_state_run(CLUSTER_PWR_STATE(target_state))) {
/* set the cluster's target mode to RUN */
gpc_set_cpu_mode(CPU_A55_PLAT, CM_MODE_RUN);

2
meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf/0010-ccimx95-enable-non-secure-non-privilege-access-to-GP.patch
View File

@ -5,6 +5,8 @@ Subject: [PATCH] ccimx95: enable non-secure, non-privilege access to GPIO1
GPIO1 port is reserved on NXP EVK but we want to enable
full access to the port from the non-secure world.
Upstream-Status: Inappropriate [DEY specific]
Signed-off-by: Hector Palacios <hector.palacios@digi.com>
https://onedigi.atlassian.net/browse/DEL-9839

29
meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf/0011-Revert-ccimx95-set-DVK-console-to-LPUART6.patch Normal file
View File

@ -0,0 +1,29 @@
From: Hector Palacios <hector.palacios@digi.com>
Date: Wed, 14 Jan 2026 17:47:38 +0100
Subject: [PATCH] Revert "ccimx95: set DVK console to LPUART6"
On v2 of the SOM, the console has been changed to LPUART1.
This reverts commit 3c0e275d1b1286505dd57591dcf0cd34bd2d1849.
Upstream-Status: Inappropriate [DEY specific]
Signed-off-by: Hector Palacios <hector.palacios@digi.com>
https://onedigi.atlassian.net/browse/DEL-9915
---
plat/imx/imx95/include/platform_def.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/plat/imx/imx95/include/platform_def.h b/plat/imx/imx95/include/platform_def.h
index 3f0a43e49694..d2eff001f548 100644
--- a/plat/imx/imx95/include/platform_def.h
+++ b/plat/imx/imx95/include/platform_def.h
@@ -55,7 +55,7 @@
#ifdef IMX_EMU
#define IMX_LPUART_BASE 0x42570000
#else
-#define IMX_LPUART_BASE 0x425A0000 /* LPUART6 */
+#define IMX_LPUART_BASE 0x44380000
#endif
#define IMX_BOOT_UART_CLK_IN_HZ 24000000 /* Select 24MHz oscillator */

5
meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf_%.bbappend
View File

@ -1,4 +1,4 @@
# Copyright (C) 2022-2025, Digi International Inc.
# Copyright (C) 2022-2026, Digi International Inc.
FILESEXTRAPATHS:prepend := "${THISDIR}/${BPN}:"
@ -13,8 +13,11 @@ SRC_URI:append:dey = " \
file://0008-ccimx91-use-UART6-for-the-default-console.patch \
file://0009-ccimx95-set-DVK-console-to-LPUART6.patch \
file://0010-ccimx95-enable-non-secure-non-privilege-access-to-GP.patch \
file://0011-Revert-ccimx95-set-DVK-console-to-LPUART6.patch \
"
SRCREV = "8ec7e38031f8c022a9760a8da77bdc6e1938db8c"
BOOT_TOOLS = "imx-boot-tools"
EXTRA_OEMAKE += "${@oe.utils.conditional('TRUSTFENCE_CONSOLE_DISABLE', '1', 'LOG_LEVEL=0', '', d)}"

1
meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-secure-enclave/imx-secure-enclave-seco_git.bb
View File

@ -14,6 +14,7 @@ do_install:append:mx95-nxp-bsp() {
done
rm ${D}${datadir}/se/README
rm ${D}${bindir}/nvmd_conf_setup.sh
rm ${D}${bindir}/se_tools
}
COMPATIBLE_MACHINE = "(mx8x-nxp-bsp|mx95-nxp-bsp)"

6
meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-secure-enclave/imx-secure-enclave.inc
View File

@ -10,11 +10,11 @@ DEPENDS = " mbedtls openssl"
SRC_URI = "${SECURE_ENCLAVE_LIB_SRC};branch=${SRCBRANCH}"
SECURE_ENCLAVE_LIB_SRC ?= "git://github.com/NXP/imx-secure-enclave.git;protocol=https"
SRCBRANCH = "lf-6.6.52_2.2.1"
SRCREV = "4f0340fb4cf6b16a64c7d65281b4880c5d1cd453"
SRCBRANCH = "lf-6.6.52_2.2.2"
SRCREV = "8855a24d1220c88c6e2bcc4b36391a7bce6d0755"
# Set package version to the release, so it overrides the recipe in meta-freescale
PV = "lf-6.6.52_2.2.1"
PV = "lf-6.6.52_2.2.2"
S = "${WORKDIR}/git"

2
meta-digi-arm/dynamic-layers/freescale-layer/recipes-graphics/wayland/weston_12.0.5.imx.bb
View File

@ -12,4 +12,4 @@ require recipes-graphics/wayland/weston_12.0.4.imx.bb
FILESEXTRAPATHS:prepend := "${COREBASE}/../meta-freescale/recipes-graphics/wayland/weston:"
SRCBRANCH = "weston-imx-12.0.5"
SRCREV = "fce3595b96eab0b2b432ceae070a65db7d16d866"
SRCREV = "a29bbd0f65e68b9beda47a94144bd9b2801c42cb"

29
meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os/0006-ccimx95-configure-console-on-LPUART1.patch Normal file
View File

@ -0,0 +1,29 @@
From: Hector Palacios <hector.palacios@digi.com>
Date: Wed, 14 Jan 2026 17:15:53 +0100
Subject: [PATCH] ccimx95: configure console on LPUART1
On version 2 of the SOM, the console has been changed
to LPUART1.
Upstream-Status: Inappropriate [DEY specific]
Signed-off-by: Hector Palacios <hector.palacios@digi.com>
https://onedigi.atlassian.net/browse/DEL-9915
---
core/arch/arm/plat-imx/conf.mk | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/core/arch/arm/plat-imx/conf.mk b/core/arch/arm/plat-imx/conf.mk
index 55f4c21d0321..7c674e6f99a2 100644
--- a/core/arch/arm/plat-imx/conf.mk
+++ b/core/arch/arm/plat-imx/conf.mk
@@ -528,7 +528,7 @@ endif
ifneq (,$(filter $(PLATFORM_FLAVOR),ccimx95dvk))
CFG_DDR_SIZE ?= 0x80000000
-CFG_UART_BASE ?= UART6_BASE
+CFG_UART_BASE ?= UART1_BASE
CFG_NSEC_DDR_1_BASE ?= 0x100000000UL
CFG_NSEC_DDR_1_SIZE ?= 0x180000000UL
CFG_CORE_ARM64_PA_BITS ?= 40

3
meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/optee-imx/optee-os_4.4.0.imx.bbappend
View File

@ -1,4 +1,4 @@
# Copyright (C) 2024, 2025, Digi International Inc.
# Copyright (C) 2024-2026, Digi International Inc.
FILESEXTRAPATHS:prepend := "${THISDIR}/${BPN}:"
SRC_URI += "file://environment.d-optee-sdk.sh"
@ -9,6 +9,7 @@ SRC_URI:append:dey = " \
file://0003-core-imx-support-ccimx93-dvk.patch \
file://0004-core-ccimx93-enable-AES_HUK-trusted-application.patch \
file://0005-core-imx-support-ccimx95-dvk.patch \
file://0006-ccimx95-configure-console-on-LPUART1.patch \
"
OPTEEMACHINE:ccimx8mm = "imx-ccimx8mmdvk"

33
meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/smw/itest_git.bb Normal file
View File

@ -0,0 +1,33 @@
# Copyright 2023-2024 NXP
SUMMARY = "NXP i.MX Itest"
DESCRIPTION = "NXP i.MX Itest"
SECTION = "base"
LICENSE = "BSD-3-Clause"
LIC_FILES_CHKSUM = "file://LICENSE;md5=8636bd68fc00cc6a3809b7b58b45f982"
SRC_URI = "${ITEST_SRC};branch=${SRCBRANCH}"
ITEST_SRC ?= "git://github.com/nxp-imx/itest.git;protocol=https"
SRCBRANCH = "lf-6.6.52_2.2.0"
SRCREV = "6087762a69fe51bea508b1383d54ff28a10eef9f"
S = "${WORKDIR}/git"
inherit cmake
PACKAGECONFIG:mx8dxl-nxp-bsp ??= "ele-seco"
PACKAGECONFIG:mx8ulp-nxp-bsp ??= "ele"
PACKAGECONFIG:mx91-nxp-bsp ??= "ele"
PACKAGECONFIG:mx93-nxp-bsp ??= "ele"
PACKAGECONFIG:mx95-nxp-bsp ??= "ele ele-seco"
PACKAGECONFIG[ele] = "-DELE=1,,imx-secure-enclave"
PACKAGECONFIG[ele-seco] = "-DV2X=1,,imx-secure-enclave-seco"
EXTRA_OECMAKE = " \
-DOPENSSL_PATH="${STAGING_DIR_HOST}/usr" \
-DELE_LIB_PATH="${STAGING_DIR_HOST}/usr" \
-DLIB_PATH="${STAGING_DIR_HOST}${libdir}""
PACKAGE_ARCH = "${MACHINE_SOCARCH}"
COMPATIBLE_MACHINE = "(mx8dxl-nxp-bsp|mx8ulp-nxp-bsp|mx91-nxp-bsp|mx93-nxp-bsp|mx95-nxp-bsp)"

86
meta-digi-arm/dynamic-layers/freescale-layer/recipes-security/smw/smw_git.bb Normal file
View File

@ -0,0 +1,86 @@
# Copyright 2020-24 NXP
SUMMARY = "NXP i.MX Security Middleware Library"
DESCRIPTION = "NXP i.MX Security Middleware Library"
SECTION = "base"
LICENSE = "BSD-3-Clause"
LICENSE = "Apache-2.0 & BSD-3-Clause & Zlib"
LIC_FILES_CHKSUM = "file://LICENSE;md5=6087d19da5441648e33f85ae64cf2a7d \
file://../psa-arch-tests/LICENSE.md;md5=2a944942e1496af1886903d274dedb13"
DEPENDS = " \
python3-cryptography-native \
json-c \
optee-client \
optee-os-tadevkit \
sqlite3 \
"
SRC_URI = "${SMW_LIB_SRC};branch=${SRCBRANCH_smw};name=smw;destsuffix=git/smw \
${PSA_LIB_SRC};branch=${SRCBRANCH_psa};name=psa;destsuffix=git/${PSA_ARCH_TESTS_SRC_PATH} \
"
SMW_LIB_SRC ?= "git://github.com/nxp-imx/imx-smw.git;protocol=https"
PSA_LIB_SRC ?= "git://github.com/ARM-software/psa-arch-tests.git;protocol=https"
PSA_ARCH_TESTS_SRC_PATH = "psa-arch-tests"
SRCBRANCH_smw = "release/release_5.x_LF6.6"
SRCBRANCH_psa = "main"
SRCREV_smw = "7007a5b3619325a1e87306b0f27761b24418c325"
SRCREV_psa = "463cb95ada820bc6f758d50066cf8c0ed5cc3a02"
SRCREV_FORMAT = "smw_psa"
S = "${WORKDIR}/git/smw"
inherit cmake python3native
PACKAGECONFIG ??= "${PACKAGECONFIG_DRIVERS} ${PACKAGECONFIG_FEATURES}"
PACKAGECONFIG_DRIVERS = ""
PACKAGECONFIG_DRIVERS:mx8qxp-nxp-bsp = "ele-seco"
PACKAGECONFIG_DRIVERS:mx8dx-nxp-bsp = "ele-seco"
PACKAGECONFIG_DRIVERS:mx8ulp-nxp-bsp = "ele"
PACKAGECONFIG_DRIVERS:mx91-nxp-bsp = "ele"
PACKAGECONFIG_DRIVERS:mx93-nxp-bsp = "ele"
PACKAGECONFIG_DRIVERS:mx95-nxp-bsp = "ele"
PACKAGECONFIG_FEATURES = ""
PACKAGECONFIG_FEATURES:mx91-nxp-bsp = "tls"
PACKAGECONFIG_FEATURES:mx93-nxp-bsp = "tls"
PACKAGECONFIG_FEATURES:mx95-nxp-bsp = "tls"
PACKAGECONFIG[ele] = "-DELE_ROOT=${STAGING_DIR_HOST},,imx-secure-enclave,,,ele-seco"
PACKAGECONFIG[ele-seco] = "-DSECO_ROOT=${STAGING_DIR_HOST},,imx-secure-enclave-seco,,,ele"
PACKAGECONFIG[tls] = "-DENABLE_TLS=ON,-DENABLE_TLS=OFF,openssl"
CFLAGS[unexport] = "1"
CPPFLAGS[unexport] = "1"
AS[unexport] = "1"
LD[unexport] = "1"
# setting the linker options
TARGET_LDFLAGS:remove = "${DEBUG_PREFIX_MAP}"
# DEY: from meta-arm's optee.inc
TA_DEV_KIT_DIR = "${STAGING_INCDIR}/optee/export-user_ta"
export OPENSSL_MODULES="${STAGING_LIBDIR_NATIVE}/ossl-modules"
EXTRA_OECMAKE = " \
-DYOCTO_BUILD=ON \
-DTA_DEV_KIT_ROOT=${TA_DEV_KIT_DIR} \
-DTEEC_ROOT=${STAGING_DIR_HOST} \
-DJSONC_ROOT="${COMPONENTS_DIR}/${TARGET_ARCH}/json-c/usr" \
-DPSA_ARCH_TESTS_SRC_PATH=../${PSA_ARCH_TESTS_SRC_PATH} \
-DTEE_TA_DESTDIR=${nonarch_base_libdir} \
"
OECMAKE_TARGET_COMPILE += "build_tests"
OECMAKE_TARGET_INSTALL += "install_tests"
PACKAGES =+ "${PN}-tests"
FILES:${PN} += "${nonarch_base_libdir}/optee_armtz/*"
FILES:${PN}-tests = "${bindir}/* ${datadir}/${BPN}/*"
RDEPENDS:${PN}-tests += "cmake"
PACKAGE_ARCH = "${MACHINE_SOCARCH}"
COMPATIBLE_MACHINE = "(imx-nxp-bsp)"

30
meta-digi-arm/dynamic-layers/freescale-layer/recipes-support/pkcs11-provider/pkcs11-provider_1.0.imx.bb Normal file
View File

@ -0,0 +1,30 @@
SUMMARY = "An OpenSSL provider that allows direct interfacing with pkcs11 drivers"
DESCRIPTION = "\
This is an Openssl 3.x provider to access Hardware or Software Tokens using \
the PKCS#11 Cryptographic Token Interface\
\
This code targets version 3.1 of the interface but should be backwards \
compatible to previous versions as well.\
"
HOMEPAGE = "https://github.com/latchset/pkcs11-provider"
SECTION = "libs"
LICENSE = "Apache-2.0"
LIC_FILES_CHKSUM = "file://COPYING;md5=b53b787444a60266932bd270d1cf2d45"
DEPENDS = "\
openssl \
p11-kit \
"
SRC_URI = "${PKCS11_PROVIDER_SRC};branch=${SRCBRANCH}"
PKCS11_PROVIDER_SRC ?= "git://github.com/nxp-imx/${BPN}.git;branch=main;protocol=https"
SRCBRANCH = "lf-6.6.52_2.2.2"
SRCREV = "ededfa20fe2430f33a5e8ea8971af708a2eb65eb"
S = "${WORKDIR}/git"
inherit meson pkgconfig
# Overwrite default pkcs11 module path
#EXTRA_OEMESON += "-Ddefault_pkcs11_module=/path/to/mymodule.so"
FILES:${PN} += "${libdir}/ossl-modules/pkcs11.so"

27
meta-digi-arm/dynamic-layers/stm-st-stm32mp/recipes-bsp/trusted-firmware-m/tf-m-stm32mp-scripts_2.1.bbappend Normal file
View File

@ -0,0 +1,27 @@
#
# Copyright (C) 2026, Digi International Inc.
#
do_install() {
# Install assemble and signing firmware script
install -d ${D}${bindir}
install -m 755 ${WORKDIR}/scripts/create_st_m33fw_binary.sh ${D}${bindir}
install -m 755 ${WORKDIR}/scripts/st_m33td_firmware_signature.sh ${D}${bindir}
# Update version
sed 's/^SIGN_VERSION=.*$/SIGN_VERSION='"${TF_M_VERSION}"'/' -i ${D}${bindir}/st_m33td_firmware_signature.sh
# Install default MCUBOOT keys
install -d ${D}${datadir}/tf-m/keys
install -m 0644 ${S}/bl2/ext/mcuboot/root-EC-P256.pem ${D}${datadir}/tf-m/keys/root-ec-p256.pem
install -m 0644 ${S}/bl2/ext/mcuboot/root-EC-P256_1.pem ${D}${datadir}/tf-m/keys/root-ec-p256_1.pem
# Install all python scripts needed for assemble and sign
install -d ${D}${datadir}/tf-m/scripts
install -m 0755 ${S}/bl2/ext/mcuboot/scripts/assemble.py ${D}${datadir}/tf-m/scripts
install -m 0755 ${S}/bl2/ext/mcuboot/scripts/macro_parser.py ${D}${datadir}/tf-m/scripts
install -d ${D}${datadir}/tf-m/scripts/wrapper
install -m 0755 ${S}/bl2/ext/mcuboot/scripts/wrapper/wrapper.py ${D}${datadir}/tf-m/scripts/wrapper
# Install imgtool suite
install -m 0755 ${WORKDIR}/${TF_M_EXTERNAL_SOURCES_ROOTDIR}/${TF_M_PATH_MCUBOOT}/scripts/imgtool.py ${D}${datadir}/tf-m/scripts/wrapper
install -d ${D}${datadir}/tf-m/scripts/wrapper/imgtool
cp -rf ${WORKDIR}/${TF_M_EXTERNAL_SOURCES_ROOTDIR}/${TF_M_PATH_MCUBOOT}/scripts/imgtool/* ${D}${datadir}/tf-m/scripts/wrapper/imgtool/
}

6
meta-digi-arm/dynamic-layers/stm-st-stm32mp/recipes-bsp/trusted-firmware-m/tf-m-stm32mp_2.1.bbappend Normal file
View File

@ -0,0 +1,6 @@
#
# Copyright (C) 2026, Digi International Inc.
#
# Inherit custom DIGI sign class to skip signing tool and key parsing restrictions
inherit sign-stm32mp-digi

6
meta-digi-arm/dynamic-layers/stm-st-stm32mp/recipes-extended/stm32mp2projects/m33fw-stm32mp2.bbappend Normal file
View File

@ -0,0 +1,6 @@
#
# Copyright (C) 2026, Digi International Inc.
#
# Inherit custom DIGI sign class to skip signing tool and key parsing restrictions
inherit sign-stm32mp-digi

7
meta-digi-arm/dynamic-layers/stm-st-stm32mp/recipes-graphics/wayland/weston-init.bbappend
View File

@ -1,10 +1,13 @@
# Copyright (C) 2026, Digi International Inc.
FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:"
WESTON_BACKGROUND_PNG ?= "${WORKDIR}/background.png"
DEPENDS += "${@oe.utils.conditional('DISTRO_FEATURES', 'pulseaudio', 'pulseaudio', '', d)}"
SRC_URI += " \
file://weston.ini \
file://digi_background.png \
file://background.png \
file://weston-launch.service \
file://weston-checkgpu.service \
file://weston_profile.sh \
@ -42,7 +45,7 @@ do_install() {
install -m 0644 ${WORKDIR}/weston.ini ${D}${sysconfdir}/xdg/weston
install -m 0644 ${WORKDIR}/digi_background.png ${D}${datadir}/weston/backgrounds/digi_background.png
install -m 0644 "${WESTON_BACKGROUND_PNG}" ${D}${datadir}/weston/backgrounds/background.png
printf "\n[launcher]\nicon=${datadir}/weston/terminal.png\npath=${bindir}/weston-terminal\n" >> ${D}${sysconfdir}/xdg/weston/weston.ini
install -d ${D}${systemd_system_unitdir} ${D}${sbindir}

0
meta-digi-arm/dynamic-layers/stm-st-stm32mp/recipes-graphics/wayland/weston-init/digi_background.png → meta-digi-arm/dynamic-layers/stm-st-stm32mp/recipes-graphics/wayland/weston-init/background.png
View File

Side by Side Swipe Overlay

Before

Width:  |  Height:  |  Size: 30 KiB

After

Width:  |  Height:  |  Size: 30 KiB

2
meta-digi-arm/dynamic-layers/stm-st-stm32mp/recipes-graphics/wayland/weston-init/weston.ini
View File

@ -13,7 +13,7 @@ remoting=remoting-plugin.so
keymap_layout=us
[shell]
background-image=/usr/share/weston/backgrounds/digi_background.png
background-image=/usr/share/weston/backgrounds/background.png
background-type=scale-crop
# HDMI connector

92
meta-digi-arm/dynamic-layers/stm-st-stm32mp/recipes-graphics/wayland/weston/0005-Revert-libweston-libinput-device-Enable-Set-pointer-.patch Normal file
View File

@ -0,0 +1,92 @@
From: Haihua Hu <jared.hu@nxp.com>
Date: Wed, 3 Aug 2022 16:34:47 +0800
Subject: [PATCH] Revert "libweston/libinput-device: Enable/Set pointer
capabilities only on pointer movement"
This reverts commit e825fe389ebd63470028abd828019840c1170a03.
This commit will cause waylandsink cannot register pointer seat.
As a result, mouse cannot move waylandsink window
(cherry picked from commit 3f8f336b5d2cf7ea7aa4e047d669d093fc46dfe6)
Upstream-Status: Inappropriate [DEY specific]
---
libweston/libinput-device.c | 29 +++++------------------------
1 file changed, 5 insertions(+), 24 deletions(-)
diff --git a/libweston/libinput-device.c b/libweston/libinput-device.c
index 4ea89de0..2d7a7d5f 100644
--- a/libweston/libinput-device.c
+++ b/libweston/libinput-device.c
@@ -60,21 +60,6 @@ evdev_led_update(struct evdev_device *device, enum weston_led weston_leds)
libinput_device_led_update(device->device, leds);
}
-static void
-ensure_pointer_capability(struct libinput_device *libinput_device)
-{
- struct evdev_device *device = libinput_device_get_user_data(libinput_device);
- struct weston_seat *seat = device->seat;
-
- if (!libinput_device_has_capability(libinput_device, LIBINPUT_DEVICE_CAP_POINTER))
- return;
-
- if (!(device->seat_caps & EVDEV_SEAT_POINTER)) {
- weston_seat_init_pointer(seat);
- device->seat_caps |= EVDEV_SEAT_POINTER;
- }
-}
-
static void
handle_keyboard_key(struct libinput_device *libinput_device,
struct libinput_event_keyboard *keyboard_event)
@@ -112,8 +97,6 @@ handle_pointer_motion(struct libinput_device *libinput_device,
struct timespec time;
double dx_unaccel, dy_unaccel;
- ensure_pointer_capability(libinput_device);
-
timespec_from_usec(&time,
libinput_event_pointer_get_time_usec(pointer_event));
dx_unaccel = libinput_event_pointer_get_dx_unaccelerated(pointer_event);
@@ -146,8 +129,6 @@ handle_pointer_motion_absolute(
double x, y;
uint32_t width, height;
- ensure_pointer_capability(libinput_device);
-
if (!output)
return false;
@@ -179,8 +160,6 @@ handle_pointer_button(struct libinput_device *libinput_device,
libinput_event_pointer_get_seat_button_count(pointer_event);
struct timespec time;
- ensure_pointer_capability(libinput_device);
-
/* Ignore button events that are not seat wide state changes. */
if ((button_state == LIBINPUT_BUTTON_STATE_PRESSED &&
seat_button_count != 1) ||
@@ -260,8 +239,6 @@ handle_pointer_axis(struct libinput_device *libinput_device,
bool has_vert, has_horiz;
struct timespec time;
- ensure_pointer_capability(libinput_device);
-
has_vert = libinput_event_pointer_has_axis(pointer_event,
LIBINPUT_POINTER_AXIS_SCROLL_VERTICAL);
has_horiz = libinput_event_pointer_has_axis(pointer_event,
@@ -738,7 +715,11 @@ evdev_device_create(struct libinput_device *libinput_device,
device->seat_caps |= EVDEV_SEAT_KEYBOARD;
}
-
+ if (libinput_device_has_capability(libinput_device,
+ LIBINPUT_DEVICE_CAP_POINTER)) {
+ weston_seat_init_pointer(seat);
+ device->seat_caps |= EVDEV_SEAT_POINTER;
+ }
if (libinput_device_has_capability(libinput_device,
LIBINPUT_DEVICE_CAP_TOUCH)) {
if (weston_seat_init_touch(seat) < 0) {

1
meta-digi-arm/dynamic-layers/stm-st-stm32mp/recipes-graphics/wayland/weston_13.0.1.bbappend
View File

@ -5,6 +5,7 @@ SRC_URI:append:stm32mpcommon = " \
file://0002-Disable-request-to-EGL_DRM_RENDER_NODE_FILE_EXT.patch \
file://0003-Revert-compositor-improve-opacity-handling-for-scale.patch \
file://0004-Revert-compositor-set-transform.opaque-for-surfaces-.patch \
file://0005-Revert-libweston-libinput-device-Enable-Set-pointer-.patch \
"
SIMPLECLIENTS="egl,touch,dmabuf-v4l,dmabuf-egl"

61
meta-digi-arm/dynamic-layers/stm-st-stm32mp/recipes-multimedia/evision/evision-libs_1.0.7.bb Normal file
View File

@ -0,0 +1,61 @@
# Copyright (C) 2024, STMicroelectronics - All Rights Reserved
SUMMARY = "evision package to install AE an AWB algorithm libraries"
LICENSE = "SLA0044"
LIC_FILES_CHKSUM = "file://evision-libs/LICENSE;md5=91fc08c2e8dfcd4229b69819ef52827c"
NO_GENERIC_LICENSE[SLA0044] = "evision-libs/LICENSE"
LICENSE:${PN} = "SLA0044"
SRC_URI = "file://evision-libs/;subdir=${BPN}-${PV} \
"
COMPATIBLE_MACHINE = "^(aarch64)"
# Configure evision output library dir
ST_SPECIFIC_OUTPUT_LIBDIR ??= "${libdir}"
EVISION_LDCONF ?= "evision.conf"
S = "${WORKDIR}/${BPN}-${PV}"
do_configure[noexec] = "1"
do_compile() {
# Generate specific conf file if required
if [ "${ST_SPECIFIC_OUTPUT_LIBDIR}" = "${libdir}" ]; then
bbnote "evision output libdir is default one (${libdir})"
echo "" > ${B}/${EVISION_LDCONF}
else
bbnote "evision output libdir set to ${ST_SPECIFIC_OUTPUT_LIBDIR}: generate specific conf file for ldconfig"
echo ${ST_SPECIFIC_OUTPUT_LIBDIR} > ${B}/${EVISION_LDCONF}
fi
}
do_install() {
# includes
install -m 0755 -d ${D}${includedir}/evision
install -m 0644 ${S}/evision-libs/*.h ${D}${includedir}/evision
install -m 0644 ${S}/evision-libs/LICENSE ${D}${includedir}/evision
# libraries
install -m 0755 -d ${D}${ST_SPECIFIC_OUTPUT_LIBDIR}
install -m 0755 ${S}/evision-libs/*.so.* ${D}${ST_SPECIFIC_OUTPUT_LIBDIR}/
# ldconfig file
if [ -s "${B}/${EVISION_LDCONF}" ]; then
install -d ${D}${sysconfdir}/ld.so.conf.d/
install -m 0644 "${B}/${EVISION_LDCONF}" ${D}${sysconfdir}/ld.so.conf.d/
fi
}
PACKAGES += "\
evision-ldconf \
"
FILES:${PN} = "${ST_SPECIFIC_OUTPUT_LIBDIR}/*.so.*"
FILES:evision-ldconf = "${sysconfdir}/ld.so.conf.d/*"
ALLOW_EMPTY:${evision-ldconf} = "1"
RDEPENDS:${PN} += "\
evision-ldconf \
"

81
meta-digi-arm/dynamic-layers/stm-st-stm32mp/recipes-multimedia/evision/files/evision-libs/LICENSE Normal file
View File

@ -0,0 +1,81 @@
SLA0044 Rev5/February 2018
Software license agreement
ULTIMATE LIBERTY SOFTWARE LICENSE AGREEMENT
BY INSTALLING, COPYING, DOWNLOADING, ACCESSING OR OTHERWISE USING THIS SOFTWARE
OR ANY PART THEREOF (AND THE RELATED DOCUMENTATION) FROM STMICROELECTRONICS
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/**
******************************************************************************
* @file evision-api-awb.h
* @author LACROIX - Impulse
* @brief eVision Auto White Balance algorithm public header.
******************************************************************************
* @attention
*
* Copyright (c) 2023 LACROIX - Impulse.
* Copyright (c) 2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
#ifndef EVISION_API_AWB_H_
#define EVISION_API_AWB_H_
/************************************************************************
* Includes
************************************************************************/
#include <stdint.h>
#include <stdlib.h>
#include "evision-api-utils.h"
/************************************************************************
* Public Defines
************************************************************************/
/*! @brief Maximum number of supported sensor configurations. */
#define EVISION_AWB_MAX_SENSOR_CONFIGS (2u)
/*! @brief Default sensor configuration index. */
#define EVISION_AWB_DEFAULT_SENSOR_CONFIG_INDEX (0u)
/*! @brief Default number of ROIs for AWB. */
#define EVISION_AWB_DEFAULT_NB_ROI (1u)
/*! @brief Maximum number of AWB profiles. */
#define EVISION_AWB_MAX_PROFILE_COUNT (5u)
/*! @brief Number of CFA digital gains for AWB */
#define EVISION_AWB_NB_DG_CFA_GAINS (4u)
/*! @brief Number of rows / columns of CCM for AWB */
#define EVISION_AWB_CCM_SIZE (3u)
/*! @brief Size of estimated color temperatures history. Restrictions: >= 3. */
#define EVISION_AWB_HIST_SIZE (3u)
/*! @brief Number of components for external measurements */
#define EVISION_AWB_EXT_MEAS_SIZE (3u)
/*! @brief Flag value to indicate the use of profile selection based AWB operation mode. */
#define EVISION_AWB_USE_PROFILE_SELECTION_AWB (1u)
/************************************************************************
* Public Structures
************************************************************************/
/**
* @typedef evision_awb_priv_param_runtime_t
* @brief AWB algorithm private run-time parameters, member of #evision_awb_estimator_t.
*
* @struct evision_awb_priv_param_runtime
* @brief AWB algorithm private run-time parameters, member of #evision_awb_estimator_t.
*/
typedef struct evision_awb_priv_param_runtime {
/*! @brief
* Current convergence speed. <br/>
* <b>Restrictions:</b> Internal algorithm parameter. Must not be changed! <br/>
* <b>Default value:</b> 1.0
*/
double speed_p_value;
/*! @brief
* Flag to indicate change in estimated AWB color temperature. <br/>
* <b>Restrictions:</b> Internal algorithm parameter. Must not be changed! <br/>
* <b>Default value:</b> 0
*/
uint8_t temp_changed;
/*! @brief
* AWB internal color temperature. <br/>
* <b>Restrictions:</b> Internal algorithm parameter. Must not be changed! <br/>
* <b>Default value:</b> -1.0
*/
double int_temp;
/*! @brief
* T value parameter. <br/>
* <b>Restrictions:</b> Internal algorithm parameter. Must not be changed! <br/>
* <b>Default value:</b> 0.1 */
double t_value;
/*! @brief
* Flag to indicate the estimator has entered an oscillatory state. <br/>
* <b>Restrictions:</b> >=0 AND < #EVISION_AWB_HIST_SIZE
*/
uint8_t oscillation;
/*! @brief
* History of selected profile color temperatures. <br/>
*/
double hist_temp_current[EVISION_AWB_HIST_SIZE];
/*! @brief
* History of computed color temperatures. <br/>
*/
double hist_temp_estim[EVISION_AWB_HIST_SIZE];
/*! @brief
* History of computed chromaticity stats. <br/>
*/
double hist_stats[EVISION_AWB_HIST_SIZE][2u];
/*! @brief
* Counter for the current number of items in history. <br/>
* <b>Restrictions:</b> >=0 AND < #EVISION_AWB_HIST_SIZE
*/
uint16_t cnt_hist;
} evision_awb_priv_param_runtime_t;
/**
* @typedef evision_awb_profile_t
* @brief AWB algorithm profile definition.
*
* @struct evision_awb_profile
* @brief AWB algorithm profile definition.
*/
typedef struct evision_awb_profile {
/*! @brief
* The color temperature of the illumination for which the profile is defined.
* Positive value, typical range of values is between 2000 and 10000 °Kelvin. <br/>
* <b>Restrictions:</b> Internal algorithm parameter set during initialization, must not be changed during run-time. <br/>
*/
float color_temperature;
/*! @brief
* The sensor/ISP channel gains. <br/>
* <b>Note:</b> The individual gain values are stored using the float type.
* The gains can be stored as ratios or as floating point representations of integer values.
* It is up to the user to convert the values to the format expected by the sensor/ISP.
*/
float gain_values[EVISION_AWB_NB_DG_CFA_GAINS];
/*! @brief
* The ISP color correction matrix coefficients. <br/>
* <b>Note:</b> The individual color correction matrix coefficients are stored using the float type.
* The coefficients can be stored as ratios or as a floating point representation of integer values.
* It is up to the user to convert the values to the format expected by the sensor/ISP.
*/
float ccm_coefficients[EVISION_AWB_CCM_SIZE][EVISION_AWB_CCM_SIZE];
/*! @brief
* The ISP color correction matrix offset coefficients. <br/>
* <b>Note:</b> The individual color correction matrix offset coefficients are stored using the float type.
* The coefficients can be stored as ratios or as a floating point representation of integer values.
* It is up to the user to convert the values to the format expected by the sensor/ISP.
*/
float ccm_offsets[EVISION_AWB_CCM_SIZE];
} evision_awb_profile_t;
/**
* @typedef evision_awb_calib_data_t
* @brief Sensor specific AWB calibration data, member of #evision_awb_estimator_t.
*
* @struct evision_awb_calib_data
* @brief Sensor specific AWB calibration data, member of #evision_awb_estimator_t.
*
* Contains sensor specific AWB calibration data for accurate color rendering.
* Support for both continious AWB and profile selection based AWB.
*
*/
typedef struct evision_awb_calib_data {
/*! @brief
* Minimum supported color temperature. <br/>
* <b>Restrictions:</b> Internal algorithm parameter, positive valued. Set during estimator initialization.
*/
double min_temp;
/*! @brief
* Maximum supported color temperature. <br/>
* <b>Restrictions:</b> Internal algorithm parameter, positive valued and > #min_temp. Set during estimator initialization.
*/
double max_temp;
/* ##############################
Parameters for continuous AWB
*/
/* #################################
Parameters for profile based AWB
*/
/*! @brief
* Counter for the actual number of specified profiles. <br/>
* <b>Restrictions:</b> Internal algorithm parameter set during initialization. Must not be changed during runtime.
* Range of possible values: > 0 and < #EVISION_AWB_MAX_PROFILE_COUNT
*/
uint16_t profiles_count;
/*! @brief
* Array containing the color temperatures of the defined profiles. <br/>
* <b>Restrictions:</b> Internal algorithm parameter set during initialization. Must not be changed during runtime.
*/
float temperatures[EVISION_AWB_MAX_PROFILE_COUNT];
/*! @brief
* Array containing the decision thresholds between the different profiles for profile selection. <br/>
* <b>Restrictions:</b> Internal algorithm parameter set during initialization. Must not be changed during runtime.
*/
float decision_thresholds[EVISION_AWB_MAX_PROFILE_COUNT - 1];
/*! @brief
* Array containing the different AWB profiles. <br/>
* <b>Restrictions:</b> Internal algorithm parameter set during initialization. Must not be changed during runtime.
*/
evision_awb_profile_t profiles[EVISION_AWB_MAX_PROFILE_COUNT];
/*! @brief
* Pointer to the active profile. <br/>
* <b>Restrictions:</b> Internal algorithm parameter updated during runtime. Code outside of the library must not alter its value.
*/
evision_awb_profile_t* active_profile;
} evision_awb_calib_data_t;
/**
* @typedef evision_awb_hyper_param_t
* @brief AWB algorithm hyper-parameters, member of #evision_awb_estimator_t.
*
* @struct evision_awb_hyper_param
* @brief AWB algorithm hyper-parameters, member of #evision_awb_estimator_t.
*
*/
typedef struct evision_awb_hyper_param {
/*! @brief
* Ratio of pixels to be processed for AWB when using the SW statistics extraction block, direct impact on processing time.
* (Ex. A value of 2 will process 1 pixel every 2*2 pixel block in the entire ROI). <br/>
* <b>Restrictions:</b> >= 1 AND < image_size. <br/>
* <b>Default value:</b> 1 */
uint16_t awb_process_ratio;
/*! @brief
* AWB low luminance threshold value when using the SW statistics extraction block.
* Skip pixel from AWB stats if luminance value below the threshold. <br/>
* <b>Restrictions:</b> >= 0 AND < #y_thresh_high. <br/>
* <b>Default value:</b> 0 */
double y_thresh_low;
/*! @brief
* AWB high luminance threshold value when using the SW statistics extraction block.
* Skip pixel from AWB stats if luminance value above the threshold. <br/>
* <b>Restrictions:</b> > #y_thresh_low AND <= 255. <br/>
* <b>Default value:</b> 0 */
double y_thresh_high;
/*! @brief
* Convergence speed increment. <br/>
* <b>Restrictions:</b> > 0 AND < #speed_p_max. <br/>
* <b>Default value:</b> 0.1 */
double speed_p_increment;
/*! @brief
* Minimum convergence speed. <br/>
* <b>Restrictions:</b> > 0 AND < #speed_p_max. <br/>
* <b>Default value:</b> 1.0 */
double speed_p_min;
/*! @brief
* Maximum convergence speed. <br/>
* <b>Restrictions:</b> > #speed_p_min. <br/>
* <b>Default value:</b> 3.0 */
double speed_p_max;
/*! @brief
* AWB color temperature estimation precision. <br/>
* <b>Default value:</b> 1 °K */
double precision_temp;
/*! @brief
* Offset around the decision threshold for hysteresis based decision for profile selection. <br/>
* <b>Default value:</b> 50 °K */
float hysteresis_offset;
/*! @brief
* Threshold of acceptable chromatic deviation around neutrality for convergence. <br/>
* <b>Restrictions:</b> > 0. <br/>
* <b>Default value:</b> 1.0. */
float conv_criterion;
/*! @brief
* Threshold of acceptable chromatic deviation along the green-magenta axis.
* Inhibit profile switch if the green or magenta component is higher than this threshold.<br/>
* <b>Restrictions:</b> > 0. <br/>
* <b>Default value:</b> 0.5. */
float gm_tolerance;
/*! @brief
* Tolerance parameter to assess color temperature similarity: assume same colour temperature if absolute difference smaller than this value.
* Parameter of the profile selection oscillation detection logic.<br/>
* <b>Restrictions:</b> > 0 and >= 2 * #hysteresis_offset <br/>
* <b>Default value:</b> 175 K. */
float ct_tolerance;
/*! @brief
* Tolerance parameter to assess similarity of AWB statistics: assume identical statistics if euclidean norm smaller than this value.
* Parameter of the profile selection oscillation detection logic.<br/>
* <b>Restrictions:</b> > 0. <br/>
* <b>Default value:</b> 1.5. */
float stats_tolerance;
} evision_awb_hyper_param_t;
/**
* @typedef evision_awb_estimator_t
* @brief AWB estimator structure.
*
* @struct evision_awb_estimator
* @brief AWB estimator structure.
*
* Set of all data structures required for the functioning of the AWB algorithm.
*/
typedef struct evision_awb_estimator {
/*! @brief
* Indicates the state of the AWB algorithm. <br/>
* <b>Restrictions:</b> Internal algorithm parameter. Must not be changed! <br/>
* Possible values: see #evision_state_t */
evision_state_t state;
/*! @brief
* Computed sensor/ISP gain values stored as float values.
* To be applied to the sensor/ISP after conversion to the format expected by the sensor/ISP. <br/>
* <b>Restrictions:</b> Internal algorithm parameter. Must not be changed! <br/>
* <b>Note:</b> Storing values as floats provides the required flexibility to support different sensors and ISPs.
* Converting the float value to the specific sensor/ISP format is to be performed at application level.
*/
float dg_cf[EVISION_AWB_NB_DG_CFA_GAINS];
/*! @brief
* Computed ISP CCM coefficients stored as float values.
* To be applied to the sensor/ISP after conversion to the format expected by the sensor/ISP. <br/>
* <b>Restrictions:</b> Internal algorithm parameter. Must not be changed! <br/>
* <b>Note:</b> Storing values as floats provides the required flexibility to support different sensors and ISPs.
* Converting the float value to the specific sensor/ISP format is to be performed at application level.
*/
float ccm[EVISION_AWB_CCM_SIZE][EVISION_AWB_CCM_SIZE];
/*! @brief
* Computed ISP CCM offset coefficients stored as float values.
* To be applied to the sensor/ISP after conversion to the format expected by the sensor/ISP. <br/>
* <b>Restrictions:</b> Internal algorithm parameter. Must not be changed! <br/>
* <b>Note:</b> Storing values as floats provides the required flexibility to support different sensors and ISPs.
* Converting the float value to the specific sensor/ISP format is to be performed at application level.
*/
float ccm_offsets[EVISION_AWB_CCM_SIZE];
/*! @brief
* Estimated color temperature. <br/>
* <b>Restrictions:</b> Internal algorithm parameter. Must not be changed! <br/>
* <b>Default value:</b> 5000 °K
*/
double out_temp;
/*! @brief
* Select the AWB operating mode. <br/>
* <b>Restrictions:</b> Only profile selection AWB is currently supported.
*/
uint8_t awb_mode;
/*! @brief
* The set of run-time variables. <br/>
* <b>Restrictions:</b> Internal algorithm parameters.
* Must not be changed! */
evision_awb_priv_param_runtime_t runtime_vars;
/*! @brief
* AWB calibration data. <br/>
* <b>Restrictions:</b> Internal algorithm parameter.
* Must be set during initialization using the provided functions!
* Must not be changed during runtime! */
evision_awb_calib_data_t calib_data;
/*! @brief
* The set of AWB algorithm hyper-parameters. Set to default values during initialization! <br/>
* As a general note, the hyper-parameters can be updated from their default values.
* Care must be taken as in such a case there is no guarantee of proper functioning of the estimator! <br/>
* <b>Restrictions:</b> Must not be updated during runtime!
*/
evision_awb_hyper_param_t hyper_params;
/*! @brief
* Handler to output logs. <br/> */
evision_api_log_callback log_cb;
} evision_awb_estimator_t;
/************************************************************************
* Public Variables
************************************************************************/
/************************************************************************
* Public Function Prototypes
************************************************************************/
/************************************************************************
* Public Function Definitions
************************************************************************/
/**
* @fn evision_awb_estimator_t* evision_api_awb_new(void);
* @brief Create a new #evision_awb_estimator_t instance.
*
* @param[in] log_cb Callback to output logs.
* @return The address of the created instance. NULL if it failed.
*
* This function performs dynamic memory allocations for the AWB estimator.
* If the process fails, NULL is returned.
*
* @warning Allocates memory. Free memory with evision_api_awb_delete().
*/
evision_awb_estimator_t* evision_api_awb_new(evision_api_log_callback log_cb);
/**
* @fn evision_return_t evision_api_awb_delete(evision_awb_estimator_t* self);
* @brief Releases the memory allocated for the #evision_awb_estimator_t estimator instance.
*
* @param[in, out] self Concerned estimator instance address.
* @return
* - EVISION_RET_SUCCESS
* - EVISION_RET_PARAM_ERR
*
* This function releases the memory allocated for an AWB estimator.
* To be called when the estimator is no longer required.
*/
evision_return_t evision_api_awb_delete(evision_awb_estimator_t* self);
/**
* @brief Set the parameters of the input AWB profile structure.
*
* @param[in, out] awb_profile AWB profile structure.
* @param[in] color_temperature Color temperature of the illumination used to derive the profile parameters.
* @param[in] cfa_gains Array containing the sensor/ISP channel gains.
* @param[in] ccm_coefficients Matrix containing the color correction matrix coefficients.
* @param[in] ccm_offsets Array containing the color correction matrix offsets.
*
*/
void evision_api_awb_set_profile(evision_awb_profile_t* awb_profile,
float color_temperature, const float cfa_gains[EVISION_AWB_NB_DG_CFA_GAINS],
const float ccm_coefficients[EVISION_AWB_CCM_SIZE][EVISION_AWB_CCM_SIZE],
const float ccm_offsets[EVISION_AWB_CCM_SIZE]);
/**
* @brief Initialize the AWB profiles from user supplied data.
* The library supports a variable number of profiles from a minimum of 1 up to a max number of #EVISION_AWB_MAX_PROFILE_COUNT.
*
* @param[in, out] self AWB estimator to be initialized.
* @param[in] min_temp Minimum supported color temperature, positive value.
* @param[in] max_temp Maximum supported color temperature, positive value and greater than min_temp.
* @param[in] nb_profiles The number of defined profiles, between 1 and #EVISION_AWB_MAX_PROFILE_COUNT.
* @param[in] decision_thresholds The decision thresholds between profiles in degrees Kelvin. A total of nb_profiles - 1 decision thresholds must be provided.
* @param[in] awb_profiles Array of profile data, a total of nb_profiles must be provided.
* @return
* - EVISION_RET_SUCCESS
* - EVISION_RET_PARAM_ERR
* - EVISION_RET_FAILURE
*
* The min_temp parameter must be at most equal to the smallest color temperature of the defined profiles.
* The max_temp parameter must be at least equal to the highest color temperature of the defined profiles.
*
* The profiles must be unique with respect to the color temperature of the illumination and must be specified in ascending order.
* The choice of the actual number of profiles and the color temperature of the illumination for each profile is
* generally dependent on the intended application and/or the available hardware equipement for generating the calibration data.
* They must be complete in the sense that they must contain all the required fields (channel gains and color correction coefficients).
* It is the user's responsibility to ensure that this is indeed the case.
*
* The decision thresholds must be unique and specified in ascending order.
* Between each pair of adjacent profiles there must be exactly one decision threshold.
* The exact strategy for choosing the decision thresholds between adjacent thresholds (e.g. halfway, 1/3 - 2/3, etc.)
* is a tuning strategy which generally depends on the intended application and the choice of the profiles.
*
*/
evision_return_t evision_api_awb_init_profiles(evision_awb_estimator_t* const self,
double min_temp, double max_temp,
uint16_t nb_profiles, float decision_thresholds[EVISION_AWB_MAX_PROFILE_COUNT - 1],
evision_awb_profile_t awb_profiles[EVISION_AWB_MAX_PROFILE_COUNT]);
/**
* @brief Run the AWB estimator on the full frame data.
*
* @param[in] self Concerned estimator instance address.
* @param[in] image Current frame.
* @param[in] use_ext_meas Flag to indicate the use of external AWB measurement: 0 - use internal AWB measurement, > 0 - use external measurement.
* @param[in] ext_meas External measurement vector, contains average R, G, B values.
* @return
* - EVISION_RET_INVALID_VALUE
* - EVISION_RET_SUCCESS
* - EVISION_RET_PARAM_ERROR
* - EVISION_RET_FAILURE
*
* Run an execution of the control loop on the current camera setup and frame.
* The parameters #evision_awb_estimator_t.ccm and #evision_awb_estimator_t.dg_cf are updated to reflect the new CCMs and channel gains to apply.
*
* The software statistics extraction block, if used, will consider the entire data frame in the extraction of the AWB statistics.
* The parameter #evision_awb_hyper_param_t.awb_process_ratio defines a ratio of pixels to check PER row and PER column.
* It serves to reduce the computational requirements for AWB statistics extraction.
* For example: a process_ratio of 4 means that for every 4 pixels per row and per column, (block of 16 pixels) only 1 is considered.
* For small to moderate values, the loss in accuracy is mostly negligeable with non-negligeable improvements in computational time.
*
* The average R, G, and B values provided by the external \[hardware\] measurement block must be in the range \[0, 255\].
* If the data is in a different range, the average values must be converted to this range before being passed as parameters to the function.
*
* The switch at run-time between using the internal software measurements and the external \[hardware\] measurements is not supported.
*
* <b>Raises:</b>
* - EVISION_LOGSEV_INFO
* - EVISION_LOGSEV_WARNING
* - EVISION_LOGSEV_ERROR
*/
evision_return_t evision_api_awb_run_average(evision_awb_estimator_t* const self, const evision_image_t* const image,
uint8_t use_ext_meas, double ext_meas[EVISION_AWB_EXT_MEAS_SIZE]);
#ifdef ALGO_SW_STATISTICS
/**
* @brief Run the AWB estimator on the selected ROIs.
*
* @param[in] self Concerned estimator instance address.
* @param[in] image Current frame.
* @param[in] roi_array Set of ROIs where the process will be applied, other regions will not be considered.
* @param[in] use_ext_meas Flag to indicate the use of external AWB measurement: 0 - use internal AWB measurement, > 0 - use external measurement.
* @param[in] ext_meas External measurement vector, contains average R, G, B values.
* @return
* - EVISION_RET_INVALID_VALUE
* - EVISION_RET_SUCCESS
* - EVISION_RET_PARAM_ERROR
* - EVISION_RET_FAILURE
*
* Run an execution of the control loop on the current camera setup and frame.
* The parameters #evision_awb_estimator_t.ccm and #evision_awb_estimator_t.dg_cf are updated to reflect the new CCMs and channel gains to apply.
*
* The software statistics extraction block, if used, will only considered the pixels within the specified ROIs.
* The parameter #evision_awb_hyper_param_t.awb_process_ratio defines, within the ROI to check, a portion of pixels to check PER row and PER column.
* It serves to reduce the computational requirements for AWB statistics extraction.
* For example: a process_ratio of 4 means that for every 4 pixels per row and per column, (block of 16 pixels) only 1 is considered.
* For small to moderate values, the loss in accuracy is mostly negligeable with non-negligeable improvements in computational time.
*
* The average R, G, and B values provided by the external \[hardware\] measurement block must be in the range \[0, 255\].
* If the data is in a different range, the average values must be converted to this range before being passed as parameters to the function.
*
* The switch at run-time between using the internal software measurements and the external \[hardware\] measurements is not supported.
*
* <b>Raises:</b>
* - EVISION_LOGSEV_INFO
* - EVISION_LOGSEV_WARNING
* - EVISION_LOGSEV_ERROR
*/
evision_return_t evision_api_awb_run_roi(evision_awb_estimator_t* const self,
const evision_image_t* const image, const evision_roi_array_t* const roi_array,
uint8_t use_ext_meas, double ext_meas[EVISION_AWB_EXT_MEAS_SIZE]);
#endif
#endif /* EVISION_API_AWB_H_ */

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/**
******************************************************************************
* @file evision-api-st-ae.h
* @author STMicroelectronics / LACROIX - Impulse
* @brief ST eVision Auto Exposure algorithm public header.
******************************************************************************
* @attention
*
* Copyright (c) 2025 STMicroelectronics.
* Copyright (c) 2023 LACROIX - Impulse.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef EVISION_API_ST_AE_H_
#define EVISION_API_ST_AE_H_
/* Includes ------------------------------------------------------------------*/
#include <stdint.h>
#include <stdlib.h>
#include "evision-api-utils.h"
/* Exported types ------------------------------------------------------------*/
typedef struct evision_st_ae_hyper_param {
/*! @brief
* Target exposure to reach. <br/>
* <b>Restrictions:</b> >= 0 AND < 256. <br/>
* <b>Default value:</b> 56 */
uint32_t target;
/*! @brief
* Max delta between lum stat and target in convergence region <br/>
* <b>Restrictions:</b> >= 0 AND < 256. <br/>
* <b>Default value:</b> 10 */
uint32_t tolerance;
/*! @brief
* Factor applied to increment gain update <br/>
* <b>Restrictions:</b> >= 0 AND < 1000. <br/>
* <b>Default value:</b> 100 */
uint32_t gain_increment_coeff;
/*! @brief
* Max delta value between lum stat and target in low delta region <br/>
* <b>Restrictions:</b> >= 0 AND < 256. <br/>
* <b>Default value:</b> 45 */
uint32_t gain_low_delta;
/*! @brief
* Min delta value between lum stat and target in high delta region <br/>
* <b>Restrictions:</b> >= 0 AND < 256. <br/>
* <b>Default value:</b> 120 */
uint32_t gain_high_delta;
/*! @brief
* Maximum gain update value in luminance low delta region <br/>
* <b>Restrictions:</b> >= #gain_min AND < #gain_max. <br/>
* <b>Default value:</b> 1500 */
uint32_t gain_low_increment_max;
/*! @brief
* Maximum gain update value in luminance medium delta region <br/>
* <b>Restrictions:</b> >= #gain_min AND < #gain_max. <br/>
* <b>Default value:</b> 6000 */
uint32_t gain_medium_increment_max;
/*! @brief
* Maximum gain update value in luminance high delta region <br/>
* <b>Restrictions:</b> >= #gain_min AND < #gain_max. <br/>
* <b>Default value:</b> 12000 */
uint32_t gain_high_increment_max;
/*! @brief
* Factor applied to increment exposure <br/>
* <b>Restrictions:</b> >= 0.0 AND < 1. <br/>
* <b>Default value:</b> 0.020*/
double exposure_up_ratio;
/*! @brief
* Minimum value accepted for exposure time. <br/>
* <b>Restrictions:</b> >= 0.0 AND < 1. <br/>
* <b>Default value:</b> 0.004*/
double exposure_down_ratio;
/*! @brief
* Minimum value accepted for exposure time. <br/>
* <b>Restrictions:</b> >= 0.0 AND < #exposure_max. <br/>
* <b>Default value:</b> 0.0*/
uint32_t exposure_min;
/*! @brief
* Maximum value accepted for exposure time. <br/>
* <b>Restrictions:</b> > 0.0 AND >= #exposure_min. <br/>
* <b>Default value:</b> 1.0 */
uint32_t exposure_max;
/*! @brief
* Minimum possible gain value. <br/>
* <b>Restrictions:</b> > 1 AND < #gain_max. <br/>
* <b>Default value:</b> 1 */
uint32_t gain_min;
/*! @brief
* Maximum possible gain value. <br/>
* <b>Restrictions:</b> >= 1 AND > #gain_min. <br/>
* <b>Default value:</b> 1 */
uint32_t gain_max;
/*! @brief
* Luminance limit where we consider the frame as dark. <br/>
* <b>Restrictions:</b> >= 0 AND < 256. <br/>
* <b>Default value:</b> 5 */
uint32_t dark_zone_lum_limit;
/*! @brief
* Compatible light frequency in Hz to avoid flickering effect. <br/>
* <b>Restrictions:</b> >= 0 (None) AND < 256. <br/>
* <b>Default value:</b> 0 (None) */
uint32_t compat_freq;
} evision_st_ae_hyper_param_t;
/**
* @typedef evision_ae_estimator_t
* @brief AE estimator structure.
*
* @struct evision_ae_estimator
* @brief AE estimator structure.
*
* Set of all data structures required for the functioning of the AE algorithm.
*/
typedef struct evision_st_ae_process_t {
/*! @brief
* Indicates the state of the AE algorithm. <br/>
* <b>Restrictions:</b> Internal algorithm parameter. Must not be changed! <br/>
* Possible values: see #evision_state_t */
evision_state_t state;
/*! @brief
* Computed exposure time to apply to sensor. <br/>
* <b>Restrictions:</b> Internal algorithm parameter. Must not be changed! */
uint32_t new_exposure;
/*! @brief
* Computed gain value to apply to sensor. <br/>
* <b>Restrictions:</b> Internal algorithm parameter. Must not be changed! */
uint32_t new_gain;
/*! @brief
* The set of AE algorithm hyper-parameters. Set to default values at creation! <br/>
* #evision_ae_hyper_param_t.exposure_min, #evision_ae_hyper_param_t.exposure_max,
* #evision_ae_hyper_param_t.gain_min and #evision_ae_hyper_param_t.gain_max hyper-parameters
* <b> must be updated </b> before running the ae process with respect to the sensor in use. <br/>
* As a general note, the hyper-parameters can be updated from their default values.
* Care must be taken as in such a case there is no guarantee of proper functioning of the process! <br/>
* <b>Restrictions:</b> Must not be updated during runtime!
*/
evision_st_ae_hyper_param_t hyper_params;
/*! @brief
* Handler to output logs. <br/> */
evision_api_log_callback log_cb;
} evision_st_ae_process_t;
/* Exported constants --------------------------------------------------------*/
#define EVISION_ST_AEC_LUM_TARGET 56 /* Default luminance value targeted by the AE algorithm */
#define EVISION_ST_AEC_TOLERANCE 10 /* Max delta between lum stat and target in convergence region */
#define EVISION_ST_AEC_GAIN_INCREMENT_COEFF 100 /* Factor applied to increment gain update */
#define EVISION_ST_AEC_GAIN_LOW_DELTA 45 /* Max delta value between lum stat and target in low delta region */
#define EVISION_ST_AEC_GAIN_HIGH_DELTA 120 /* Min delta value between lum stat and target in high delta region */
#define EVISION_ST_AEC_GAIN_LOW_INC_MAX 1500 /* Maximum gain update value in luminance low delta region */
#define EVISION_ST_AEC_GAIN_MEDIUM_INC_MAX 6000 /* Maximum gain update value in luminance medium delta region */
#define EVISION_ST_AEC_GAIN_HIGH_INC_MAX 12000 /* Maximum gain update value in luminance high delta region */
#define EVISION_ST_AEC_EXPOSURE_UP_RATIO 0.020F /* Factor applied to increment exposure */
#define EVISION_ST_AEC_EXPOSURE_DOWN_RATIO 0.004F /* Factor applied to decrement exposure */
#define EVISION_ST_AEC_DARKZONE_LUM_LIMIT 5 /* Default value for dark zone luminance limit */
#define EVISION_ST_DEFAULT_EXPOSURE_MIN 0 /* Default value for exposure min */
#define EVISION_ST_DEFAULT_EXPOSURE_MAX 33000 /* Default value for expsoure max */
#define EVISION_ST_DEFAULT_GAIN_MIN 1 /* Default value for gain min */
#define EVISION_ST_DEFAULT_GAIN_MAX 100 /* Default value for gain max */
#define EVISION_ST_DEFAULT_COMPAT_FREQ 0 /* Default value for compatible frequency */
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
/**
* @fn evision_st_ae_process_t* evision_api_st_ae_new(void);
* @brief Create a new #evision_st_ae_process_t instance.
*
* @param[in] log_cb Callback to output logs.
* @return The address of the created instance. NULL if it failed.
*/
evision_st_ae_process_t* evision_api_st_ae_new(evision_api_log_callback log_cb);
/**
* @fn evision_return_t evision_api_st_ae_delete(evision_st_ae_process_t* self);
* @brief Releases the memory allocated for the #evision_st_ae_process_t ae process instance.
*
* @param[in, out] ae process instance address.
* @return
* - EVISION_RET_SUCCESS
* - EVISION_RET_PARAM_ERR
*/
evision_return_t evision_api_st_ae_delete(evision_st_ae_process_t* self);
/**
* @fn evision_return_t evision_api_st_ae_init(evision_st_ae_process_t* const self)
* @brief Initialize the AE process structure.
*
* @param[in, out] self AE process to be initialized.
* @return
* - EVISION_RET_SUCCESS
* - EVISION_RET_PARAM_ERROR
*
* Initializes the AE process structure. Hyper params can later be modified.
*/
evision_return_t evision_api_st_ae_init(evision_st_ae_process_t* const self);
/**
* @fn evision_return_t evision_api_st_ae_process(evision_st_ae_process_t* const self, uint32t_t current_gain, uint32_t current_exposure, uint8_t average_lum)
* @brief Run the ae process to calculate new gain and expsoure
*
* @param[in, out] self Concerned process instance address.
* @param[in] current_gain Current sensor gain in mdB.
* @param[in] current_exposure Current sensor exposure microsecond.
* @param[in] average_lum Average luminance measurement value. Range should normally be between 0 (completely dark image) and 255 (completely white image).
*
* @return
* - EVISION_RET_SUCCESS
* - EVISION_RET_FAILURE
*/
evision_return_t evision_api_st_ae_process(evision_st_ae_process_t* const self, uint32_t current_gain, uint32_t current_exposure, uint8_t average_lum);
/* Exported variables --------------------------------------------------------*/
#endif /* EVISION_API_ST_AE_H_ */

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/**
******************************************************************************
* @file evision-api-utils.h
* @author LACROIX - Impulse
* @brief eVision utilitary public header.
******************************************************************************
* @attention
*
* Copyright (c) 2023 LACROIX - Impulse.
* Copyright (c) 2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
#ifndef EVISION_API_UTILS_H_
#define EVISION_API_UTILS_H_
#ifdef __cplusplus
extern "C" {
#endif
/************************************************************************
* Includes
************************************************************************/
#include <stdint.h>
/************************************************************************
* Public Defines
************************************************************************/
/**
* @def EVISION_MIN
* @brief Determine the lowest value between a and b
*/
#define EVISION_MIN(a, b) ((a) < (b) ? (a) : (b))
/**
* @def EVISION_MAX
* @brief Determine the greatest value between a and b
*/
#define EVISION_MAX(a, b) ((a) > (b) ? (a) : (b))
/**
* @def EVISION_SIGN
* @brief Determine the sign of a number.
*/
#define EVISION_SIGN(x) ((x) > 0.0f ? 1.0f : -1.0f)
#ifdef ALGO_SW_STATISTICS
/* YUV parameters */
/*! @brief Minimum of Y value due to ISP RGB 2 YUV conversion formula */
#define EVISION_YUV_MIN_Y_VAL (16.0)
/*! @brief Maximum of Y value due to ISP RGB 2 YUV conversion formula */
#define EVISION_YUV_MAX_Y_VAL (235.140625)
/*! @brief YUV factor value due to ISP RGB 2 YUV conversion formula */
#define EVISION_YUV_FACTOR (256)
/*! @brief YUV maximum value due to ISP RGB 2 YUV conversion formula */
#define EVISION_YUV_MAX_VAL (255)
/*! @brief range of Y value due to ISP RGB 2 YUV conversion formula */
#define EVISION_YUV_RANGE_Y_VAL (EVISION_YUV_MAX_Y_VAL - EVISION_YUV_MIN_Y_VAL)
#endif
/**
* @typedef evision_return_t
* @brief Return type for functions.
*
* @enum evision_return
* @brief Return type for functions.
*
* Return code that must be checked to be sure the output of the function is valid.
*/
typedef enum evision_return {
EVISION_RET_INVALID_VALUE = 2, /*!< The process succeeded but the output value is invalid and should not be used.*/
EVISION_RET_SUCCESS = 1, /*!< the process succeeded. */
EVISION_RET_FAILURE = 0, /*!< Error: There was a failure. */
EVISION_RET_PARAM_ERR = -1, /*!< Error: A parameter is invalid. */
EVISION_RET_DIMENSION_ERR = -2, /*!< Error: A dimension is incompatible with the process. */
EVISION_RET_MEMORY_ERR = -3, /*!< Error: Could not allocate memory. */
EVISION_RET_FILE_ERR = -4, /*!< Error: A file could not be opened */
EVISION_RET_FORMAT_ERR = -5, /*!< Error: the specified format is invalid. */
} evision_return_t;
/**
* @typedef evision_state_t
* @brief Describes the state of the estimator.
*
* @enum evision_state
* @brief Describes the state of the estimator.
*/
typedef enum evision_state {
/*! @brief
* The estimator exists.
*/
EVISION_STATE_NONE = 0u,
/*! @brief
* The estimator was initialized and is ready to run.
*/
EVISION_STATE_INIT = 1u,
/*! @brief
* The estimator is running.
*/
EVISION_STATE_RUN = 2u,
} evision_state_t;
/**
* @typedef evision_image_format_t
* @brief Specify the format under which the image is stored.
*
* @enum evision_image_format
* @brief Specify the format under which the image is stored.
*
* Those formats are as the ones defined by V4L2.
*/
typedef enum evision_image_format {
/*! @brief
* 8 bit gray-level.
*/
EVISION_IMAGE_FORMAT_GRAY8 = 0u,
/*! @brief
* 8 bit gray-level.
*/
EVISION_IMAGE_FORMAT_GREY8 = 1u,
/*! @brief
* RGB interleaved, 8 bit per channel, 24 bit per pixel..
*/
EVISION_IMAGE_FORMAT_RGB8 = 2u,
/*! @brief
* BGR interleaved, 8 bit per channel, 24 bit per pixel..
*/
EVISION_IMAGE_FORMAT_BGR8 = 3u,
/*! @brief
* 8 bit YUV 422 SP format.
*/
EVISION_IMAGE_FORMAT_YUV422SP = 4u,
/*! @brief
* RGGB Bayer format, 8 bit per channel, Red compound first.
*/
EVISION_IMAGE_FORMAT_RGGB8 = 5u,
/*! @brief
* BGGR Bayer format, 8 bit per channel, Blue compound first.
*/
EVISION_IMAGE_FORMAT_BGGR8 = 6u,
/*! @brief
* GRBG Bayer format, 16 bit per channel, each coded on 16 bits inverted (0xFF, 0x0F).
*/
EVISION_IMAGE_FORMAT_GRBG12 = 7u,
/*! @brief
* RGGB Bayer format, 16 bit per channel, each coded on 16 bits inverted (0xFF, 0x0F).
*/
EVISION_IMAGE_FORMAT_RGGB12 = 8u
} evision_image_format_t;
/************************************************************************
* Public Functions Signatures
************************************************************************/
/**
* @brief Callback function to output logs.
*
* @param[in] msg Received message.
*
* If the user wants to handle the log and messages yielded by the estimator,
* a function with this signature must be specified.
*
*/
typedef void (*evision_api_log_callback)(const char* const msg);
/************************************************************************
* Public Structures
************************************************************************/
/**
* @typedef evision_image_t
* @brief Structure to hold frame data and metadata for eVision AE and AWB algorithms.
*
* @struct evision_image
* @brief Structure to hold frame data and metadata for eVision AE and AWB algorithms.
*
*/
typedef struct evision_image {
/*! @brief
* Frame data.
*/
uint8_t* pdata;
/*! @brief
* Number of pixels columns in the image.
*/
uint16_t width;
/*! @brief
* Number of pixels rows in the image.
*/
uint16_t height;
/*! @brief
* The format of the image.
*/
evision_image_format_t format;
} evision_image_t;
#ifdef ALGO_SW_STATISTICS
/**
* @typedef evision_roi_t
* @brief Represents a Region Of Interest (aka a rectangle of pixels in an image).
*
* @struct evision_roi
* @brief Represents a Region Of Interest (aka a rectangle of pixels in an image).
*
* A ROI serves to limit the statistics extraction to a specific zone inside the frame.
* Several ROIs can be defined and for each ROI a weight must be defined.
* The aggregated statistic is the weighted average of individual ROI statistics.
* Setting all weights equal results in the aggregated statistic to be the arithmetic average of the individual statistics.
*
*/
typedef struct evision_roi {
/*! @brief
* Horizontal pixel coordinate of the Top-Left corner of the ROI.
*/
uint16_t x0;
/*! @brief
* Vertical pixel coordinate of the Top-Left corner of the ROI.
*/
uint16_t y0;
/*! @brief
* Horizontal pixel coordinate of the Bottom-Right corner of the ROI.
*/
uint16_t x1;
/*! @brief
* Vertical pixel coordinate of the Bottom-Right corner of the ROI.
*/
uint16_t y1;
/*! @brief
* Weight associated to the ROI.
*/
double weight;
} evision_roi_t;
/**
* @typedef evision_roi_array_t
* @brief Represents an array of evision_roi.
*
* @struct evision_roi_array
* @brief Represents an array of evision_roi.
*
* Represents the collection of all the defined ROIs for the estimator. Must contain at least one ROI.
*
*/
typedef struct evision_roi_array {
/*! @brief
* Pointer to the beginning of the array.
*/
evision_roi_t* parray;
/*! @brief
* Number of elements in the array.
*/
uint16_t len;
} evision_roi_array_t;
#endif
/************************************************************************
* Private Structure Declaration
************************************************************************/
/************************************************************************
* Public Variables
************************************************************************/
/************************************************************************
* Public Function Prototypes
************************************************************************/
/* Library management functions */
#ifdef ALGO_SW_STATISTICS
/* ROI array management */
/**
* @fn evision_roi_array_t* evision_api_roi_array_new(const uint16_t length)
* @brief Create and allocate the memory for a new array of #evision_roi_array_t elements.
*
* @param[in] length Size of the array to create
* @return Address of the created #evision_roi_array_t. NULL if something went wrong.
*/
evision_roi_array_t* evision_api_roi_array_new(const uint16_t length);
/**
* @fn evision_roi_array_t* evision_api_roi_array_new_grid(const uint16_t frame_width, const uint16_t frame_height, const uint16_t roi_width, const uint16_t roi_height, const uint16_t nb_roi_col, const uint16_t nb_roi_row)
* @brief Create and allocate the memory for a new array of #evision_roi_array_t with pre filled ROIs positioned as a grid.
*
* In the end, the number of ROIs will be nb_roi_col * nb_roi_row
*
* @param[in] frame_width Number of pixels column in the frame where the ROIs will be placed.
* @param[in] frame_height Number of pixels rows in the frame where the ROIs will be placed.
* @param[in] roi_width Size (columns) of each ROI.
* @param[in] roi_height Size (rows) of each ROI.
* @param[in] nb_roi_col Number of ROIs to be placed in the horizontal dimension.
* @param[in] nb_roi_row Number of ROIs to be placed in the vertical dimension.
* @return Address of the created #evision_roi_array_t. NULL if something went wrong.
*/
evision_roi_array_t* evision_api_roi_array_new_grid(const uint16_t frame_width, const uint16_t frame_height, const uint16_t roi_width, const uint16_t roi_height, const uint16_t nb_roi_col, const uint16_t nb_roi_row);
/**
* @fn evision_return_t evision_api_roi_array_delete(evision_roi_array_t* self)
* @brief Free the memory allocated to an #evision_roi_array_t.
*
* @param[in, out] self Address of the concerned ROI array instance to be deleted, cannot be used after.
* @return
* - EVISION_RET_SUCCESS
* - EVISION_RET_PARAM_ERR
*/
evision_return_t evision_api_roi_array_delete(evision_roi_array_t* self);
#endif
/************************************************************************
* Public Function Definitions
************************************************************************/
#ifdef __cplusplus
}
#endif
#endif /* EVISION_API_UTILS_H_ */

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meta-digi-arm/dynamic-layers/stm-st-stm32mp/recipes-multimedia/libcamera/files/0001-0.3.0-stm32mp-add-dcmipp-ipa.patch → meta-digi-arm/dynamic-layers/stm-st-stm32mp/recipes-multimedia/libcamera/files/0001-v0.3.0-stm32mp.patch
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From: Arturo Buzarra <arturo.buzarra@digi.com>
Date: Wed, 19 Nov 2025 11:58:43 +0100
Subject: [PATCH] dcmipp: Fix configureAwbAlgo() encapsulation under
EVISION_ALGO_ENABLED
Awb::queueRequest() unconditionally calls configureAwbAlgo(), but it is
compiled only when EVISION_ALGO_ENABLED is defined. With EVISION_ALGO_ENABLED
disabled, this leads to an undefined symbol at runtime when loading the DCMIPP
IPA. This commit guards the call under EVISION_ALGO_ENABLED so that non-EVISION
builds no longer reference the helper.
Signed-off-by: Arturo Buzarra <arturo.buzarra@digi.com>
---
src/ipa/dcmipp/algorithms/awb.cpp | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/ipa/dcmipp/algorithms/awb.cpp b/src/ipa/dcmipp/algorithms/awb.cpp
index 006ad4b8..4444ac98 100644
--- a/src/ipa/dcmipp/algorithms/awb.cpp
+++ b/src/ipa/dcmipp/algorithms/awb.cpp
@@ -652,10 +652,12 @@ void Awb::queueRequest([[maybe_unused]] IPAContext &context,
LOG(DcmippAwb, Debug) << "Updating AwbColourConv to " << (*cconv)[0] << "...";
}
+#ifdef EVISION_ALGO_ENABLED
if (internal_.profileDirty && !configureAwbAlgo()) {
LOG(DcmippAwb, Error) << "Cannot reconfigure awb algorithm";
return;
}
+#endif /* EVISION_ALGO_ENABLED */
/* Static config: update params_ and if applicable force config_ update now */
const auto &customColorTemp = controls.get(controls::draft::AwbCustomColorTemperature);

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FILESEXTRAPATHS:prepend := "${THISDIR}/libcamera-stm32mp:"
PROVIDES += "libcamera"
PE = "1"
S = "${WORKDIR}/git"
DEPENDS = "python3-pyyaml-native python3-jinja2-native python3-ply-native python3-jinja2-native udev gnutls chrpath-native libevent libyaml"
DEPENDS += "${@bb.utils.contains('DISTRO_FEATURES', 'qt', 'qtbase qtbase-native', '', d)}"
DEPENDS:append:aarch64 = " evision-libs "
PACKAGES =+ "${PN}-gst"
PACKAGECONFIG ??= "gst python"
PACKAGECONFIG[gst] = "-Dgstreamer=enabled,-Dgstreamer=disabled,gstreamer1.0 gstreamer1.0-plugins-base"
PACKAGECONFIG[python] = "-Dpycamera=enabled,-Dpycamera=disabled,python3-pybind11"
LIBCAMERA_PIPELINES ??= "dcmipp"
LIBCAMERA_IPAS = "dcmipp"
EXTRA_OEMESON = " \
-Dpipelines=${LIBCAMERA_PIPELINES} \
-Dv4l2=true \
-Dcam=enabled \
-Dlc-compliance=disabled \
-Dtest=false \
-Ddocumentation=disabled \
"
EXTRA_OEMESON += " \
-Dipas=${LIBCAMERA_IPAS} \
"
EXTRA_OEMESON:append:aarch64 = " \
-Devision_algo=true \
-Devision_algo_inc_dir=${RECIPE_SYSROOT}/usr/include/evision \
"
RDEPENDS:${PN} = "${@bb.utils.contains('DISTRO_FEATURES', 'wayland qt', 'qtwayland', '', d)}"
RDEPENDS:${PN}:append:aarch64 = " evision-libs "
inherit meson pkgconfig python3native python3-dir
do_configure:prepend() {
sed -i -e 's|py_compile=True,||' ${S}/utils/ipc/mojo/public/tools/mojom/mojom/generate/template_expander.py
}
do_install:append() {
chrpath -d ${D}${libdir}/libcamera.so
chrpath -d ${D}${libexecdir}/libcamera/v4l2-compat.so
}
do_package:append() {
bb.build.exec_func("do_package_recalculate_ipa_signatures", d)
}
do_package_recalculate_ipa_signatures() {
local modules
for module in $(find ${PKGD}/usr/lib/libcamera -name "*.so.sign"); do
module="${module%.sign}"
if [ -f "${module}" ] ; then
modules="${modules} ${module}"
fi
done
${S}/src/ipa/ipa-sign-install.sh ${B}/src/ipa-priv-key.pem "${modules}"
}
FILES:${PN} += " ${libexecdir}/libcamera/v4l2-compat.so"
FILES:${PN} += "${datadir} ${libdir} ${PYTHON_SITEPACKAGES_DIR}"
FILES:${PN}-gst = "${libdir}/gstreamer-1.0"
# libcamera-v4l2 explicitly sets _FILE_OFFSET_BITS=32 to get access to
# both 32 and 64 bit file APIs.
GLIBC_64BIT_TIME_FLAGS = ""

87
meta-digi-arm/dynamic-layers/stm-st-stm32mp/recipes-multimedia/libcamera/libcamera-stm32mp_0.3.0.bb
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@ -8,85 +8,18 @@ LIC_FILES_CHKSUM = "\
file://LICENSES/LGPL-2.1-or-later.txt;md5=2a4f4fd2128ea2f65047ee63fbca9f68 \
"
include libcamera-stm32mp.inc
# 0.3.0
SRC_URI = " \
git://git.libcamera.org/libcamera/libcamera.git;protocol=https;branch=master \
file://0001-media_device-Add-bool-return-type-to-unlock.patch \
file://0002-options-Replace-use-of-VLAs-in-C.patch \
file://0001-rpi-Use-alloca-instead-of-variable-length-arrays.patch \
"
SRC_URI = "git://git.libcamera.org/libcamera/libcamera.git;protocol=https;branch=master"
SRCREV = "aee16c06913422a0ac84ee3217f87a9795e3c2d9"
SRC_URI += " \
file://0001-0.3.0-stm32mp-add-dcmipp-ipa.patch \
file://0002-dcmipp-Fix-configureAwbAlgo-encapsulation-under-EVIS.patch \
"
PV = "v0.3.0-stm32mp"
file://0001-media_device-Add-bool-return-type-to-unlock.patch \
file://0002-options-Replace-use-of-VLAs-in-C.patch \
file://0001-rpi-Use-alloca-instead-of-variable-length-arrays.patch \
\
file://0001-v0.3.0-stm32mp.patch \
"
PROVIDES += "libcamera"
PE = "1"
S = "${WORKDIR}/git"
DEPENDS = "python3-pyyaml-native python3-jinja2-native python3-ply-native python3-jinja2-native udev gnutls chrpath-native libevent libyaml"
DEPENDS += "${@bb.utils.contains('DISTRO_FEATURES', 'qt', 'qtbase qtbase-native', '', d)}"
PACKAGES =+ "${PN}-gst"
PACKAGECONFIG ??= "gst python"
PACKAGECONFIG[gst] = "-Dgstreamer=enabled,-Dgstreamer=disabled,gstreamer1.0 gstreamer1.0-plugins-base"
PACKAGECONFIG[python] = "-Dpycamera=enabled,-Dpycamera=disabled,python3-pybind11"
LIBCAMERA_PIPELINES ??= "dcmipp"
LIBCAMERA_IPAS = "dcmipp"
EXTRA_OEMESON = " \
-Dpipelines=${LIBCAMERA_PIPELINES} \
-Dv4l2=true \
-Dcam=enabled \
-Dlc-compliance=disabled \
-Dtest=false \
-Ddocumentation=disabled \
"
EXTRA_OEMESON += " \
-Dipas=${LIBCAMERA_IPAS} \
"
RDEPENDS:${PN} = "${@bb.utils.contains('DISTRO_FEATURES', 'wayland qt', 'qtwayland', '', d)}"
inherit meson pkgconfig python3native python3-dir
do_configure:prepend() {
sed -i -e 's|py_compile=True,||' ${S}/utils/ipc/mojo/public/tools/mojom/mojom/generate/template_expander.py
}
do_install:append() {
chrpath -d ${D}${libdir}/libcamera.so
chrpath -d ${D}${libexecdir}/libcamera/v4l2-compat.so
}
do_package:append() {
bb.build.exec_func("do_package_recalculate_ipa_signatures", d)
}
do_package_recalculate_ipa_signatures() {
local modules
for module in $(find ${PKGD}/usr/lib/libcamera -name "*.so.sign"); do
module="${module%.sign}"
if [ -f "${module}" ] ; then
modules="${modules} ${module}"
fi
done
${S}/src/ipa/ipa-sign-install.sh ${B}/src/ipa-priv-key.pem "${modules}"
}
FILES:${PN} += " ${libexecdir}/libcamera/v4l2-compat.so"
FILES:${PN} += "${datadir} ${libdir} ${PYTHON_SITEPACKAGES_DIR}"
FILES:${PN}-gst = "${libdir}/gstreamer-1.0"
# libcamera-v4l2 explicitly sets _FILE_OFFSET_BITS=32 to get access to
# both 32 and 64 bit file APIs.
GLIBC_64BIT_TIME_FLAGS = ""
PV = "0.3.0"

1
meta-digi-arm/dynamic-layers/stm-st-stm32mp/recipes-security/optee/optee-client/tee-supplicant Normal file
View File

@ -0,0 +1 @@
OPTARGS="--fs-parent-path=/mnt/data/tee"

5
meta-digi-arm/dynamic-layers/stm-st-stm32mp/recipes-security/optee/optee-client_4.0.bb
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@ -10,6 +10,7 @@ SRC_URI = "git://github.com/OP-TEE/optee_client.git;protocol=https;branch=master
file://tee-supplicant.service \
file://create-tee-supplicant-env \
file://optee-udev.rules \
${@oe.utils.vartrue('TRUSTFENCE_FILE_BASED_ENCRYPT', 'file://tee-supplicant', '', d)} \
"
SRCREV = "acb0885c117e73cb6c5c9b1dd9054cb3f93507ee"
@ -43,6 +44,10 @@ do_install:append() {
install -D -p -m0644 ${WORKDIR}/tee-supplicant.service ${D}${systemd_system_unitdir}/tee-supplicant.service
install -D -p -m0755 ${WORKDIR}/create-tee-supplicant-env ${D}${sbindir}/
if ${@oe.utils.vartrue('TRUSTFENCE_FILE_BASED_ENCRYPT', 'true', 'false',d)}; then
install -d ${D}${sysconfdir}/default/
install -m 0644 ${WORKDIR}/tee-supplicant ${D}${sysconfdir}/default/tee-supplicant
fi
fi
install -d ${D}${sysconfdir}/udev/rules.d
install -m 0644 ${WORKDIR}/optee-udev.rules ${D}${sysconfdir}/udev/rules.d/optee.rules

27
meta-digi-arm/dynamic-layers/stm-st-stm32mp/recipes-security/optee/optee-os-stm32mp/0001-ARM-dts-ccmp15-add-signed-firmware-support-for-RPROC.patch Normal file
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@ -0,0 +1,27 @@
From: Arturo Buzarra <arturo.buzarra@digi.com>
Date: Wed, 18 Mar 2026 22:07:56 +0100
Subject: [PATCH] ARM: dts: ccmp15: add signed firmware support for RPROC
Enable the Cortex-M4 inter-processor communication node so remoteproc can
load and authenticate signed firmware binaries.
https://onedigi.atlassian.net/browse/DEL-9920
Signed-off-by: Arturo Buzarra <arturo.buzarra@digi.com>
---
core/arch/arm/dts/ccmp15-dvk.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/core/arch/arm/dts/ccmp15-dvk.dtsi b/core/arch/arm/dts/ccmp15-dvk.dtsi
index ff7ee6504..ea88e3e1e 100644
--- a/core/arch/arm/dts/ccmp15-dvk.dtsi
+++ b/core/arch/arm/dts/ccmp15-dvk.dtsi
@@ -259,7 +259,7 @@
&m4_rproc {
memory-region = <&retram>, <&mcusram1>, <&mcusram2>, <&mcusram3>;
- status = "disabled";
+ status = "okay";
};
&mcusram1 {

7
meta-digi-arm/dynamic-layers/stm-st-stm32mp/recipes-security/optee/optee-os-stm32mp_4.0.0.bbappend
View File

@ -20,9 +20,16 @@ SRC_URI = " \
file://fonts.tar.gz;subdir=git;name=fonts \
"
SRC_URI:append:ccmp15 = " \
${@oe.utils.conditional('TRUSTFENCE_COPRO_ENABLED', '1' , 'file://0001-ARM-dts-ccmp15-add-signed-firmware-support-for-RPROC.patch', '', d)} \
"
SRC_URI:append:ccmp25 = " \
${@oe.utils.conditional('TRUSTFENCE_COPRO_ENABLED', '1' , 'file://0001-ARM-dts-ccmp25-add-signed-firmware-support-for-RPROC.patch', '', d)} \
"
# Enable remoteproc OTP public key verification for signed firmware support
EXTRA_OEMAKE:append:ccmp25 = " ${@oe.utils.conditional('TRUSTFENCE_COPRO_ENABLED', '1', 'CFG_REMOTEPROC_PUB_KEY_VERIFY=y', '', d)}"
# Enable remoteproc custom public key verification for signed firmware support
EXTRA_OEMAKE:append:ccmp15 = " ${@oe.utils.conditional('TRUSTFENCE_COPRO_ENABLED', '1' , 'CFG_STM32MP_REMOTEPROC=y RPROC_SIGN_KEY=%s' % (d.getVar('TRUSTFENCE_COPRO_SIGN_KEY') or ''), '', d)}"
EXTRA_OEMAKE:remove:ccmp15 = " ${@oe.utils.conditional('TRUSTFENCE_COPRO_ENABLED', '1' , 'CFG_REMOTEPROC_PUB_KEY_VERIFY=y', '', d)}"

70
meta-digi-arm/recipes-bsp/firmware-murata-infineon/firmware-murata-infineon.bb
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@ -1,4 +1,4 @@
# Copyright (C) 2022-2025, Digi International Inc.
# Copyright (C) 2022-2026, Digi International Inc.
SUMMARY = "Murata Infineon firmware binaries"
SECTION = "base"
@ -6,9 +6,9 @@ LICENSE = "CYPRESS-EULA"
LIC_FILES_CHKSUM = "file://${S}/cyw-bt-patch/LICENCE.cypress;md5=cbc5f665d04f741f1e006d2096236ba7"
SRC_URI = " \
https://github.com/Infineon/ifx-linux-firmware/archive/refs/tags/release-v6.1.97-2025_0219.tar.gz;destsuffix=cyw-fmac-fw-ifx;name=cyw-fmac-fw-ifx \
git://github.com/murata-wireless/cyw-fmac-fw;protocol=http;branch=jaculus;destsuffix=cyw-fmac-fw;name=cyw-fmac-fw \
git://github.com/murata-wireless/cyw-fmac-nvram;protocol=http;branch=jaculus;destsuffix=cyw-fmac-nvram;name=cyw-fmac-nvram \
git://github.com/Infineon/ifx-linux-firmware;protocol=http;branch=master;destsuffix=ifx-linux-firmware-longma;name=ifx-linux-firmware-longma \
git://github.com/murata-wireless/cyw-fmac-fw;protocol=http;branch=longma;destsuffix=cyw-fmac-fw;name=cyw-fmac-fw \
git://github.com/murata-wireless/cyw-fmac-nvram;protocol=http;branch=longma;destsuffix=cyw-fmac-nvram;name=cyw-fmac-nvram \
git://github.com/murata-wireless/cyw-bt-patch;protocol=http;branch=master;destsuffix=cyw-bt-patch;name=cyw-bt-patch \
git://github.com/murata-wireless/cyw-fmac-utils-imx32;protocol=http;branch=master;destsuffix=cyw-fmac-utils-imx32;name=cyw-fmac-utils-imx32 \
git://github.com/murata-wireless/cyw-fmac-utils-imx64;protocol=http;branch=master;destsuffix=cyw-fmac-utils-imx64;name=cyw-fmac-utils-imx64 \
@ -22,14 +22,13 @@ SRC_URI:append:ccmp1 = " \
"
SRC_URI:append:ccmp2 = " \
file://cyfmac55500-sdio.txt \
file://mbt \
"
SRC_URI[cyw-fmac-fw-ifx.sha256sum]="1ff021a1b3ef1608f5c0ad4b39fec8e0f5cb8c204d178f1de0f8215d06abc8d9"
SRCREV_cyw-fmac-fw="a5cb86a5d11192ba6e7738f82b4d2dc9eeeca679"
SRCREV_cyw-fmac-nvram="146d1438372b6c4857f92b8769b91c1801d3ede2"
SRCREV_cyw-bt-patch="23de75a4e5384d16e8478f668b769b0d24ede0de"
SRCREV_ifx-linux-firmware-longma="f24790e6fa2f05a0f974236bed7da7fa493b9ad2"
SRCREV_cyw-fmac-fw="8cdb1886852e0b5f9876654619a8371b952bf248"
SRCREV_cyw-fmac-nvram="411c87d4cf924a1a5415273265fd54d7d7d4044f"
SRCREV_cyw-bt-patch="64ac86708253e12d7089cf75ef8dcc9b30594958"
SRCREV_cyw-fmac-utils-imx32="dad9ed86bf6691910197bc91d42a45ea8175180c"
SRCREV_cyw-fmac-utils-imx64="368bd9a4163e115468d79c238192b41f6266c523"
@ -73,12 +72,15 @@ do_install:append:ccmp1 () {
# Install Bluetooth patch *.HCD file
# For Murata 2AE (LBEE5PK2AE-564)
install -m 444 ${S}/cyw-bt-patch/BCM4373A0_001.001.025.0103.0155.FCC.CE.2AE.hcd ${D}${base_libdir}/firmware/brcm/BCM4373A0_FCC.CE.hcd
install -m 444 ${S}/cyw-bt-patch/BCM4373A0_001.001.025.0103.0156.JRL.2AE.hcd ${D}${base_libdir}/firmware/brcm/BCM4373A0_JRL.hcd
install -m 444 ${S}/cyw-bt-patch/BCM4373A0_001.001.025.0103.0155.FCC.CE.2AE.hcd ${D}${base_libdir}/firmware/brcm/
install -m 444 ${S}/cyw-bt-patch/BCM4373A0_001.001.025.0103.0156.JRL.2AE.hcd ${D}${base_libdir}/firmware/brcm/
ln -sf BCM4373A0_001.001.025.0103.0155.FCC.CE.2AE.hcd ${D}${base_libdir}/firmware/brcm/BCM4373A0_FCC.hcd
ln -sf BCM4373A0_001.001.025.0103.0155.FCC.CE.2AE.hcd ${D}${base_libdir}/firmware/brcm/BCM4373A0_CE.hcd
ln -sf BCM4373A0_001.001.025.0103.0156.JRL.2AE.hcd ${D}${base_libdir}/firmware/brcm/BCM4373A0_JRL.hcd
# Install WLAN firmware file (*.bin) and Regulatory binary file (*.clm_blob)
# For Murata 2AE (LBEE5PK2AE-564)
install -m 444 ${S}/ifx-linux-firmware-release-v6.1.97-2025_0219/firmware/cyfmac4373-sdio.industrial.bin ${D}${base_libdir}/firmware/cypress/cyfmac4373-sdio.bin
install -m 444 ${S}/ifx-linux-firmware-longma/firmware/cyfmac4373-sdio.industrial.bin ${D}${base_libdir}/firmware/cypress/cyfmac4373-sdio.bin
install -m 444 cyfmac4373-sdio_US.clm_blob ${D}${base_libdir}/firmware/cypress/cyfmac4373-sdio_US.clm_blob
install -m 444 cyfmac4373-sdio_World.clm_blob ${D}${base_libdir}/firmware/cypress/cyfmac4373-sdio_World.clm_blob
@ -92,22 +94,50 @@ do_install:append:ccmp2 () {
install -d ${D}${base_libdir}/firmware/brcm
# Install Bluetooth patch *.HCD file
# For Murata 2GY (LBEE5HY2GY) and Murata 2FY (LBEE5HY2FY)
install -m 444 ${S}/cyw-bt-patch/CYW55500A1_001.002.032.0040.0033.2FY.hcd ${D}${base_libdir}/firmware/brcm/CYW55500A1.hcd
# For Murata 2FY (LBEE5HY2FY)
install -m 444 ${S}/cyw-bt-patch/CYW55500A1_001.002.032.0040.0033.FCC.2FY.2GY.hcd ${D}${base_libdir}/firmware/brcm/
install -m 444 ${S}/cyw-bt-patch/CYW55500A1_001.002.032.0040.0032.CE.JP.2FY.2GY.hcd ${D}${base_libdir}/firmware/brcm/
ln -sf CYW55500A1_001.002.032.0040.0033.FCC.2FY.2GY.hcd ${D}${base_libdir}/firmware/brcm/CYW55500A1_FCC.hcd
ln -sf CYW55500A1_001.002.032.0040.0032.CE.JP.2FY.2GY.hcd ${D}${base_libdir}/firmware/brcm/CYW55500A1_CE.hcd
ln -sf CYW55500A1_001.002.032.0040.0032.CE.JP.2FY.2GY.hcd ${D}${base_libdir}/firmware/brcm/CYW55500A1_JP.hcd
# Install WLAN firmware file (*.bin) and Regulatory binary file (*.clm_blob)
# For Murata 2GY (LBEE5HY2GY) and Murata 2FY (LBEE5HY2FY)
install -m 444 ${S}/ifx-linux-firmware-release-v6.1.97-2025_0219/firmware/cyfmac55500-sdio.trxse ${D}${base_libdir}/firmware/cypress/cyfmac55500-sdio.trxse
install -m 444 ${S}/cyw-fmac-fw/cyfmac55500-sdio.2FY.clm_blob ${D}${base_libdir}/firmware/cypress/cyfmac55500-sdio_US.clm_blob
# For Murata 2FY (LBEE5HY2FY)
install -m 444 ${S}/ifx-linux-firmware-longma/firmware/cyfmac55500-sdio.trxse ${D}${base_libdir}/firmware/cypress/cyfmac55500-sdio.trxse
install -m 444 ${S}/cyw-fmac-fw/cyfmac55500-sdio.2FY.STAIndoor.clm_blob ${D}/${base_libdir}/firmware/cypress/
ln -sf cyfmac55500-sdio.2FY.STAIndoor.clm_blob ${D}/${base_libdir}/firmware/cypress/cyfmac55500-sdio_US.clm_blob
# Install NVRAM files (*.txt)
# For Murata 2GY (LBEE5HY2GY) and Murata 2FY (LBEE5HY2FY)
install -m 444 ${S}/cyfmac55500-sdio.txt ${D}${base_libdir}/firmware/cypress/cyfmac55500-sdio.txt
# For Murata 2FY (LBEE5HY2FY)
install -m 444 ${S}/cyw-fmac-nvram/cyfmac55500-sdio.2FY.txt ${D}${base_libdir}/firmware/cypress/cyfmac55500-sdio.txt
# Install Manufacturing Bluetooth Test tool (MBT)
install -m 755 mbt ${D}${sbindir}
}
do_install:append:ccimx95 () {
install -d ${D}${base_libdir}/firmware/cypress
install -d ${D}${base_libdir}/firmware/brcm
# Install Bluetooth patch *.HCD file
# For Murata 2EC (LBEE5XV2EC)
install -m 444 ${S}/cyw-bt-patch/CYW55560A1_001.002.087.0269.0100.FCC.2EA.sAnt.hcd ${D}${base_libdir}/firmware/brcm/
install -m 444 ${S}/cyw-bt-patch/CYW55560A1_001.002.087.0269.0106.EU.JP.2EA.sAnt.hcd ${D}${base_libdir}/firmware/brcm/
ln -sf CYW55560A1_001.002.087.0269.0100.FCC.2EA.sAnt.hcd ${D}${base_libdir}/firmware/brcm/CYW55560A1_FCC.hcd
ln -sf CYW55560A1_001.002.087.0269.0106.EU.JP.2EA.sAnt.hcd ${D}${base_libdir}/firmware/brcm/CYW55560A1_CE.hcd
ln -sf CYW55560A1_001.002.087.0269.0106.EU.JP.2EA.sAnt.hcd ${D}${base_libdir}/firmware/brcm/CYW55560A1_JP.hcd
# Install WLAN firmware file (*.bin) and Regulatory binary file (*.clm_blob)
# For Murata 2EC (LBEE5XV2EC)
install -m 444 ${S}/ifx-linux-firmware-longma/firmware/cyfmac55572-sdio.trxse ${D}${base_libdir}/firmware/cypress/cyfmac55572-sdio.trxse
install -m 444 ${S}/cyw-fmac-fw/cyfmac55572-sdio.2EA.clm_blob_STAIndoor ${D}/${base_libdir}/firmware/cypress/
ln -sf cyfmac55572-sdio.2EA.clm_blob_STAIndoor ${D}/${base_libdir}/firmware/cypress/cyfmac55572-sdio_US.clm_blob
# Install NVRAM files (*.txt)
# For Murata 2EC (LBEE5XV2EC)
install -m 444 ${S}/cyw-fmac-nvram/cyfmac5557x-pcie_sdio.sant.2EA_2EC.txt ${D}${base_libdir}/firmware/cypress/cyfmac55572-sdio.txt
}
inherit update-rc.d systemd
INITSCRIPT_PACKAGES += "${PN}-autocountry"
@ -147,4 +177,4 @@ INSANE_SKIP:${PN} += "build-deps"
INSANE_SKIP:${PN} += "file-rdeps"
PACKAGE_ARCH = "${MACHINE_ARCH}"
COMPATIBLE_MACHINE = "(ccmp1|ccmp2)"
COMPATIBLE_MACHINE = "(ccmp1|ccmp2|ccimx95)"

471
meta-digi-arm/recipes-bsp/firmware-murata-infineon/firmware-murata-infineon/cyfmac55500-sdio.txt
View File

@ -1,471 +0,0 @@
#CYW955513SDM2WLIPA_TAG215
#802.11ax 1x1 Tri-Band HE20 WiFi 6/6e + BT/BLE 5.2 Combo with SDIO/SPI interface
#Type2FY
NVRAMRev=$Rev: 5062 $
sromrev=11
boardrev=0x1530
boardtype=0x0904
boardflags=0x00400001
boardflags2=0x00800000
boardflags3=0x40000100
#boardnum=57410
macaddr=00:90:4c:2e:c3:05
#Regulatory specific
ccode=0
regrev=0
# Board specific
vendid=0x12be
devid=0xbd3e
manfid=0x2d0
antswitch=0
pdgain5g=0
pdgain2g=0
aa2g=1
aa5g=1
agbg0=2
aga0=2
extpagain5g=2
extpagain2g=2
rxgains2gelnagaina0=0
rxgains2gtrisoa0=13
rxgains2gtrelnabypa0=0
rxgains5gelnagaina0=0
rxgains5gtrisoa0=7
rxgains5gtrelnabypa0=0
rxgains5gmelnagaina0=0
rxgains5gmtrisoa0=7
rxgains5gmtrelnabypa0=0
rxgains5ghelnagaina0=0
rxgains5ghtrisoa0=7
rxgains5ghtrelnabypa0=0
# ==== RSSI related parametes start ==============================================================
# 2G-Core0 [20MHz, 40Mhz]
rssicorrnorm_c0=-5,0
# ===================================
# 5G-Core0 [20MHz(l), 40MHz(l), 80Mhz(l), 20MHz(ml), 40MHz(ml), 80Mhz(ml), 20MHz(mu), 40MHz(mu), 80Mhz(mu), 20MHz(h), 40MHz(h), 80Mhz(h)]
# 5170 to below 5500(ch36 to ch96) - l
# 5500 to below 5620(ch100 to ch120) - ml
# 5620 to below 5745(ch124 to ch144) - mu
# 5745 to below 5835(ch149 to ch165) - h
# ===================================
rssicorrnorm5g_c0=7,0,0,6,0,0,3,0,0,4,0,0
# 6G-Core0 [20MHz(u5), 40MHz(u5), 80Mhz(u5), 20MHz(u6), 40MHz(u6), 80Mhz(u6), 20MHz(u7), 40MHz(u7), 80Mhz(u7), 20MHz(u8), 40MHz(u8), 80Mhz(u8)]
rssicorrnorm6g_c0=1,0,0,-4,0,0,-2,0,0,0,0,0
# These parameter are not required (seems obsolete), valid for fast AGC
#rssi_delta_5gl=-6 4 -8 -8 -6 4 -8 -8 -6 4 -8 -8 -3 6 -3 -4 -3 6 -3 -4 -3 6 -3 -4
#rssi_delta_5gml=-1 3 -1 -3 -1 3 -1 -3 -1 3 -1 -3 -1 2 0 -2 -1 2 0 -2 -1 2 0 -2
#rssi_delta_5gmu=0 3 -1 -2 0 3 -1 -2 0 3 -1 -2 0 2 0 -2 0 2 0 -2 0 2 0 -2
#rssi_delta_5gh=2 4 2 -1 2 4 2 -1 2 4 2 -1 0 0 2 -2 0 0 2 -2 0 0 2 -2
#rssi_delta_6gunii5=-6 4 -8 -8 -6 4 -8 -8 -6 4 -8 -8 -3 6 -3 -4 -3 6 -3 -4 -3 6 -3 -4
#rssi_delta_6gunii6=-1 3 -1 -3 -1 3 -1 -3 -1 3 -1 -3 -1 2 0 -2 -1 2 0 -2 -1 2 0 -2
#rssi_delta_6gunii7=0 3 -1 -2 0 3 -1 -2 0 3 -1 -2 0 2 0 -2 0 2 0 -2 0 2 0 -2
#rssi_delta_6gunii8=2 4 2 -1 2 4 2 -1 2 4 2 -1 0 0 2 -2 0 0 2 -2 0 0 2 -2
rssi_cal_rev=1
rxgaincal_rssical=1
# Correction for low rssi region
low_pwr_rssi_thresh_qdBm_5g=-334
low_pwr_rssi_bias_5g_c0=-2,0,0,-8,0,0,-6,0,0,-8,0,0
# Setting this to 255 to disable temp based compensation
gain_cal_temp=25
rxgain_tempcoeff2g_sub=32,32,32,32,32,32,32,32,32,32
rxgain_tempcoeff5gl=28
rxgain_tempcoeff5gml=24
rxgain_tempcoeff5gmu=24
rxgain_tempcoeff5gh=24
rxgain_tempcoeff2g_sub_elnaoff=32,32,32,32,32,32,32,32,32,32
rxgain_tempcoeff5gl_elnaoff=28
rxgain_tempcoeff5gml_elnaoff=22
rxgain_tempcoeff5gmu_elnaoff=22
rxgain_tempcoeff5gh_elnaoff=22
rxgain_tempcoeff6g_unii5=24
rxgain_tempcoeff6g_unii6=24
rxgain_tempcoeff6g_unii7=28
rxgain_tempcoeff6g_unii8=34
# Each nibble represent 2G channel from 1 to 14. LSB 3 bits specify group number (i.e. 0 to 4), MSB specify if ch used for calibration
rssi_cal_freq_grp_2g= 0x08,0x01,0x91,0x2a,0x23,0xb3,0xc4
rssi_delta_2gb0=0,0,0,0
rssi_delta_2gb1=0,0,0,0
rssi_delta_2gb2=0,0,0,0
rssi_delta_2gb3=0,0,0,0
rssi_delta_2gb4=0,0,0,0
# ==== RSSI related parametes end ==============================================================
#Two range TSSI
tworangetssi2g=0
tworangetssi5g=0
# NOTE :================================================================================
# To run TPC with Two Range TSSI ,set tworangetssi2g = 1 and lowpowerrange2g = 0
# To run TPC with Single Range TSSI, set tworangetssi2g = 0
# To run TPC please READ instructions near pa2ga0 and pa2ga1 as well
# To generate PA params for Low Range set tworangetssi2g = 0 and lowpowerrange2g to 1
# To generate PA params for High Range set tworangetssi2g = 1 and lowpowerrange2g to 1
# ======================================================================================
#lowpowerrange2g=0
#lowpowerrange5g=0
#Related to FW Download. Host may use this
nocrc=1
#FIXME:4369 otpimagesize? Check with Rama
otpimagesize=502
xtalfreq=37400
txchain=1
rxchain=1
cckdigfilttype=3
cck_txgain_offsetval=0x18
#bit mask for slice capability bit 0:2G bit 1:5G
bandcap=2
#FDSS Related
fdss_level_5g=9
fdss_interp_en=0
fdss_level_2g=4
#FIXME: fdss level for 6G made same as 5G for now
fdss_level_6g=9
#LPB related : FIXME Enable later
leg_preamble_boost=12,12,0
lpb_comp=10
#PAPRR Related
paprdis=0
paprrmcsgain2g=130,130,130,129,128,0,0,0,0,0,0,0
paprrmcsgamma2g=550,550,550,650,700,-1,-1,-1,-1,-1,-1,-1
paprrmcsgain5g20=130,130,130,129,128,0,0,0,0,0,0,0
paprrmcsgamma5g20=500,500,550,650,700,-1,-1,-1,-1,-1,-1,-1
#PAPR params for 6G
#FIXME: papr params 6G made same as 5G for now
paprrmcsgain6g20=130,130,130,129,128,0,0,0,0,0,0,0
paprrmcsgamma6g20=500,500,550,650,700,-1,-1,-1,-1,-1,-1,-1
#Tempsense Related
tempthresh=255
tempoffset=255
rawtempsense=0x1ff
phycal_tempdelta=15
temps_period=15
temps_hysteresis=15
#------------- TSSI Related -------------
tssipos2g=1
tssipos5g=1
AvVmid_c0=6,75,5,93,5,93,5,93,5,93,5,90,5,90,5,90,5,90
low_adc_rate_en=1
#limit Tx gain index
txidxcap2g=10
txidxcap5g=10
txidxcap6g=10
# Single RANGE TPC/TSSI
#2G OFDM
#pa2ga0=0,8015,-676
pa2ga0=-156,6167,-696
#2G CCK
#pa2gccka0=0,8015,-676
pa2gccka0=-110,7093,-749
#5G channels:36 to 48,52 to 64,100 to 144,149 to 165
#pa5ga0=-94,7015,-664,-88,7081,-659,-135,6774,-703,-110,7005,-685
pa5ga0=-198,5370,-617,-211,5672,-695,-191,6112,-720,-170,5778,-646
#PA Params 6G UNII-5,6,7,8
#pa6ga0=-157,6659,-714,-156,6675,-721,-145,6830,-731,-162,6499,-716
pa6ga0=-137,6057,-650,-147,6141,-680,-119,6556,-698,-136,6816,-749
# Max power and offsets
maxp2ga0=86
maxp5ga0=70,70,70,70
#Max Power on 6G UNII-5/6 and UNII-7/8
maxp6ga0=70,70
subband5gver=0x4
paparambwver=3
cckpwroffset0=0
# PD offsets for 2G,5G,6G
# 2G power offset per channel
powoffs2gtna0=0,0,0,0,0,0,0,0,0,0,0,0,0,0
# 5G power offset per channel for band edge channel
powoffs5g20mtna0=0,0,0,0,0,0,0
pdoffset20ma0=0x0000
pdoffset6g20ma0=0x0000
pdoffset6g20ma0_group1=0x0000
cckbw202gpo=0x2220
cckbw20ul2gpo=0x2220
mcsbw202gpo=0xaa886666
dot11agofdmhrbw202gpo=0x6666
ofdmlrbw202gpo=0x0066
mcsbw205glpo=0x66400000
mcsbw205gmpo=0x66400000
mcsbw205ghpo=0x66400000
# ppr offsets for UNII-5/6 of 6GHz band
mcsbw206glpo=0x66400000
# ppr offsets for UNII-7/8 of 6GHz band
mcsbw206gmpo=0x66400000
mcs1024qam2gpo=0xffcc
mcs1024qam5glpo=0xffffcc
mcs1024qam5gmpo=0xffffcc
mcs1024qam5ghpo=0xffffcc
mcs1024qam5gx1po=0xffffcc
mcs1024qam5gx2po=0xffffcc
mcs8poexp=0
mcs9poexp=0
mcs10poexp=0
mcs11poexp=0
# 1024QAM rates' offset for 6GHz UNII-5/6
mcs1024qam6glpo=0xffffcc
# 1024QAM rates' offset for 6GHz UNII-7/8
mcs1024qam6gmpo=0xffffcc
#UL-OFDMA PPR's accros RU's
#currently programmed same PPR accross RU's
#across QAM's the PPR are same b/w SU and RU
#each RU PPR is grouped with 5 bits
ruppr2g20bpska0=0x10842
ruppr2g20qpska0=0x10842
ruppr2g20qam16a0=0x10842
ruppr2g20qam64a0=0x294A5
ruppr2g20qam256a0=0x42108
ruppr2g20qam1024a0=0x5294A
ruppr5g20bpska0=0x0
ruppr5g20qpska0=0x0
ruppr5g20qam16a0=0x10842
ruppr5g20qam64a0=0x10842
ruppr5g20qam256a0=0x18c63
ruppr5g20qam1024a0=0x294A5
# OLPC Related
disable_olpc=0
olpc_thresh5g=60
olpc_anchor5g=64
disable_olpc_2g=0
olpc_thresh2g=56
olpc_anchor2g=60
#FIXME: olpc params 6G made same as 5G for now
olpc_thresh6g=60
olpc_anchor6g=64
#LTE Coex Related
ltecxmux=0
ltecxpadnum=0x0504
ltecxfnsel=0x44
ltecxgcigpio=0x04
#OOB params
#device_wake_opt=1
#host_wake_opt=0
# SWCTRL Related
swctrlmap_5g=0x08080808,0x02020202,0x08080808,0x010008,0x00f
swctrlmapext_5g=0x00000000,0x00000000,0x00000000,0x000000,0x000
fem_table_init_val=0x06060606,0x08080808
fem_table_init_val_ext=0x00000000,0x00000000
swctrlmap_2g=0x06060606,0x08080808,0x06060606,0x010008,0x10f
swctrlmapext_2g=0x00000000,0x00000000,0x00000000,0x000000,0x000
clb2gslice0core0=0xd
clb5gslice0core0=0x2
#For TDM coex use the following
btc_prisel_ant_mask=0x0
clb_swctrl_smask_ant0=0x3ff
# 2 Ant hyb/par following comment above
#btc_prisel_ant_mask=0x3
#clb_swctrl_smask_ant0=0x34f
muxenab=0x10
#BT Coex 1:TDM
btc_mode=1
# --- PAPD Cal related params ----
# 0:NBPAPD 1:WBPAPD
txwbpapden=1
# NB PAPD Cal params
# 0x5Gc02Gc0
nb_eps_offset=0x01dd01e3
nb_bbmult=0x5550
nb_papdcalidx=0x050a
nb_txattn=0x0000
nb_rxattn=0x0000
papdgainctrl2g=0
papdgainctrl5g=0
pacalshift2g=5
pacalshift5g=4
eps_stopidx=63
# two-core specific variables for each of UNII-5/6/7/8 bands
# u5c0,u6c0,u7c0,u8c0
nb_txattn_6g=0,0,0,0
nb_rxattn_6g=0,0,0,0
nb_papdcalidx_6g=10,10,10,10
nb_bbmult_6g=80,80,80,80
nb_eps_offset_6g=475,475,475,475
papdgainctrl6g=0
pacalshift6g20=3,4,4,4
# WB papd cal params
# c02g,c05g20
wb_txattn=0,1
wb_rxattn=0,0
wb_tia_gain_mode=2,2
wb_eps_offset=474,462
wb_papdcalidx=10,5
wb_bbmult=64,90
wb_calref_db=23,24
wb_txbuf_offset=33,32
wb_frac_del=255,255
wb_g_frac_bits=10,10
# WB 6G cal params
# u5c0,u6c0,u7c0,u8c0
wb_txattn_6g20=1,1,1,1
wb_rxattn_6g20=0,0,0,0
wb_tia_gain_mode_6g20=4,4,2,5
wb_papdcalidx_6g20=10,10,5,30
wb_bbmult_6g20=70,80,80,86
wb_eps_offset_6g20=470,468,463,471
wb_calref_db_6g20=24,24,24,28
#2nd LUT parameters
wb_multipapd_en=0
wb_PapdLutSel_idx_6g20=42,42,42,42
wb_eps_index_offset_6g20=5,5,5,5
wb_papdcalidx_6g20_lut1=10,10,10,10
wb_bbmult_6g20_lut1=66,70,74,74
wb_calref_db_6g20_lut1=26,26,26,26
# WBPAPD gain control params
wb_gainctrl_nvram_en=1
wb_target_tssi_2g20=200
wb_target_tssi_5g20=210,210,210,150
wb_target_tssi_6g20=75,71,100,-45
wb_fudge_factor_2g5g=1,0,-1,-1,-1
# 2g/5G 2nd PAPD LUT parameters applicable for -40degc
wb_eps_offset_lut1=22,10
wb_calref_db_lut1=23,19
wb_papdcalidx_lut1=10,10
wb_bbmult_lut1=25,40
wb_PapdLutSel_idx_2g5g=53,52
# energy detect threshold
ed_thresh2g=-65
ed_thresh5g=-68
ed_thresh6g=-78
# energy detect threshold for EU
eu_edthresh2g=-65
eu_edthresh5g=-68
eu_edthresh6g=-78
btldopu=0
#rpcal coef for imptxbf
rpcal2g=0
rpcal5gb0=238
rpcal5gb1=228
rpcal5gb2=222
rpcal5gb3=229
#Enable LHL PS mode
lhl_ps_mode=3
#SR related params
#The min resource state during sleep
rmin=0x1
#disable sr topoff
lpflags=0
#disable fastlpo setting
fastlpo_pcie_dis=0
fastlpo_dis=0
#PALDO settings 0=3.3 1=3.35 2=3.41 3=3.46 4=2.86, 5=2.97 6=3.08, 7=3.19
#paldo3p3_voltage=0
#2G lowpwr settings 0=TOT 1=setting1 2=setting2 3=settingHE(lowpwr)
#ipa2glowpwr=3
#temperature throttling
# Currently tvpm is not part of H1 build, disable for initial BU
tvpm=1
tvpm_txc_txdc=105,15
tvpm_txc_txdc_lowlimit=1
tvpm_txc_txdc_insert=0,0
tvpm_monitor_period=3
#temperature throttling, aggressive setting
tvpm_txc_txdc_burst=110,20,5
##Dynamic Desense Params for 2 ant hybrid coex
#btcdyn_flags=3
#btcdyn_dflt_dsns_level=0
#btcdyn_low_dsns_level=1
#btcdyn_mid_dsns_level=2
#btcdyn_high_dsns_level=4
#btcdyn_default_btc_mode=5
#btcdyn_dsns_rows=2
#btcdyn_dsns_row1=5,-4,0,-50,-70
#btcdyn_dsns_row0=5,12,0,-50,-65
ppr_hitemp_offset=70,10
# idx 0: PPR temp thresh, default 150
# idx 1: PPR temp thresh hysteresis, default 15
cckbw202gpo_ht=0x6666
# CCK high temp offset, 0.5dBm/step, rate(11,5.5,2,1Mbps)
ofdmbw202gpo_ht=0x66666666
# 2G OFDM temp offset, 0.5dBm/step, rate(54,48,36,24,18,12,9,6Mbps)
mcsbw202gpo_ht=0x66666666
# 2G BW20 VHT/HT temp offset, 0.5dBm/step, rate(C9,C8,M7,M6,M5,M4,M3,M2-0)
mcsbw202gpo_1024qam_ht=0x66
# 2G BW20 HE/VHT temp offset, 0.5dBm/step, rate(C11,C10)
ofdmbw205gpo_ht=0x66666666
# 5G OFDM temp offset, 0.5dBm/step, rate(54,48,36,24,18,12,9,6Mbps)
mcsbw205gpo_ht=0x66666666
# 5G BW20 HE/VHT/HT temp offset, 0.5dBm/step, rate(C9,C8,M7,M6,M5,M4,M3,M2-0)
mcsbw205gpo_1024qam_ht=0x66
# 5G BW20 HE/VHT temp offset, 0.5dBm/step, rate(C11,C10)
ofdmbw206gpo_ht=0x66666666
# 6G OFDM temp offset, 0.5dBm/step, rate(54,48,36,24,18,12,9,6Mbps)
mcsbw206gpo_ht=0x66666666
# 6G BW20 HE/VHT/HT temp offset, 0.5dBm/step, rate(C9,C8,M7,M6,M5,M4,M3,M2-0)
mcsbw206gpo_1024qam_ht=0x66
# 6G BW20 HE/VHT temp offset, 0.5dBm/step, rate(C11,C10)
# SWDIV related
swdiv_en=0 #To enable SW-DIV feature
swdiv_gpio=0
swdiv_swctrl_en=2
swdiv_swctrl_ant0=0
swdiv_swctrl_ant1=1
swdiv_antmap2g_main=1
swdiv_antmap5g_main=1
swdiv_snrlim=290 #Only enable sw_div if the snr on present antenna is less than 290/8=36.25
swdiv_thresh=2000 #No.of rxpkts threshold
swdiv_snrthresh=24 #Difference between antenna's snr is greater than 24/8=3dB, then shift the antennas
swdiv_timeon=10
swdiv_timeoff=1
swdiv_snr2g20=232
swdiv_snr2g40=257
swdiv_snr5g20=232
swdiv_snr5g40=312
swdiv_snr5g80=296
swdiv_ap_dead_check=0 #Enable sending of null frames at a periodicity of 1 sec to check whether the present antenna is dead
swdiv_ap_div=0 #Enabling ap_diversity

45
meta-digi-arm/recipes-bsp/libubootenv/libubootenv/0003-Implement-support-for-environment-encryption-by-CAAM.patch
View File

@ -49,15 +49,35 @@ Generalize the code to make room for Optee-based encryption.
Optee) implementation.
Signed-off-by: Javier Viguera <javier.viguera@digi.com>
# This is the commit message #4:
crypt: read HWID from 'digi,hwid_fuse_n' dt properties
Now that U-Boot supports overriding the HWID, it inserts the local,
variable HWID into the 'digi,hwid_n' properties and the fused,
stable HWID into the 'digi,hwid_fuse_n' properties.
Read the HWID to compute the key modifier from 'digi,hwid_fuse_n'
as a preferred method. If those properties do not exist, fall back
to the previous method, 'digi,hwid_n'.
An outdated U-Boot that does not create the 'digi,hwid_fuse_n'
properties does not support HWID overriding either, so we can trust
'digi,hwid_n' to have the contents from the fuses.
https://onedigi.atlassian.net/browse/DEL-9123
Signed-off-by: Gonzalo Ruiz <Gonzalo.Ruiz@digi.com>
---
src/CMakeLists.txt | 4 +
src/caam_keyblob.h | 42 +++++++
src/crypt.c | 179 +++++++++++++++++++++++++++++
src/crypt.c | 194 ++++++++++++++++++++++++++++++++
src/crypt.h | 10 ++
src/md5.c | 275 +++++++++++++++++++++++++++++++++++++++++++++
src/md5.h | 24 ++++
src/uboot_env.c | 18 +++
7 files changed, 552 insertions(+)
7 files changed, 567 insertions(+)
create mode 100644 src/caam_keyblob.h
create mode 100644 src/crypt.c
create mode 100644 src/crypt.h
@ -129,10 +149,10 @@ index 0000000..e313e87
+#endif /* CAAM_KEYBLOB_H */
diff --git a/src/crypt.c b/src/crypt.c
new file mode 100644
index 0000000..213cffd
index 0000000..565d13d
--- /dev/null
+++ b/src/crypt.c
@@ -0,0 +1,179 @@
@@ -0,0 +1,194 @@
+/*
+ * Copyright 2024 Digi International Inc
+ *
@ -192,10 +212,25 @@ index 0000000..213cffd
+ int len;
+ int fd;
+ uint32_t ocotp_hwid[MAX_HWID_WORDS];
+ char dt_prop[32];
+ char dt_prop[40];
+ char buf[sizeof(uint32_t)];
+
+ for (i = 0; i < MAX_HWID_WORDS; i++) {
+ sprintf(dt_prop, "/proc/device-tree/digi,hwid_fuse_%d", i);
+ if (access(dt_prop, F_OK) != -1) {
+ fd = open(dt_prop, O_RDONLY);
+ if (fd < 0)
+ return fd;
+ len = read(fd, buf, sizeof(uint32_t));
+ if (len < 0) {
+ close(fd);
+ return -1;
+ }
+ ocotp_hwid[i] = ntohl(*(uint32_t *) buf);
+ close(fd);
+ continue;
+ }
+
+ sprintf(dt_prop, "/proc/device-tree/digi,hwid_%d", i);
+ if (access(dt_prop, F_OK) != -1) {
+ fd = open(dt_prop, O_RDONLY);

39
meta-digi-arm/recipes-bsp/u-boot/u-boot-dey.inc
View File

@ -1,4 +1,4 @@
# Copyright (C) 2018-2025, Digi International Inc.
# Copyright (C) 2018-2026, Digi International Inc.
require recipes-bsp/u-boot/u-boot.inc
@ -31,13 +31,17 @@ SRC_URI = " \
file://boot.txt \
file://install_linux_fw_media.txt \
file://install_linux_fw_uuu.sh \
file://fit-install-template.its \
"
BUILD_UBOOT_SCRIPTS ?= "true"
UBOOT_LOGO_BMP ?= ""
LOCALVERSION ?= ""
inherit ${@oe.utils.conditional('DEY_SOC_VENDOR', 'NXP', 'fsl-u-boot-localversion uuu_bootloader_tag', '', d)}
EXTRA_OEMAKE:append = "${@' LOGO_BMP=%s' % d.getVar('UBOOT_LOGO_BMP') if d.getVar('UBOOT_LOGO_BMP') else ''}"
# Disable u-boot tagging for imx8/9, as the boot image is imx-boot
UUU_BOOTLOADER:mx8-generic-bsp = ""
UUU_BOOTLOADER:mx9-generic-bsp = ""
@ -117,11 +121,34 @@ build_uboot_scripts() {
else
sed -i -e 's,-##SIGNED##,,g' -e 's,##SIGNED##,,g' ${TMP_INSTALL_SCR}
fi
if [ "${f_ext}" = "txt" ]; then
mkimage -T script -n "DEY firmware install script" -C none -d ${TMP_INSTALL_SCR} ${DEPLOYDIR}/${f%.*}.scr
else
install -m 775 ${TMP_INSTALL_SCR} ${DEPLOYDIR}/${f}
fi
# Create FIT image installer when Trustfence is enabled
if [ "${TRUSTFENCE_SIGN_FIT_STM}" = "1" ] || [ "${TRUSTFENCE_SIGN_FIT_NXP}" = "1" ]; then
# We only need the txt scripts
if [ "${f_ext}" = "txt" ]; then
cp ${TMP_INSTALL_SCR} ${WORKDIR}/${f%.*}.fit
INSTALL_LINUX_FW="${f%.*}"
INSTALL_LINUX_FW_DEV="${INSTALL_LINUX_FW##*_}"
TMP_FIT_ITS="$(mktemp ${WORKDIR}/fit-install-template.its.XXXXXX)"
sed -e 's,##INSTALL_LINUX_FW##,'${INSTALL_LINUX_FW}',g' \
-e 's,##INSTALL_LINUX_FW_DEV##,'${INSTALL_LINUX_FW_DEV}',g' \
-e 's,##INSTALL_LINUX_FW_FILE##,'${f%.*}',g' \
${WORKDIR}/fit-install-template.its > ${TMP_FIT_ITS}
# Generate the signed FIT image
mkimage -f ${TMP_FIT_ITS} ${DEPLOYDIR}/install_linux_fw.scr
mkimage -F -k ${TRUSTFENCE_SIGN_KEYS_PATH}/fit -r ${DEPLOYDIR}/install_linux_fw.scr
# copy FIT image installer using the same names we use for the normal script
cp ${DEPLOYDIR}/install_linux_fw.scr ${DEPLOYDIR}/${f%.*}.scr
rm -f ${TMP_FIT_ITS}
fi
fi
rm -f ${TMP_INSTALL_SCR}
done
@ -142,6 +169,16 @@ build_uboot_scripts() {
TMP_SIGNED_BOOTSCR="$(mktemp ${WORKDIR}/bootscr-signed.XXXXXX)"
trustfence-sign-artifact.sh -p "${DIGI_SOM}" -b "${DEPLOYDIR}/boot.scr" "${TMP_SIGNED_BOOTSCR}"
mv "${TMP_SIGNED_BOOTSCR}" "${DEPLOYDIR}/boot.scr"
# Sign USB installer script
TMP_SIGN_INSTALLSCR="$(mktemp ${WORKDIR}/install_linux_fw_usb-signed.XXXXXX)"
trustfence-sign-artifact.sh -p "${DIGI_SOM}" -b "${DEPLOYDIR}/install_linux_fw_usb.scr" "${TMP_SIGN_INSTALLSCR}"
mv "${TMP_SIGN_INSTALLSCR}" "${DEPLOYDIR}/install_linux_fw_usb.scr"
# Sign uSD installer script
TMP_SIGN_INSTALLSCR="$(mktemp ${WORKDIR}/install_linux_fw_sd-signed.XXXXXX)"
trustfence-sign-artifact.sh -p "${DIGI_SOM}" -b "${DEPLOYDIR}/install_linux_fw_sd.scr" "${TMP_SIGN_INSTALLSCR}"
mv "${TMP_SIGN_INSTALLSCR}" "${DEPLOYDIR}/install_linux_fw_sd.scr"
fi
}

6
meta-digi-arm/recipes-bsp/u-boot/u-boot-dey/ccimx6qpsbc/boot.txt
View File

@ -12,8 +12,8 @@ if test "${bootlimit}" -gt 0 && test "${bootcount}" -gt 0; then
bootattempt="(boot attempt ${bootcount}/${bootlimit})"
fi
# Dual boot update verification
if test "${dualboot}" = "yes"; then
# Dual boot update verification (only on EMMC)
if test "${mmcbootdev}" = "${emmc_dev}" && test "${dualboot}" = "yes"; then
if test "${upgrade_available}" = "1"; then
echo "Update detected; Booting new system in ${active_system} ${bootattempt}"
else
@ -52,7 +52,7 @@ else
setenv boot_initrd true
setenv initrd_file uramdisk-recovery.img
else
# We are booting from the SD card.
# SD boot (MBR partition table)
setenv mmcroot /dev/mmcblk${mmcbootdev}p2
fi
if test "${upgrade_available}" = "1"; then

6
meta-digi-arm/recipes-bsp/u-boot/u-boot-dey/ccimx6sbc/boot.txt
View File

@ -12,8 +12,8 @@ if test "${bootlimit}" -gt 0 && test "${bootcount}" -gt 0; then
bootattempt="(boot attempt ${bootcount}/${bootlimit})"
fi
# Dual boot update verification
if test "${dualboot}" = "yes"; then
# Dual boot update verification (only on EMMC)
if test "${mmcbootdev}" = "${emmc_dev}" && test "${dualboot}" = "yes"; then
if test "${upgrade_available}" = "1"; then
echo "Update detected; Booting new system in ${active_system} ${bootattempt}"
else
@ -52,7 +52,7 @@ else
setenv boot_initrd true
setenv initrd_file uramdisk-recovery.img
else
# We are booting from the SD card.
# SD boot (MBR partition table)
setenv mmcroot /dev/mmcblk${mmcbootdev}p2
fi
if test "${upgrade_available}" = "1"; then

9
meta-digi-arm/recipes-bsp/u-boot/u-boot-dey/ccimx8mm-dvk/boot.txt
View File

@ -11,8 +11,8 @@ if test "${bootlimit}" -gt 0 && test "${bootcount}" -gt 0; then
bootattempt="(boot attempt ${bootcount}/${bootlimit})"
fi
# Dual boot verification
if test "${dualboot}" = "yes"; then
# Dual boot (only on EMMC)
if test "${mmcbootdev}" = "${emmc_dev}" && test "${dualboot}" = "yes"; then
if test "${active_system}" = "linux_a"; then
echo "Booting from system A ${bootattempt}"
part number mmc ${mmcbootdev} linux_a tmp_mmcpart
@ -48,12 +48,11 @@ else
setenv boot_initrd true
setenv initrd_file uramdisk-recovery.img
else
# We are booting from the SD card.
setenv mmcroot /dev/mmcblk${mmcbootdev}p2
# SD boot (use SD specific rootfs partition uuid)
setenv mmcroot PARTUUID=b74d3700-a3c2-4806-8cb6-4e0fed784c7f
fi
fi
# Back up environment variables
setenv ORIG_overlays ${overlays}
setenv ORIG_extra_bootargs ${extra_bootargs}

8
meta-digi-arm/recipes-bsp/u-boot/u-boot-dey/ccimx8mn-dvk/boot.txt
View File

@ -11,8 +11,8 @@ if test "${bootlimit}" -gt 0 && test "${bootcount}" -gt 0; then
bootattempt="(boot attempt ${bootcount}/${bootlimit})"
fi
# Dual boot verification
if test "${dualboot}" = "yes"; then
# Dual boot (only on EMMC)
if test "${mmcbootdev}" = "${emmc_dev}" && test "${dualboot}" = "yes"; then
if test "${active_system}" = "linux_a"; then
echo "Booting from system A ${bootattempt}"
part number mmc ${mmcbootdev} linux_a tmp_mmcpart
@ -48,8 +48,8 @@ else
setenv boot_initrd true
setenv initrd_file uramdisk-recovery.img
else
# We are booting from the SD card.
setenv mmcroot /dev/mmcblk${mmcbootdev}p2
# SD boot (use SD specific rootfs partition uuid)
setenv mmcroot PARTUUID=b74d3700-a3c2-4806-8cb6-4e0fed784c7f
fi
fi

8
meta-digi-arm/recipes-bsp/u-boot/u-boot-dey/ccimx8x-sbc-express/boot.txt
View File

@ -11,8 +11,8 @@ if test "${bootlimit}" -gt 0 && test "${bootcount}" -gt 0; then
bootattempt="(boot attempt ${bootcount}/${bootlimit})"
fi
# Dual boot verification
if test "${dualboot}" = "yes"; then
# Dual boot (only on EMMC)
if test "${mmcbootdev}" = "${emmc_dev}" && test "${dualboot}" = "yes"; then
if test "${active_system}" = "linux_a"; then
echo "Booting from system A ${bootattempt}"
part number mmc ${mmcbootdev} linux_a tmp_mmcpart
@ -48,8 +48,8 @@ else
setenv boot_initrd true
setenv initrd_file uramdisk-recovery.img
else
# We are booting from the SD card.
setenv mmcroot /dev/mmcblk${mmcbootdev}p2
# SD boot (use SD specific rootfs partition uuid)
setenv mmcroot PARTUUID=b74d3700-a3c2-4806-8cb6-4e0fed784c7f
fi
fi

8
meta-digi-arm/recipes-bsp/u-boot/u-boot-dey/ccimx8x-sbc-pro/boot.txt
View File

@ -11,8 +11,8 @@ if test "${bootlimit}" -gt 0 && test "${bootcount}" -gt 0; then
bootattempt="(boot attempt ${bootcount}/${bootlimit})"
fi
# Dual boot verification
if test "${dualboot}" = "yes"; then
# Dual boot (only on EMMC)
if test "${mmcbootdev}" = "${emmc_dev}" && test "${dualboot}" = "yes"; then
if test "${active_system}" = "linux_a"; then
echo "Booting from system A ${bootattempt}"
part number mmc ${mmcbootdev} linux_a tmp_mmcpart
@ -48,8 +48,8 @@ else
setenv boot_initrd true
setenv initrd_file uramdisk-recovery.img
else
# We are booting from the SD card.
setenv mmcroot /dev/mmcblk${mmcbootdev}p2
# SD boot (use SD specific rootfs partition uuid)
setenv mmcroot PARTUUID=b74d3700-a3c2-4806-8cb6-4e0fed784c7f
fi
fi

10
meta-digi-arm/recipes-bsp/u-boot/u-boot-dey/ccimx9/boot.txt
View File

@ -11,11 +11,8 @@ if test "${bootlimit}" -gt 0 && test "${bootcount}" -gt 0; then
bootattempt="(boot attempt ${bootcount}/${bootlimit})"
fi
# Pre step: check if we boot from uSD.
if test "${mmcbootdev}" = "1"; then
# We are booting from the SD card.
setenv mmcroot /dev/mmcblk${mmcbootdev}p2
elif test "${dualboot}" = "yes"; then
# Dual boot (only on EMMC)
if test "${mmcbootdev}" = "${emmc_dev}" && test "${dualboot}" = "yes"; then
if test "${active_system}" = "linux_a"; then
echo "Booting from system A ${bootattempt}"
part number mmc ${mmcbootdev} linux_a tmp_mmcpart
@ -50,6 +47,9 @@ else
# We are booting from the eMMC using 'recovery'.
setenv boot_initrd true
setenv initrd_file uramdisk-recovery.img
else
# SD boot (use SD specific rootfs partition uuid)
setenv mmcroot PARTUUID=b74d3700-a3c2-4806-8cb6-4e0fed784c7f
fi
fi

92
meta-digi-arm/recipes-bsp/u-boot/u-boot-dey/ccimx95/boot.txt Normal file
View File

@ -0,0 +1,92 @@
#
# U-Boot bootscript for EMMC/SD images created by Yocto.
#
# As the first step in the boot script, check if we are using DualBoot. This
# requires the script to change some variables and save them, while the rest
# of the script changes variables only temporarily without saving them.
# Build boot attempt message string
if test "${bootlimit}" -gt 0 && test "${bootcount}" -gt 0; then
bootattempt="(boot attempt ${bootcount}/${bootlimit})"
fi
# Dual boot (only on EMMC)
if test "${mmcbootdev}" = "${emmc_dev}" && test "${dualboot}" = "yes"; then
if test "${active_system}" = "linux_a"; then
echo "Booting from system A ${bootattempt}"
part number mmc ${mmcbootdev} linux_a tmp_mmcpart
part number mmc ${mmcbootdev} rootfs_a tmp_rootfs_index
else
echo "Booting from system B ${bootattempt}"
part number mmc ${mmcbootdev} linux_b tmp_mmcpart
part number mmc ${mmcbootdev} rootfs_b tmp_rootfs_index
fi
part uuid mmc ${mmcbootdev}:${tmp_rootfs_index} tmp_mmcroot
if test "${mmcpart}" -ne "${tmp_mmcpart}"; then
setexpr mmcpart ${tmp_mmcpart}
env_save_needed="1"
fi
if test "${mmcroot}" != "PARTUUID=${tmp_mmcroot}"; then
setenv mmcroot PARTUUID=${tmp_mmcroot}
env_save_needed="1"
fi
if test "${env_save_needed}" = "1"; then
env delete tmp_mmcpart tmp_rootfs_index tmp_mmcroot
env save
fi
else
echo "Booting system ${bootattempt}"
# Get the UUID of the configured boot partition.
part uuid mmc ${mmcbootdev}:${mmcpart} bootpart
# Check the boot source.
if test "${bootpart}" = "${part1_uuid}"; then
# We are booting from the eMMC using 'linux'.
true
elif test "${bootpart}" = "${part2_uuid}"; then
# We are booting from the eMMC using 'recovery'.
setenv boot_initrd true
setenv initrd_file uramdisk-recovery.img
else
# SD boot (use SD specific rootfs partition uuid)
setenv mmcroot PARTUUID=b74d3700-a3c2-4806-8cb6-4e0fed784c7f
fi
fi
# Back up environment variables
setenv ORIG_overlays ${overlays}
#
# Determine overlays to apply depending on the hardware capabilities
# described by the HWID, SOM version, and carrier board version.
#
setexpr module_has_wifi ${hwid_2} \& 20000
setexpr module_has_wifi ${module_has_wifi} / 20000
setexpr module_has_bt ${hwid_2} \& 40000
setexpr module_has_bt ${module_has_bt} / 40000
if test "${module_has_bt}" = "1" && test -z "${disable_bt}"; then
setenv overlays ccimx95_bt.dtbo,${overlays}
fi
if test "${module_has_wifi}" = "1" && test -z "${disable_wifi}"; then
setenv overlays ccimx95_wifi.dtbo,${overlays}
fi
if test -z "${disable_npu}"; then
setenv overlays ccimx95_npu.dtbo,${overlays}
fi
if test "${dboot_kernel_var}" = "fitimage" && test -z "${temp-fitimg-loaded}"; then
# Set temp var to avoid re-loading fitimage
setenv temp-fitimg-loaded yes
fi
dboot linux mmc ${mmcbootdev}:${mmcpart}
#
# Undo changes to environment variables
#
# (we only get here in case of an error on the dboot command)
#
setenv overlays ${ORIG_overlays}
setenv ORIG_overlays

30
meta-digi-arm/recipes-bsp/u-boot/u-boot-dey/ccmp15-dvk/0001-ARM-dts-ccmp15-add-signed-firmware-support-for-RPROC.patch Normal file
View File

@ -0,0 +1,30 @@
From: Arturo Buzarra <arturo.buzarra@digi.com>
Date: Tue, 4 Nov 2025 11:10:24 +0100
Subject: [PATCH] ARM: dts: ccmp15: add signed firmware support for RPROC
Declare only the shared memory used for inter-processor communication
(including the resource table) to allow remoteproc to load/authenticate signed
Cortex-M4 firmware.
https://onedigi.atlassian.net/browse/DEL-9920
Signed-off-by: Arturo Buzarra <arturo.buzarra@digi.com>
---
arch/arm/dts/ccmp15.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/ccmp15.dtsi b/arch/arm/dts/ccmp15.dtsi
index 2e2e7788933..f0bdf3d6ed8 100644
--- a/arch/arm/dts/ccmp15.dtsi
+++ b/arch/arm/dts/ccmp15.dtsi
@@ -373,8 +373,8 @@
};
&m4_rproc {
- memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
- <&vdev0vring1>, <&vdev0buffer>, <&mcu_rsc_table>;
+ compatible = "st,stm32mp1-m4-tee";
+ memory-region = <&vdev0vring0>, <&vdev0vring1>, <&vdev0buffer>, <&mcu_rsc_table>;
mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
mbox-names = "vq0", "vq1", "shutdown";
interrupt-parent = <&exti>;

6
meta-digi-arm/recipes-bsp/u-boot/u-boot-dey/ccmp25-dvk/0001-ARM-dts-ccmp25-add-signed-firmware-support-for-RPROC.patch
View File

@ -1,5 +1,5 @@
From: Arturo Buzarra <arturo.buzarra@digi.com>
Date: Thu, 30 Oct 2025 14:35:29 +0100
Date: Wed, 18 Mar 2026 15:26:07 +0100
Subject: [PATCH] ARM: dts: ccmp25: add signed firmware support for RPROC
Declare only the shared memory used for inter-processor communication
@ -14,7 +14,7 @@ Signed-off-by: Arturo Buzarra <arturo.buzarra@digi.com>
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/arch/arm/dts/ccmp25.dtsi b/arch/arm/dts/ccmp25.dtsi
index 913eac366b9..51b65f2408a 100644
index cdbc26efabc..b0a91cb0180 100644
--- a/arch/arm/dts/ccmp25.dtsi
+++ b/arch/arm/dts/ccmp25.dtsi
@@ -246,11 +246,8 @@
@ -25,7 +25,7 @@ index 913eac366b9..51b65f2408a 100644
- <&ipc_shmem_1>, <&vdev0vring0>,
- <&vdev0vring1>, <&vdev0buffer>,
- <&cm33_sram2>;
- st,syscfg-nsvtor = <&a35ss_syscfg 0xa8 0xffffff80>;
- st,syscfg-nsvtor = <&a35ss_syscfg 0x20a8 0xffffff80>;
+ compatible = "st,stm32mp2-m33-tee";
+ memory-region = <&vdev0vring0>, <&vdev0vring1>, <&vdev0buffer>, <&ipc_shmem_1>;
status = "okay";

42
meta-digi-arm/recipes-bsp/u-boot/u-boot-dey/fit-install-template.its Normal file
View File

@ -0,0 +1,42 @@
/dts-v1/;
/ {
description = "Installer fitImage for Digi Embedded Yocto";
#address-cells = <1>;
images {
##INSTALL_LINUX_FW## {
description = "U-boot ##INSTALL_LINUX_FW_DEV## installer script";
data = /incbin/("##INSTALL_LINUX_FW_FILE##.fit");
type = "script";
arch = "arm";
compression = "none";
hash-1 {
algo = "sha256";
};
signature-1 {
algo = "sha256,rsa2048";
key-name-hint = "fitimg";
};
};
};
configurations {
default = "conf-##INSTALL_LINUX_FW##";
conf-##INSTALL_LINUX_FW## {
description = "u-boot ##INSTALL_LINUX_FW_DEV## installer script";
bootscr = "##INSTALL_LINUX_FW##";
hash-1 {
algo = "sha256";
};
signature-1 {
algo = "sha256,rsa2048";
key-name-hint = "fitcfg";
padding = "pkcs-1.5";
sign-images = "bootscr";
};
};
};
};

4
meta-digi-arm/recipes-bsp/u-boot/u-boot-dey_2023.10.bb
View File

@ -13,6 +13,10 @@ SRC_URI += " \
${@oe.utils.conditional('TRUSTFENCE_SIGN_FIT_STM', '1', 'file://fit_signature.cfg', '', d)} \
"
SRC_URI:append:ccmp15 = " \
${@oe.utils.conditional('TRUSTFENCE_COPRO_ENABLED', '1' , 'file://0001-ARM-dts-ccmp15-add-signed-firmware-support-for-RPROC.patch', '', d)} \
"
SRC_URI:append:ccmp25 = " \
${@oe.utils.conditional('TRUSTFENCE_COPRO_ENABLED', '1' , 'file://0001-ARM-dts-ccmp25-add-signed-firmware-support-for-RPROC.patch', '', d)} \
"

35
meta-digi-arm/recipes-digi/mca/mca-tool_1.25.bb
View File

@ -1,35 +0,0 @@
# Copyright (C) 2016-2024, Digi International Inc.
SUMMARY = "MCA firmware management tool"
SECTION = "console/tools"
LICENSE = "CLOSED"
PKGNAME = "mca_tool"
# ARM tarball
SRC_URI:arm = "${DIGI_PKG_SRC}/${PKGNAME}-${PV}-${TUNE_ARCH}.tar.gz;name=arm"
SRC_URI[arm.md5sum] = "ffa8967cb9b684f3846b641a5d57b8f6"
SRC_URI[arm.sha256sum] = "057c289990d79f0b749e9d0d7af2570332e9215e697de75dc6851d89bdd61dff"
# AARCH64 tarball
SRC_URI:aarch64 = "${DIGI_PKG_SRC}/${PKGNAME}-${PV}-${TUNE_ARCH}.tar.gz;name=aarch64"
SRC_URI[aarch64.md5sum] = "12033830965f2861628461c612a7604e"
SRC_URI[aarch64.sha256sum] = "2467e426c6a4e6b89f4aaced846c1f52787e130f16ffb62e6f046bea7bc4f21f"
S = "${WORKDIR}/${PKGNAME}-${PV}"
inherit bin_package
HAS_USRMERGE = "${@bb.utils.contains('DISTRO_FEATURES', 'usrmerge', '1', '0', d)}"
do_install:append() {
# Move binaries from /sbin to /usr/sbin to avoid usrmerge QA error.
if [ "${HAS_USRMERGE}" = "1" ]; then
install -d ${D}${base_sbindir}
mv ${D}/sbin/* ${D}${base_sbindir} && rmdir ${D}/sbin
fi
}
INSANE_SKIP:${PN} = "already-stripped"
COMPATIBLE_MACHINE = "(ccimx6ul|ccimx8m|ccimx8x|ccmp1)"

25
meta-digi-arm/recipes-digi/mca/mca-tool_1.26.bb Normal file
View File

@ -0,0 +1,25 @@
# Copyright (C) 2016-2026, Digi International Inc.
SUMMARY = "MCA firmware management tool"
SECTION = "console/tools"
LICENSE = "CLOSED"
PKGNAME = "mca_tool"
# ARM tarball
SRC_URI:arm = "${DIGI_PKG_SRC}/${PKGNAME}-${PV}-${TUNE_ARCH}.tar.gz;name=arm"
SRC_URI[arm.md5sum] = "478d700bf9e48e91dfe5901a4dfee840"
SRC_URI[arm.sha256sum] = "9d8ca0ef22c0bcfef74868f3a973615c3071259e7820ab77afa6a29f6d7b2461"
# AARCH64 tarball
SRC_URI:aarch64 = "${DIGI_PKG_SRC}/${PKGNAME}-${PV}-${TUNE_ARCH}.tar.gz;name=aarch64"
SRC_URI[aarch64.md5sum] = "a46925c03dc26b6f6337d96497d4880f"
SRC_URI[aarch64.sha256sum] = "dd20ae19dc15ca602c2951d62516c68415c9a81f9577fd893c54268a45acea3a"
S = "${WORKDIR}/${PKGNAME}-${PV}"
inherit bin_package
INSANE_SKIP:${PN} = "already-stripped"
COMPATIBLE_MACHINE = "(ccimx6ul|ccimx8m|ccimx8x|ccmp1|ccimx95)"

101
meta-digi-arm/recipes-digi/trustfence/trustfence-sign-tools/trustfence-gen-pki-stm.sh
View File

@ -112,41 +112,89 @@ fi
RPROC_KEY_PASS_FILE="${CONFIG_SIGN_KEYS_PATH}/rproc-keys/key_pass.txt"
# Generate random keys for Cortex-M coprocessor if they don't exist
if [ "${PLATFORM}" = "ccmp25" ]; then
if [ "${PLATFORM}" = "ccmp15" ] || [ "${PLATFORM}" = "ccmp25" ]; then
N_PUBK="$(ls -l ${CONFIG_SIGN_KEYS_PATH}/rproc-keys/publicKey*.pem 2>/dev/null | wc -l)"
N_PRVK="$(ls -l ${CONFIG_SIGN_KEYS_PATH}/rproc-keys/privateKey*.pem 2>/dev/null | wc -l)"
N_DERK="$(ls -l ${CONFIG_SIGN_KEYS_PATH}/rproc-keys/publicKey*.der 2>/dev/null | wc -l)"
install -d "${CONFIG_SIGN_KEYS_PATH}/rproc-keys/"
if [ "${N_PUBK}" = "1" ] && [ "${N_PRVK}" = "1" ] && [ "${N_DERK}" = "1" ] && [ -f "${RPROC_KEY_PASS_FILE}" ]; then
# PKI tree already exists.
echo "Using existing PKI tree for Cortex-M coprocessor"
elif [ "${N_PUBK}" != "1" ] && [ "${N_PRVK}" != 1 ] && [ "${N_DERK}" != "1" ] && [ ! -f "${RPROC_KEY_PASS_FILE}" ]; then
# Random password
password="$(openssl rand -base64 32)"
echo "Generating random key"
if ! STM32MP_KeyGen_CLI -abs "${CONFIG_SIGN_KEYS_PATH}/rproc-keys/" -pwd ${password}; then
echo "[ERROR] Could not generate PKI tree for Cortex-M coprocessor"
exit 1
fi
echo "${password}" > "${RPROC_KEY_PASS_FILE}"
chmod 400 "${RPROC_KEY_PASS_FILE}"
# Generate DER version of public key
if ! openssl ec -pubin -in ${CONFIG_SIGN_KEYS_PATH}/rproc-keys/publicKey.pem \
-outform DER -pubout \
-out ${CONFIG_SIGN_KEYS_PATH}/rproc-keys/publicKey.der; then
echo "[ERROR] Could not generate DER public key for Cortex-M coprocessor"
if [ "${PLATFORM}" = "ccmp15" ]; then
if [ "${N_PUBK}" = "1" ] && [ "${N_PRVK}" = "1" ]; then
# PKI tree already exists.
echo "Using existing PKI tree for Cortex-M coprocessor"
elif [ "${N_PUBK}" = "0" ] && [ "${N_PRVK}" = "0" ]; then
echo "Generating random key"
if ! openssl genrsa -out "${CONFIG_SIGN_KEYS_PATH}/rproc-keys/privateKey.pem" 2048; then
echo "[ERROR] Could not generate private key for Cortex-M coprocessor"
exit 1
fi
chmod 444 "${CONFIG_SIGN_KEYS_PATH}/rproc-keys/privateKey.pem"
# Generate public key
if ! openssl rsa -pubout -in ${CONFIG_SIGN_KEYS_PATH}/rproc-keys/privateKey.pem \
-out ${CONFIG_SIGN_KEYS_PATH}/rproc-keys/publicKey.pem; then
echo "[ERROR] Could not generate public key for Cortex-M coprocessor"
exit 1
fi
chmod 400 "${CONFIG_SIGN_KEYS_PATH}/rproc-keys/publicKey.pem"
else
echo "[ERROR] Could not generate PKI tree for Cortex-M coprocessor. An incomplete PKI tree may already exist."
exit 1
fi
else
echo "[ERROR] Could not generate PKI tree for Cortex-M coprocessor. An incomplete PKI tree may already exist."
exit 1
if [ "${N_PUBK}" = "1" ] && [ "${N_PRVK}" = "1" ] && [ "${N_DERK}" = "1" ] && [ -f "${RPROC_KEY_PASS_FILE}" ]; then
# PKI tree already exists.
echo "Using existing PKI tree for Cortex-M coprocessor"
elif [ "${N_PUBK}" = "0" ] && [ "${N_PRVK}" = "0" ] && [ "${N_DERK}" = "0" ] && [ ! -f "${RPROC_KEY_PASS_FILE}" ]; then
# Random password
password="$(openssl rand -base64 32)"
echo "Generating random key"
if ! STM32MP_KeyGen_CLI -abs "${CONFIG_SIGN_KEYS_PATH}/rproc-keys/" -pwd ${password}; then
echo "[ERROR] Could not generate PKI tree for Cortex-M coprocessor"
exit 1
fi
echo "${password}" > "${RPROC_KEY_PASS_FILE}"
chmod 400 "${RPROC_KEY_PASS_FILE}"
# Generate DER version of public key
if ! openssl ec -pubin -in ${CONFIG_SIGN_KEYS_PATH}/rproc-keys/publicKey.pem \
-outform DER -pubout \
-out ${CONFIG_SIGN_KEYS_PATH}/rproc-keys/publicKey.der; then
echo "[ERROR] Could not generate DER public key for Cortex-M coprocessor"
exit 1
fi
else
echo "[ERROR] Could not generate PKI tree for Cortex-M coprocessor. An incomplete PKI tree may already exist."
exit 1
fi
fi
fi
if [ -n "${CONFIG_FSBL_ENCRYPT_KEYNAME}" ] && [ -n "${CONFIG_FIP_ENCRYPT_KEYNAME}" ] && [ -n "${CONFIG_RPROC_ENCRYPT_KEYNAME}" ]; then
# Generate random keys if they don't exist
if [ "${PLATFORM}" = "ccmp25" ]; then
# Generate random keys if they don't exist
if [ "${PLATFORM}" = "ccmp13" ]; then
if [ -n "${CONFIG_FSBL_ENCRYPT_KEYNAME}" ] && [ -n "${CONFIG_FIP_ENCRYPT_KEYNAME}" ]; then
if [ ! -f "${CONFIG_SIGN_KEYS_PATH}/${CONFIG_FSBL_ENCRYPT_KEYNAME}" ]; then
echo "Generating random encryption key for FSBL"
if ! STM32MP_KeyGen_CLI -rand 16 "${CONFIG_SIGN_KEYS_PATH}/${CONFIG_FSBL_ENCRYPT_KEYNAME}"; then
echo "[ERROR] Failed to generate 16-byte FSBL encryption key"
exit 1
fi
chmod 444 "${CONFIG_SIGN_KEYS_PATH}/${CONFIG_FSBL_ENCRYPT_KEYNAME}"
fi
if [ ! -f "${CONFIG_SIGN_KEYS_PATH}/${CONFIG_FIP_ENCRYPT_KEYNAME}" ]; then
echo "Generating encryption key for FIP"
if ! hexdump -e '/1 "%02x"' "${CONFIG_SIGN_KEYS_PATH}/${CONFIG_FSBL_ENCRYPT_KEYNAME}" > "${CONFIG_SIGN_KEYS_PATH}/${CONFIG_FIP_ENCRYPT_KEYNAME}"; then
echo "[ERROR] Failed to generate 32-byte FIP encryption key"
exit 1
fi
if ! hexdump -e '/1 "%02x"' "${CONFIG_SIGN_KEYS_PATH}/${CONFIG_FSBL_ENCRYPT_KEYNAME}" >> "${CONFIG_SIGN_KEYS_PATH}/${CONFIG_FIP_ENCRYPT_KEYNAME}"; then
echo "[ERROR] Failed to generate 32-byte FIP encryption key"
exit 1
fi
printf "\n" >> "${CONFIG_SIGN_KEYS_PATH}/${CONFIG_FIP_ENCRYPT_KEYNAME}"
chmod 444 "${CONFIG_SIGN_KEYS_PATH}/${CONFIG_FIP_ENCRYPT_KEYNAME}"
fi
fi
elif [ "${PLATFORM}" = "ccmp25" ]; then
if [ -n "${CONFIG_FSBL_ENCRYPT_KEYNAME}" ] && [ -n "${CONFIG_FIP_ENCRYPT_KEYNAME}" ] && [ -n "${CONFIG_RPROC_ENCRYPT_KEYNAME}" ]; then
if [ ! -f "${CONFIG_SIGN_KEYS_PATH}/${CONFIG_FSBL_ENCRYPT_KEYNAME}" ]; then
echo "Generating random encryption key for FSBL"
if ! STM32MP_KeyGen_CLI -rand 16 "${CONFIG_SIGN_KEYS_PATH}/${CONFIG_FSBL_ENCRYPT_KEYNAME}"; then
@ -171,8 +219,5 @@ if [ -n "${CONFIG_FSBL_ENCRYPT_KEYNAME}" ] && [ -n "${CONFIG_FIP_ENCRYPT_KEYNAME
fi
chmod 444 "${CONFIG_SIGN_KEYS_PATH}/${CONFIG_RPROC_ENCRYPT_KEYNAME}"
fi
else
echo "[ERROR] Could not generate encryption keys. Platform not supported."
exit 1
fi
fi

8
meta-digi-arm/recipes-kernel/linux-firmware/linux-firmware_%.bbappend
View File

@ -1,8 +0,0 @@
# Copyright (C) 2022, Digi International Inc.
# This is an excerpt from the *.bbappend in meta-imx, containing only the
# minimum necessary changes for bitbake to use the SDMA firmware from the
# firmware-imx recipe instead of this one
# Use the latest version of sdma firmware in firmware-imx
PACKAGES:remove = "${PN}-imx-sdma-license ${PN}-imx-sdma-imx6q ${PN}-imx-sdma-imx7d"

48
meta-digi-arm/recipes-kernel/linux/linux-dey/ccimx95/0001-CC95-early-prototypes-enable-wireless-interfaces.patch
View File

@ -1,48 +0,0 @@
From: Isaac Hermida <isaac.hermida@digi.com>
Date: Fri, 21 Nov 2025 10:12:53 +0100
Subject: [PATCH] CC95: early prototypes: enable wireless interfaces
As the HWID is not completed yet, is needed to fill that info manually.
This is just temporal for the initial prototypes.
Additionally, in U-Boot, is needed to set the overlays as:
setenv overlays ccimx9_wifi.dtbo,ccimx9_bt.dtbo
Signed-off-by: Isaac Hermida <isaac.hermida@digi.com>
---
arch/arm64/boot/dts/digi/ccimx9_bt.dtso | 1 +
arch/arm64/boot/dts/digi/ccimx9_wifi.dtso | 3 +++
2 files changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/digi/ccimx9_bt.dtso b/arch/arm64/boot/dts/digi/ccimx9_bt.dtso
index 6b4ca6229706..e073fe328dea 100644
--- a/arch/arm64/boot/dts/digi/ccimx9_bt.dtso
+++ b/arch/arm64/boot/dts/digi/ccimx9_bt.dtso
@@ -23,6 +23,7 @@ __overlay__ {
overlay-description = "SOM: Bluetooth";
bluetooth {
/* U-Boot will fill in the MAC address here */
+ mac-address = [00 04 f3 ff ff fc];
};
};
};
diff --git a/arch/arm64/boot/dts/digi/ccimx9_wifi.dtso b/arch/arm64/boot/dts/digi/ccimx9_wifi.dtso
index 7d73c4c7764d..80d766215ee0 100644
--- a/arch/arm64/boot/dts/digi/ccimx9_wifi.dtso
+++ b/arch/arm64/boot/dts/digi/ccimx9_wifi.dtso
@@ -25,6 +25,7 @@ __overlay__ {
overlay-description = "SOM: Wi-Fi";
wireless {
/* U-Boot will fill in the MAC address here */
+ mac-address = [00 04 f3 ff ff fb];
};
};
};
@@ -42,6 +43,8 @@ __overlay__ {
bus-width = <4>;
non-removable;
wakeup-source;
+ // Workaround: limit max freq to 100MHz
+ max-frequency = <100000000>;
status = "okay";
};
};

38
meta-digi-arm/recipes-kernel/linux/linux-dey/ccmp1/0001-ARM-dts-ccmp15-add-signed-firmware-support-for-RPROC.patch Normal file
View File

@ -0,0 +1,38 @@
From: Arturo Buzarra <arturo.buzarra@digi.com>
Date: Tue, 4 Nov 2025 09:03:31 +0100
Subject: [PATCH] ARM: dts: ccmp15: add signed firmware support for RPROC
Declare only the shared memory used for inter-processor communication
(including the resource table) to allow remoteproc to load/authenticate signed
Cortex-M4 firmware.
https://onedigi.atlassian.net/browse/DEL-9920
Signed-off-by: Arturo Buzarra <arturo.buzarra@digi.com>
---
arch/arm/boot/dts/digi/ccmp15.dtsi | 9 ++++-----
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/digi/ccmp15.dtsi b/arch/arm/boot/dts/digi/ccmp15.dtsi
index 6f636dbf6ece..dd26d6d3d420 100644
--- a/arch/arm/boot/dts/digi/ccmp15.dtsi
+++ b/arch/arm/boot/dts/digi/ccmp15.dtsi
@@ -414,14 +414,13 @@ &ipcc {
};
&m4_rproc {
- memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
- <&vdev0vring1>, <&vdev0buffer>, <&mcu_rsc_table>;
+ compatible = "st,stm32mp1-m4-tee";
+ memory-region = <&vdev0vring0>, <&vdev0vring1>, <&vdev0buffer>, <&mcu_rsc_table>;
mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>;
mbox-names = "vq0", "vq1", "shutdown", "detach";
- resets = <&scmi_reset RST_SCMI_MCU>,
- <&scmi_reset RST_SCMI_MCU_HOLD_BOOT>;
- reset-names = "mcu_rst", "hold_boot";
/delete-property/ st,syscfg-holdboot;
+ /delete-property/ resets;
+ /delete-property/ reset-names;
interrupt-parent = <&exti>;
interrupts = <68 1>;
wakeup-source;

6
meta-digi-arm/recipes-kernel/linux/linux-dey/ccmp2/0001-ARM64-dts-ccmp25-add-signed-firmware-support-for-RPR.patch
View File

@ -1,5 +1,5 @@
From: Arturo Buzarra <arturo.buzarra@digi.com>
Date: Thu, 30 Oct 2025 14:15:14 +0100
Date: Wed, 18 Mar 2026 15:30:31 +0100
Subject: [PATCH] ARM64: dts: ccmp25: add signed firmware support for RPROC
Declare only the shared memory used for inter-processor communication
@ -14,7 +14,7 @@ Signed-off-by: Arturo Buzarra <arturo.buzarra@digi.com>
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/boot/dts/digi/ccmp25.dtsi b/arch/arm64/boot/dts/digi/ccmp25.dtsi
index 153726203533..89f5bf75fd9f 100644
index 0940797f47fa..444ebc920187 100644
--- a/arch/arm64/boot/dts/digi/ccmp25.dtsi
+++ b/arch/arm64/boot/dts/digi/ccmp25.dtsi
@@ -346,11 +346,8 @@ &m0_rproc {
@ -25,7 +25,7 @@ index 153726203533..89f5bf75fd9f 100644
- <&ipc_shmem_1>, <&vdev0vring0>,
- <&vdev0vring1>, <&vdev0buffer>,
- <&cm33_sram2>;
- st,syscfg-nsvtor = <&a35ss_syscfg 0xa8 0xffffff80>;
- st,syscfg-nsvtor = <&a35ss_syscfg 0x20a8 0xffffff80>;
+ compatible = "st,stm32mp2-m33-tee";
+ memory-region = <&vdev0vring0>, <&vdev0vring1>, <&vdev0buffer>, <&ipc_shmem_1>;
status = "okay";

4
meta-digi-arm/recipes-kernel/linux/linux-dey/docker_conf.cfg
View File

@ -26,6 +26,7 @@ CONFIG_NETFILTER_XT_TARGET_MASQUERADE=y
CONFIG_NETFILTER_XT_MARK=m
CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m
CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
CONFIG_IP_NF_IPTABLES=y
CONFIG_IP6_NF_IPTABLES=y
CONFIG_IP_NF_NAT=y
@ -51,6 +52,7 @@ CONFIG_CGROUP_NET_CLASSID=y
CONFIG_IP_NF_FILTER=m
CONFIG_BLK_CGROUP=y
CONFIG_NETFILTER=y
CONFIG_NETFILTER_ADVANCED=y
CONFIG_BRIDGE_NETFILTER=m
CONFIG_BRIDGE=m
CONFIG_BRIDGE_VLAN_FILTERING=y
@ -60,8 +62,6 @@ CONFIG_UNIX_DIAG=m
CONFIG_NETFILTER_XT_MATCH_COMMENT=m
CONFIG_NETLINK_DIAG=m
CONFIG_MACVLAN=y
CONFIG_BTRFS_FS=y
CONFIG_BTRFS_FS_POSIX_ACL=y
CONFIG_BPF_SYSCALL=y
CONFIG_CGROUP_BPF=y
CONFIG_CFS_BANDWIDTH=y

2
meta-digi-arm/recipes-kernel/linux/linux-dey/stm32mpcommon/0011-v6.6-stm32mp-rt-r2.patch
View File

@ -442,7 +442,7 @@ index 1c949774f..b56d3b77c 100644
if (stm32_usart_rx_dma_started(stm32_port) && !stm32_port->throttled) {
- spin_lock(&port->lock);
+ uart_port_lock(port);
size = stm32_usart_receive_chars(port, (sr & USART_SR_RTOF));
size = stm32_usart_receive_chars(port, false);
uart_unlock_and_check_sysrq(port);
if (size)
@@ -1319,7 +1309,7 @@ static void stm32_usart_unthrottle(struct uart_port *port)

41
meta-digi-arm/recipes-kernel/linux/linux-dey_6.6.bb
View File

@ -1,7 +1,15 @@
# Copyright (C) 2024,2025, Digi International Inc.
# Copyright (C) 2024-2026, Digi International Inc.
require recipes-kernel/linux/linux-dey.inc
KERNEL_LOGO_PPM ?= ""
do_compile[prefuncs] += "${@'kernel_prepare_logo' if d.getVar('KERNEL_LOGO_PPM') else ''}"
kernel_prepare_logo() {
install -m 0644 "${KERNEL_LOGO_PPM}" "${S}/drivers/video/logo/logo_custom_clut224.ppm"
}
SRCBRANCH = "v6.6/nxp/dey-5.0/maint"
SRCBRANCH:stm32mpcommon = "v6.6/stm/dey-5.0/maint"
SRCREV = "${AUTOREV}"
@ -22,29 +30,40 @@ SRC_URI:append = " \
${@bb.utils.contains('DISTRO_FEATURES', 'rt', '${RT_FILES}', '', d)} \
"
SRC_URI:append:ccmp25 = " \
${@oe.utils.conditional('TRUSTFENCE_COPRO_ENABLED', '1' , 'file://0001-ARM64-dts-ccmp25-add-signed-firmware-support-for-RPR.patch', '', d)} \
SRC_URI:append:ccmp15 = " \
${@oe.utils.conditional('TRUSTFENCE_COPRO_ENABLED', '1' , 'file://0001-ARM-dts-ccmp15-add-signed-firmware-support-for-RPROC.patch', '', d)} \
"
SRC_URI:append:ccimx95 = " \
file://0001-CC95-early-prototypes-enable-wireless-interfaces.patch \
SRC_URI:append:ccmp25 = " \
${@oe.utils.conditional('TRUSTFENCE_COPRO_ENABLED', '1' , 'file://0001-ARM64-dts-ccmp25-add-signed-firmware-support-for-RPR.patch', '', d)} \
"
# Define RT config fragments per machine
RT_CONFIG_FRAGS:use-nxp-bsp = " ${WORKDIR}/fragment-nxp-rt.config"
RT_CONFIG_FRAGS:stm32mpcommon = " \
${S}/arch/arm64/configs/fragment-07-rt.config \
${S}/arch/arm64/configs/fragment-07-rt-sysvinit.config \
${WORKDIR}/fragment-08-deactivate-rng.config \
${WORKDIR}/fragment-10-network-improvment.config \
"
RT_CONFIG_FRAGS:stm32mpcommon:append = " \
${@bb.utils.contains('DISTRO_FEATURES', 'sysvinit', \
'${S}/arch/arm64/configs/fragment-07-rt-sysvinit.config', \
'', d)} \
"
KERNEL_CONFIG_FRAGMENTS:append = " \
${@bb.utils.contains('DISTRO_FEATURES', 'rt', '${RT_CONFIG_FRAGS}', '', d)} \
"
# Blacklist btnxpuart module. It will be managed by the bluetooth-init script
KERNEL_MODULE_PROBECONF:ccimx9 += "btnxpuart"
module_conf_btnxpuart:ccimx9 = "blacklist btnxpuart"
# Blacklist BT driver (as module). They will be managed by the bluetooth-init script
KERNEL_MODULE_PROBECONF:ccimx91 += "btnxpuart"
KERNEL_MODULE_PROBECONF:ccimx93 += "btnxpuart"
KERNEL_MODULE_PROBECONF:ccimx95 += "hci_uart"
KERNEL_MODULE_PROBECONF:ccmp1 += "hci_uart"
module_conf_btnxpuart:ccimx91 = "blacklist btnxpuart"
module_conf_btnxpuart:ccimx93 = "blacklist btnxpuart"
module_conf_hci_uart:ccimx95 = "blacklist hci_uart"
module_conf_hci_uart:ccmp1 = "blacklist hci_uart"
# ---------------------------------------------------------------------
# stub for devicetree which are located on digi directory
@ -56,10 +75,6 @@ do_compile:append:stm32mpcommon() {
fi
}
# Blacklist hci_uart module. It will be managed by the bluetooth-init script
KERNEL_MODULE_PROBECONF:ccmp1 += "hci_uart"
module_conf_hci_uart:ccmp1 = "blacklist hci_uart"
do_install:append:stm32mpcommon() {
if ${@bb.utils.contains('MACHINE_FEATURES','gpu','true','false',d)}; then
# when ACCEPT_EULA are filled

19
meta-digi-arm/wic/imx-imx-boot-bootpart-uboot-env.wks.in Normal file
View File

@ -0,0 +1,19 @@
# short-description: Create a bootable SD card image
# long-description: Create a bootable SD card image with bootloader,
# environment partition, and boot and rootfs partitions.
#
# The disk layout used is:
# - ---------- ------------ -------------- --------------
# | | imx-boot | u-boot-env | boot | rootfs |
# - ---------- ------------ -------------- --------------
# ^ ^ ^ ^ ^
# | | | | |
# 0 | 8MiB - 32kiB 8MiB 264MiB
# ${IMX_BOOT_SEEK} 32 or 33kiB, see reference manual
#
part imxboot --source rawcopy --sourceparams="file=imx-boot.tagged" --ondisk mmcblk --no-table --align ${IMX_BOOT_SEEK}
part u-boot-env --source empty --ondisk mmcblk --size 32k --offset 8160k --part-name u-boot-env --part-type 3DE21764-95BD-54BD-A5C3-4ABE786F38A8
part /boot --source bootimg-partition --ondisk mmcblk --fstype=vfat --label boot --active --align 8192 --fixed-size 256
part / --source rootfs --ondisk mmcblk --fstype=ext4 --label root --align 8192 --uuid b74d3700-a3c2-4806-8cb6-4e0fed784c7f
bootloader --ptable gpt

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