* Set the OP-TEE base address to 0x7e000000 (32MiB below the first gigabyte of DDR). * Update the ATF and OP-TEE memory maps to support up to 4GiB DDR. This ensures OP-TEE runs reliably across all ccimx8mm memory configurations. https://onedigi.atlassian.net/browse/DEL-9502 Signed-off-by: Javier Viguera <javier.viguera@digi.com> |
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| .. | ||
| 0001-ccimx91-use-UART6-for-the-default-console.patch | ||
| 0001-ccimx93-use-UART6-for-the-default-console.patch | ||
| 0001-imx8mm-Define-UART1-as-console-for-boot-stage.patch | ||
| 0002-imx8mm-Disable-M4-debug-console.patch | ||
| 0002-imx93-bring-back-ELE-clock-workaround-for-soc-revisi.patch | ||
| 0003-imx8mn-Define-UART1-as-console-for-boot-stage.patch | ||
| 0004-imx8mn-Disable-M7-debug-console.patch | ||
| 0005-imx8mm-set-BL32_BASE-and-map-high-DRAM-for-ccimx8mm-.patch | ||