227 lines
9.6 KiB
Diff
227 lines
9.6 KiB
Diff
From: Hector Palacios <hector.palacios@digi.com>
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Date: Wed, 14 Jan 2026 16:03:29 +0100
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Subject: [PATCH] ccimx95dvk: change SM console from LPUART7 to LPUART2
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On version 2 of the SOM, the SM console has changed to LPUART2.
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Upstream-Status: Inappropriate [DEY specific]
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Signed-off-by: Hector Palacios <hector.palacios@digi.com>
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https://onedigi.atlassian.net/browse/DEL-9915
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---
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configs/ccimx95dvk.cfg | 18 +++++++++---------
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configs/ccimx95dvk/config_board.h | 2 +-
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configs/ccimx95dvk/config_scmi.h | 12 +++++++-----
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configs/ccimx95dvk/config_trdc.h | 7 +++----
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4 files changed, 20 insertions(+), 19 deletions(-)
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diff --git a/configs/ccimx95dvk.cfg b/configs/ccimx95dvk.cfg
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index b73401792592..53444e785270 100755
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--- a/configs/ccimx95dvk.cfg
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+++ b/configs/ccimx95dvk.cfg
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@@ -1,7 +1,7 @@
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## ###################################################################
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##
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## Copyright 2023-2025 NXP
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-## Copyright 2025 Digi International Inc.
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+## Copyright 2025,2026 Digi International Inc.
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##
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## Redistribution and use in source and binary forms, with or without modification,
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## are permitted provided that the following conditions are met:
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@@ -42,7 +42,7 @@ include ../devices/MIMX95/configtool/device.cfg
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# Board #
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#==========================================================================#
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-BOARD DEBUG_UART_INSTANCE=7
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+BOARD DEBUG_UART_INSTANCE=2
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BOARD DEBUG_UART_BAUDRATE=115200
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BOARD I2C_INSTANCE=1
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@@ -233,7 +233,7 @@ IOMUXC OWNER
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IOMUX_GPR OWNER
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JTAG OWNER
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LPI2C1 OWNER
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-LPUART7 OWNER
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+LPUART2 OWNER
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M33_CACHE_CTRL OWNER
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M33_PCF OWNER
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M33_PSF OWNER
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@@ -306,8 +306,8 @@ L_STCU_NPUMIX OWNER
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PIN_FCCU_ERR0 OWNER
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PIN_I2C1_SCL OWNER
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PIN_I2C1_SDA OWNER
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-PIN_GPIO_IO08 OWNER # LPUART7_TX
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-PIN_GPIO_IO09 OWNER # LPUART7_RX
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+PIN_UART2_RXD OWNER
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+PIN_UART2_TXD OWNER
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PIN_WDOG_ANY OWNER
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# Memory
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@@ -488,11 +488,11 @@ PERLPI_GPIO3 ALL
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PERLPI_GPIO4 ALL
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PERLPI_GPIO5 ALL
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PERLPI_LPUART1 ALL
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-PERLPI_LPUART2 ALL
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PERLPI_LPUART3 ALL
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PERLPI_LPUART4 ALL
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PERLPI_LPUART5 ALL
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PERLPI_LPUART6 ALL
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+PERLPI_LPUART7 ALL
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PERLPI_LPUART8 ALL
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PERLPI_GPIO1 ALL
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PERLPI_WDOG3 ALL
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@@ -772,11 +772,11 @@ LPTPM4 OWNER
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LPTPM5 OWNER
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LPTPM6 OWNER
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LPUART1 OWNER
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-LPUART2 OWNER
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LPUART3 OWNER
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LPUART4 OWNER
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LPUART5 OWNER
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LPUART6 OWNER
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+LPUART7 OWNER
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LPUART8 OWNER, test
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LVDS OWNER
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MIPI_CSI0 OWNER
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@@ -922,6 +922,8 @@ PIN_GPIO_IO04 OWNER
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PIN_GPIO_IO05 OWNER
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PIN_GPIO_IO06 OWNER
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PIN_GPIO_IO07 OWNER
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+PIN_GPIO_IO08 OWNER
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+PIN_GPIO_IO09 OWNER
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PIN_GPIO_IO10 OWNER
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PIN_GPIO_IO11 OWNER
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PIN_GPIO_IO12 OWNER
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@@ -987,8 +989,6 @@ PIN_SD3_DATA2 OWNER
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PIN_SD3_DATA3 OWNER
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PIN_UART1_RXD OWNER, test
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PIN_UART1_TXD OWNER
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-PIN_UART2_RXD OWNER
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-PIN_UART2_TXD OWNER
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PIN_XSPI1_DATA0 OWNER
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PIN_XSPI1_DATA1 OWNER
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PIN_XSPI1_DATA2 OWNER
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diff --git a/configs/ccimx95dvk/config_board.h b/configs/ccimx95dvk/config_board.h
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index 23ecae56cf78..b511a0320a68 100644
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--- a/configs/ccimx95dvk/config_board.h
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+++ b/configs/ccimx95dvk/config_board.h
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@@ -54,7 +54,7 @@
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/* Defines */
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/*! Config for UART instance */
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-#define BOARD_DEBUG_UART_INSTANCE 7U
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+#define BOARD_DEBUG_UART_INSTANCE 2U
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/*! Config for UART baudrate */
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#define BOARD_DEBUG_UART_BAUDRATE 115200U
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diff --git a/configs/ccimx95dvk/config_scmi.h b/configs/ccimx95dvk/config_scmi.h
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index 506cb750af65..3b6899a7b9c8 100644
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--- a/configs/ccimx95dvk/config_scmi.h
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+++ b/configs/ccimx95dvk/config_scmi.h
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@@ -177,11 +177,11 @@
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.perlpiPerms[DEV_SM_PERLPI_GPIO4] = SM_SCMI_PERM_ALL, \
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.perlpiPerms[DEV_SM_PERLPI_GPIO5] = SM_SCMI_PERM_ALL, \
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.perlpiPerms[DEV_SM_PERLPI_LPUART1] = SM_SCMI_PERM_ALL, \
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- .perlpiPerms[DEV_SM_PERLPI_LPUART2] = SM_SCMI_PERM_ALL, \
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.perlpiPerms[DEV_SM_PERLPI_LPUART3] = SM_SCMI_PERM_ALL, \
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.perlpiPerms[DEV_SM_PERLPI_LPUART4] = SM_SCMI_PERM_ALL, \
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.perlpiPerms[DEV_SM_PERLPI_LPUART5] = SM_SCMI_PERM_ALL, \
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.perlpiPerms[DEV_SM_PERLPI_LPUART6] = SM_SCMI_PERM_ALL, \
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+ .perlpiPerms[DEV_SM_PERLPI_LPUART7] = SM_SCMI_PERM_ALL, \
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.perlpiPerms[DEV_SM_PERLPI_LPUART8] = SM_SCMI_PERM_ALL, \
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.perlpiPerms[DEV_SM_PERLPI_WDOG3] = SM_SCMI_PERM_ALL, \
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.perlpiPerms[DEV_SM_PERLPI_WDOG4] = SM_SCMI_PERM_ALL, \
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@@ -270,11 +270,11 @@
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.clkPerms[DEV_SM_CLK_LPSPI7] = SM_SCMI_PERM_ALL, \
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.clkPerms[DEV_SM_CLK_LPSPI8] = SM_SCMI_PERM_ALL, \
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.clkPerms[DEV_SM_CLK_LPUART1] = SM_SCMI_PERM_ALL, \
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- .clkPerms[DEV_SM_CLK_LPUART2] = SM_SCMI_PERM_ALL, \
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.clkPerms[DEV_SM_CLK_LPUART3] = SM_SCMI_PERM_ALL, \
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.clkPerms[DEV_SM_CLK_LPUART4] = SM_SCMI_PERM_ALL, \
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.clkPerms[DEV_SM_CLK_LPUART5] = SM_SCMI_PERM_ALL, \
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.clkPerms[DEV_SM_CLK_LPUART6] = SM_SCMI_PERM_ALL, \
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+ .clkPerms[DEV_SM_CLK_LPUART7] = SM_SCMI_PERM_ALL, \
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.clkPerms[DEV_SM_CLK_LPUART8] = SM_SCMI_PERM_ALL, \
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.clkPerms[DEV_SM_CLK_MIPIPHYCFG] = SM_SCMI_PERM_ALL, \
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.clkPerms[DEV_SM_CLK_MIPIPHYPLLBYPASS] = SM_SCMI_PERM_ALL, \
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@@ -388,6 +388,8 @@
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.daisyPerms[DEV_SM_DAISY_LPUART6_CTS] = SM_SCMI_PERM_ALL, \
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.daisyPerms[DEV_SM_DAISY_LPUART6_RXD] = SM_SCMI_PERM_ALL, \
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.daisyPerms[DEV_SM_DAISY_LPUART6_TXD] = SM_SCMI_PERM_ALL, \
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+ .daisyPerms[DEV_SM_DAISY_LPUART7_RXD] = SM_SCMI_PERM_ALL, \
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+ .daisyPerms[DEV_SM_DAISY_LPUART7_TXD] = SM_SCMI_PERM_ALL, \
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.daisyPerms[DEV_SM_DAISY_NETC_EMDC] = SM_SCMI_PERM_ALL, \
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.daisyPerms[DEV_SM_DAISY_NETC_EMDIO] = SM_SCMI_PERM_ALL, \
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.daisyPerms[DEV_SM_DAISY_NETC_ETH0_RMII_RX_ER] = SM_SCMI_PERM_ALL, \
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@@ -463,11 +465,11 @@
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.perlpiPerms[DEV_SM_PERLPI_GPIO4] = SM_SCMI_PERM_ALL, \
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.perlpiPerms[DEV_SM_PERLPI_GPIO5] = SM_SCMI_PERM_ALL, \
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.perlpiPerms[DEV_SM_PERLPI_LPUART1] = SM_SCMI_PERM_ALL, \
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- .perlpiPerms[DEV_SM_PERLPI_LPUART2] = SM_SCMI_PERM_ALL, \
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.perlpiPerms[DEV_SM_PERLPI_LPUART3] = SM_SCMI_PERM_ALL, \
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.perlpiPerms[DEV_SM_PERLPI_LPUART4] = SM_SCMI_PERM_ALL, \
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.perlpiPerms[DEV_SM_PERLPI_LPUART5] = SM_SCMI_PERM_ALL, \
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.perlpiPerms[DEV_SM_PERLPI_LPUART6] = SM_SCMI_PERM_ALL, \
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+ .perlpiPerms[DEV_SM_PERLPI_LPUART7] = SM_SCMI_PERM_ALL, \
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.perlpiPerms[DEV_SM_PERLPI_LPUART8] = SM_SCMI_PERM_ALL, \
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.perlpiPerms[DEV_SM_PERLPI_WDOG3] = SM_SCMI_PERM_ALL, \
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.perlpiPerms[DEV_SM_PERLPI_WDOG4] = SM_SCMI_PERM_ALL, \
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@@ -515,6 +517,8 @@
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.pinPerms[DEV_SM_PIN_GPIO_IO05] = SM_SCMI_PERM_ALL, \
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.pinPerms[DEV_SM_PIN_GPIO_IO06] = SM_SCMI_PERM_ALL, \
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.pinPerms[DEV_SM_PIN_GPIO_IO07] = SM_SCMI_PERM_ALL, \
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+ .pinPerms[DEV_SM_PIN_GPIO_IO08] = SM_SCMI_PERM_ALL, \
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+ .pinPerms[DEV_SM_PIN_GPIO_IO09] = SM_SCMI_PERM_ALL, \
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.pinPerms[DEV_SM_PIN_GPIO_IO10] = SM_SCMI_PERM_ALL, \
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.pinPerms[DEV_SM_PIN_GPIO_IO11] = SM_SCMI_PERM_ALL, \
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.pinPerms[DEV_SM_PIN_GPIO_IO12] = SM_SCMI_PERM_ALL, \
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@@ -580,8 +584,6 @@
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.pinPerms[DEV_SM_PIN_SD3_DATA3] = SM_SCMI_PERM_ALL, \
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.pinPerms[DEV_SM_PIN_UART1_RXD] = SM_SCMI_PERM_ALL, \
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.pinPerms[DEV_SM_PIN_UART1_TXD] = SM_SCMI_PERM_ALL, \
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- .pinPerms[DEV_SM_PIN_UART2_RXD] = SM_SCMI_PERM_ALL, \
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- .pinPerms[DEV_SM_PIN_UART2_TXD] = SM_SCMI_PERM_ALL, \
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.pinPerms[DEV_SM_PIN_XSPI1_DATA0] = SM_SCMI_PERM_ALL, \
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.pinPerms[DEV_SM_PIN_XSPI1_DATA1] = SM_SCMI_PERM_ALL, \
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.pinPerms[DEV_SM_PIN_XSPI1_DATA2] = SM_SCMI_PERM_ALL, \
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diff --git a/configs/ccimx95dvk/config_trdc.h b/configs/ccimx95dvk/config_trdc.h
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index 12ebbc61ca64..5758f62bdef5 100644
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--- a/configs/ccimx95dvk/config_trdc.h
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+++ b/configs/ccimx95dvk/config_trdc.h
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@@ -108,7 +108,7 @@
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SM_CFG_W1(0x00010450U), 0x30003330U, \
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SM_CFG_W1(0x00010454U), 0x03333033U, \
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SM_CFG_W1(0x00010458U), 0x00030000U, \
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- SM_CFG_W1(0x0001045cU), 0x33330000U, \
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+ SM_CFG_W1(0x0001045cU), 0x33330030U, \
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SM_CFG_W1(0x00010460U), 0x33333333U, \
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SM_CFG_W1(0x00010464U), 0x30000003U, \
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SM_CFG_W1(0x00010468U), 0x33330030U, \
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@@ -123,7 +123,7 @@
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SM_CFG_W1(0x00010650U), 0x09000309U, \
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SM_CFG_W1(0x00010654U), 0x0000C900U, \
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SM_CFG_W1(0x00010658U), 0x99909900U, \
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- SM_CFG_W1(0x0001065cU), 0x00009999U, \
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+ SM_CFG_W1(0x0001065cU), 0x00009909U, \
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SM_CFG_W1(0x00010668U), 0x00009900U, \
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SM_CFG_W1(0x0001066cU), 0x90909000U, \
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SM_CFG_W1(0x00010670U), 0x00009000U, \
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@@ -1151,7 +1151,6 @@
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SM_CFG_Z1(0x00010260U), \
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SM_CFG_W1(0x00010270U), 0x00000090U, \
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SM_CFG_W1(0x00010460U), 0x33000300U, \
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- SM_CFG_W1(0x00010474U), 0x00000030U, \
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SM_CFG_W1(0x00010478U), 0x33300000U, \
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SM_CFG_W1(0x0001047cU), 0x00003333U, \
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SM_CFG_W1(0x000105d0U), 0x33333333U, \
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@@ -1170,7 +1169,7 @@
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SM_CFG_W1(0x00010668U), 0x99999999U, \
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SM_CFG_W1(0x0001066cU), 0x09999999U, \
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SM_CFG_W1(0x00010670U), 0x99900009U, \
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- SM_CFG_W1(0x00010674U), 0x99999909U, \
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+ SM_CFG_W1(0x00010674U), 0x99999999U, \
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SM_CFG_W1(0x00010678U), 0x00009999U, \
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SM_CFG_W1(0x0001067cU), 0x00990000U, \
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SM_CFG_W1(0x00010780U), 0x00000009U, \
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