imx-atf: add support for imx93 A0 soc revision

Signed-off-by: Javier Viguera <javier.viguera@digi.com>

meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf/0006-imx93-bring-back-ELE-clock-workaround-for-soc-revisi.patch

@@ -0,0 +1,53 @@
+From: Javier Viguera <javier.viguera@digi.com>
+Date: Tue, 31 Oct 2023 11:25:46 +0100
+Subject: [PATCH] imx93: bring back ELE clock workaround for soc revision A0
+
+Revert commit 7411561db535a20f61ff6621fec5b374130d34f9 to allow building
+for soc revision A0 using a compilation flag.
+
+Signed-off-by: Javier Viguera <javier.viguera@digi.com>
+---
+ plat/imx/imx93/imx93_psci.c | 10 ++++++++++
+ plat/imx/imx93/platform.mk  |  4 ++++
+ 2 files changed, 14 insertions(+)
+
+diff --git a/plat/imx/imx93/imx93_psci.c b/plat/imx/imx93/imx93_psci.c
+index 0fd2bb7802df..461801afb126 100644
+--- a/plat/imx/imx93/imx93_psci.c
++++ b/plat/imx/imx93/imx93_psci.c
+@@ -783,6 +783,11 @@ void imx_pwr_domain_suspend(const psci_power_state_t *target_state)
+ 		} else {
+ 			write_clusterpwrdn(DSU_CLUSTER_PWR_OFF);
+ 		}
++
++#ifdef SOC_REV_A0
++		/* FIXME: slow down S401 clock: 24M OSC */
++		mmio_clrbits_32(0x44450200, GENMASK_32(9, 8));
++#endif
+ 	}
+ 
+ 	if (is_local_state_retn(SYSTEM_PWR_STATE(target_state))) {
+@@ -902,6 +907,11 @@ void imx_pwr_domain_suspend_finish(const psci_power_state_t *target_state)
+ 		mmio_write_32(IMX_GPC_BASE + A55C0_CMC_OFFSET + 0x800 * 2 + CM_MODE_CTRL, CM_MODE_RUN);
+ 		/* clear L3 retention */
+ 		mmio_clrbits_32(IMX_SRC_BASE + A55C0_MEM + 0x400 * 3 + 0x4, MEM_LP_RETENTION);
++
++#ifdef SOC_REV_A0
++		/* FIXME:  set S401 clock back */
++		mmio_setbits_32(0x44450200, BIT(9));
++#endif
+ 	}
+ 	/* do core level */
+ 	if (is_local_state_off(CORE_PWR_STATE(target_state))) {
+diff --git a/plat/imx/imx93/platform.mk b/plat/imx/imx93/platform.mk
+index be09b9f0be7a..440c13c1dbe1 100644
+--- a/plat/imx/imx93/platform.mk
++++ b/plat/imx/imx93/platform.mk
+@@ -57,3 +57,7 @@ BL32_BASE               ?=      0x96000000
+ BL32_SIZE               ?=      0x02000000
+ $(eval $(call add_define,BL32_BASE))
+ $(eval $(call add_define,BL32_SIZE))
++
++ifeq (${SOC_REV_A0},1)
++$(eval $(call add_define,SOC_REV_A0))
++endif

meta-digi-arm/dynamic-layers/freescale-layer/recipes-bsp/imx-atf/imx-atf_%.bbappend

@@ -10,13 +10,34 @@ SRC_URI:append:ccimx8m = " \
 "
 SRC_URI:append:ccimx93 = " \
     file://0005-ccimx93-use-UART6-for-the-default-console.patch \
+    file://0006-imx93-bring-back-ELE-clock-workaround-for-soc-revisi.patch \
 "
 
 BOOT_TOOLS = "imx-boot-tools"
 
+# Build ATF for imx93 SOC revision A0
+do_compile:append:ccimx93() {
+	oe_runmake SOC_REV_A0=1 BUILD_BASE=build-A0 clean
+	oe_runmake SOC_REV_A0=1 BUILD_BASE=build-A0 bl31
+	if ${BUILD_OPTEE}; then
+		oe_runmake SOC_REV_A0=1 BUILD_BASE=build-A0-optee clean
+		oe_runmake SOC_REV_A0=1 BUILD_BASE=build-A0-optee SPD=opteed bl31
+	fi
+}
+
 do_deploy:append() {
 	install -Dm 0644 ${S}/build/${ATF_PLATFORM}/release/bl31.bin ${DEPLOYDIR}/${BOOT_TOOLS}/bl31-${ATF_PLATFORM}.bin
 	if ${BUILD_OPTEE}; then
 		install -m 0644 ${S}/build-optee/${ATF_PLATFORM}/release/bl31.bin ${DEPLOYDIR}/${BOOT_TOOLS}/bl31-${ATF_PLATFORM}.bin-optee
 	fi
 }
+
+# Deploy ATF for imx93 SOC revision A0
+do_deploy:append:ccimx93() {
+	install -Dm 0644 ${S}/build-A0/${ATF_PLATFORM}/release/bl31.bin ${DEPLOYDIR}/bl31-${ATF_PLATFORM}-A0.bin
+	install -Dm 0644 ${S}/build-A0/${ATF_PLATFORM}/release/bl31.bin ${DEPLOYDIR}/${BOOT_TOOLS}/bl31-${ATF_PLATFORM}-A0.bin
+	if ${BUILD_OPTEE}; then
+		install -m 0644 ${S}/build-A0-optee/${ATF_PLATFORM}/release/bl31.bin ${DEPLOYDIR}/bl31-${ATF_PLATFORM}-A0.bin-optee
+		install -m 0644 ${S}/build-A0-optee/${ATF_PLATFORM}/release/bl31.bin ${DEPLOYDIR}/${BOOT_TOOLS}/bl31-${ATF_PLATFORM}-A0.bin-optee
+	fi
+}